179849 Commits

Author SHA1 Message Date
Nathan Sidwell
99e9b54313 c++: Rename DECL_BUILTIN_P to DECL_UNDECLARED_BUILTIN_P
I realized I'd misnamed DECL_BUILTIN_P, it's only true of compiler
builtins unless and until the user declares them -- at that point
they're real decls, and will have a location in the user's source.
(BUILT_IN_FN and friends still work though).  This renames them so
future-me is not confused as to why the predicate becomes false.

	gcc/cp/
	* cp-tree.h (DECL_BUILTIN_P): Rename to ...
	(DECL_UNDECLARED_BUILTIN_P): ... here.
	* decl.c (duplicate_decls): Adjust.
	* name-lookup.c (anticipated_builtin_p): Adjust.
	(do_nonmember_using_decl): Likewise.
	libcc1/
	* libcp1plugin.cc (supplement_binding): Rename
	DECL_BUILTIN_P.
2020-10-07 05:06:52 -07:00
Nathan Sidwell
ba42c30445 c++: Adding exception specs can changed dependentness
Making an exception variant can cause a non-dependent function type to
become dependent (since c++17 eh-specs are part of the type).  The
same is (possibly?) true for adding a late return type.  Fixed thusly.
My upcoming local extern-decl changes have a test case that covers
this (which was how I found it).

	gcc/cp/
	* tree.c (build_cp_fntype_variant): Clear
	TYPE_DEPENDENT_P_VALID if necessary.
2020-10-07 05:06:52 -07:00
Andrew Stubbs
76136f7f0c amdgcn: Use scalar instructions for addptrdi3
Allow addptr to use SPGRs as well as VGPRs for pointers.  This ought to
prevent some unnecessary copying back and forth.

gcc/ChangeLog:

	* config/gcn/gcn.md (unspec): Add UNSPEC_ADDPTR.
	(addptrdi3): Add SGPR alternative.
2020-10-07 12:51:51 +01:00
Mark Wielaard
d22eecf875 Output filepath strings in .debug_line_str for DWARF5
DWARF5 has a new string table specially for file paths. .debug_line
file and dir tables reference strings in .debug_line_str.  If a
.debug_line_str section is emitted then also place CU DIE file
names and comp dirs there.

gcc/ChangeLog:

	* dwarf2out.c (add_filepath_AT_string): New function.
	(asm_outputs_debug_line_str): Likewise.
	(add_filename_attribute): Likewise.
	(add_comp_dir_attribute): Call add_filepath_AT_string.
	(gen_compile_unit_die): Call add_filename_attribute for name.
	(init_sections_and_labels): Init debug_line_str_section when
	asm_outputs_debug_line_str return true.
	(dwarf2out_early_finish): Remove DW_AT_name and DW_AT_comp_dir
	hack and call add_filename_attribute for the remap_debug_filename.
2020-10-07 12:22:43 +02:00
Jakub Jelinek
6923255e35 debug: Pass --gdwarf-N to assembler if fixed gas is detected during configure
> > As for the test assembly, I'd say we should take
> > #define F void foo (void) {}
> > F
> > compile it with
> > gcc -S -O2 -g1 -dA -gno-as-loc-support -fno-merge-debug-strings
> > remove .cfi_* directives, remove the ret instruction, change @function
> > and @progbits to %function and %progbits, change .uleb128 to just .byte,
> > I think all the values should be small enough, maybe change .value to
> > .2byte and .long to .4byte (whatever is most portable across different
> > arches and gas versions), simplify (shorten) strings and adjust
> > sizes, and do something with the .quad directives, that is dependent on
> > the address size, perhaps just take those attributes out and adjust
> > .debug_abbrev?  Finally, remove all comments (emit them in the first case
> > just to better understand the debug info).
>
> I'm afraid it is hard to avoid the .quad or .8byte.
> Here is a 64-bit address version that assembles fine by both x86_64 and
> aarch64 as.
> Unfortunately doesn't fail with broken gas versions with -gdwarf-2 without
> the nop, so we'll need at least a nop in there.
> Fortunately gcc/configure.ac already determines the right nop insn for the
> target, in $insn.
> So I guess what we want next is have the 32-bit version of this with .4byte
> instead of .8byte and just let's try to assemble both versions, first
> without -gdwarf-2 and the one that succeeds assemble again with -gdwarf-2
> and check for the duplicate .debug_line sections error.

Ok, here it is in patch form.
I've briefly tested it, with the older binutils I have around (no --gdwarf-N
support), with latest gas (--gdwarf-N that can be passed to as even when
compiling C/C++ etc. code and emitting .debug_line) and latest gas with Mark's fix
reverted (--gdwarf-N support, but can only pass it to as when assembling
user .s/.S files, not when compiling C/C++ etc.).

2020-10-07  Jakub Jelinek  <jakub@redhat.com>

	* configure.ac (HAVE_AS_GDWARF_5_DEBUG_FLAG,
	HAVE_AS_WORKING_DWARF_4_FLAG): New tests.
	* gcc.c (ASM_DEBUG_DWARF_OPTION): Define.
	(ASM_DEBUG_SPEC): Use ASM_DEBUG_DWARF_OPTION instead of
	"--gdwarf2".  Use %{cond:opt1;:opt2} style.
	(ASM_DEBUG_OPTION_DWARF_OPT): Define.
	(ASM_DEBUG_OPTION_SPEC): Define.
	(asm_debug_option): New variable.
	(asm_options): Add "%(asm_debug_option)".
	(static_specs): Add asm_debug_option entry.
	(static_spec_functions): Add dwarf-version-gt.
	(debug_level_greater_than_spec_func): New function.
	* config/darwin.h (ASM_DEBUG_OPTION_SPEC): Define.
	* config/darwin9.h (ASM_DEBUG_OPTION_SPEC): Redefine.
	* config.in: Regenerated.
	* configure: Regenerated.
2020-10-07 10:55:35 +02:00
Jakub Jelinek
e91c34262d options: Avoid unused variable mask warning [PR97305]
> options-save.c: In function 'void cl_target_option_save(cl_target_option*, gcc_options*, gcc_options*)':
> options-save.c:8526:26: error: unused variable 'mask' [-Werror=unused-variable]
>  8526 |   unsigned HOST_WIDE_INT mask = 0;
>       |                          ^~~~
> options-save.c: In function 'void cl_target_option_restore(gcc_options*, gcc_options*, cl_target_option*)':
> options-save.c:8537:26: error: unused variable 'mask' [-Werror=unused-variable]
>  8537 |   unsigned HOST_WIDE_INT mask;
>       |                          ^~~~

Oops, missed that, sorry.

The following patch should fix that, tested on x86_64-linux make
options-save.c (same file as before) and -> ia64-linux cross make
options-save.o (no warning anymore, just the unwanted declarations gone).

2020-10-07  Jakub Jelinek  <jakub@redhat.com>

	PR bootstrap/97305
	* optc-save-gen.awk: Don't declare mask variable if explicit_mask
	array is not present.
2020-10-07 10:52:47 +02:00
Jakub Jelinek
83f565ed4f openmp: Improve composite simd vectorization
> > I was really hoping bbs 4 and 5 would be one loop (the one I set safelen
> > and force_vectorize etc. for) and that basic blocks 6 and 7 would be
> > together with that inner loop another loop, but apparently loop discovery
> > thinks it is just one loop.
> > Any ideas what I'm doing wrong or is there any way how to make it two loops
> > (that would also survive all the cfg cleanups until vectorization)?
>
> The early CFG looks like we have a common header with two latches
> so it boils down to how we disambiguate those in the end (we seem
> to unify the latches via a forwarder).  IIRC OMP lowering builds
> loops itself, could it not do the appropriate disambiguation itself?

I realized I emit the same stmts on both paths (before goto doit; and before
falling through it), at least the MIN_EXPR and PLUS_EXPR, so by forcing
there an extra bb which does those two and having the "doit" label before
that the innermost loop doesn't have multiple latches anymore and so is
vectorized fine.

2020-10-07  Jakub Jelinek  <jakub@redhat.com>

	* omp-expand.c (expand_omp_simd): Don't emit MIN_EXPR and PLUS_EXPR
	at the end of entry_bb and innermost init_bb, instead force arguments
	for MIN_EXPR into temporaries in both cases and jump to a new bb that
	performs MIN_EXPR and PLUS_EXPR.

	* gcc.dg/gomp/simd-2.c: New test.
	* gcc.dg/gomp/simd-3.c: New test.
2020-10-07 10:49:37 +02:00
Tom de Vries
ebc77ce3a4 [tree-ssa-loop-ch] Add missing NULL test for dump_file
If we change gimple_can_duplicate_bb_p to return false instead of true, we run
into a segfault in ch_base::copy_headers due to using dump_file while it's
NULL:
...
      if (!gimple_duplicate_sese_region (entry, exit, bbs, n_bbs, copied_bbs,
                                        true))
       {
         fprintf (dump_file, "Duplication failed.\n");
         continue;
       }
...

Fix this by adding the missing dump_file != NULL test.

Tested by rebuilding lto1 and rerunning the failing test-case.

gcc/ChangeLog:

2020-10-07  Tom de Vries  <tdevries@suse.de>

	* tree-ssa-loop-ch.c (ch_base::copy_headers): Add missing NULL test
	for dump_file.
2020-10-07 08:06:47 +02:00
GCC Administrator
8e97b9052d Daily bump. 2020-10-07 00:16:35 +00:00
Marek Polacek
85307b4e93 c++: typename in out-of-class member function definitions [PR97297]
I was notified that our P0634R3 (Down with typename) implementation has
a flaw: when we have an out-of-class member function definition, we
still required 'typename' for its parameters.  For example here:

  template <typename T> struct S {
    int simple(T::type);
  };
  template <typename T>
  int S<T>::simple(/* typename */T::type) { return 0; }

the 'typename' isn't necessary per [temp.res]/5.2.4.  We have a qualified
name here ("S<T>::simple") so we know it's already been declared so we
can look it up to see if it's a function template or a variable
template.

In this case, the P0634R3 code in cp_parser_direct_declarator wasn't
looking into uninstantiated templates and didn't find the member
function 'simple' -- cp_parser_lookup_name returned a SCOPE_REF which
means that the qualifying scope was dependent.  With this fix, we find
the BASELINK for 'simple', don't clear CP_PARSER_FLAGS_TYPENAME_OPTIONAL
from the flags, and the typename is implicitly assumed.

gcc/cp/ChangeLog:

	PR c++/97297
	* parser.c (cp_parser_direct_declarator): When checking if a
	name is a function template declaration for the P0634R3 case,
	look in uninstantiated templates too.

gcc/testsuite/ChangeLog:

	PR c++/97297
	* g++.dg/cpp2a/typename18.C: New test.
2020-10-06 17:35:30 -04:00
Tobias Burnus
a980220460 c-c++-common/goacc/declare-pr90861.c: Remove xfail
gcc/testsuite/ChangeLog
	PR middle-end/90861
	* c-c++-common/goacc/declare-pr90861.c: Remove xfail.
2020-10-06 23:34:21 +02:00
Nikhil Benesch
f5431aeaf5 compiler: avoid undefined behavior in Import::read
For some implementations of Stream, advancing the stream will invalidate
the previously-returned peek buffer. Copy the peek buffer before
advancing in Import::read to avoid this undefined behavior.

Reviewed-on: https://go-review.googlesource.com/c/gofrontend/+/259438
2020-10-06 13:53:42 -07:00
Andrew MacLeod
fcae512115 Hybrid EVRP and testcases
Provide a hybrid EVRP pass which uses legacy EVRP and adds additonal
enhancements from the new ranger infrastructure.
A New option is also provided, -fevrp-mode=
And adjust testcases

gcc/ChangeLog:

2020-10-06  Andrew MacLeod  <amacleod@redhat.com>

	* flag-types.h (enum evrp_mode): New enumerated type EVRP_MODE_*.
	* common.opt (fevrp-mode): New undocumented flag.
	* gimple-ssa-evrp.c: Include gimple-range.h
	(class rvrp_folder): EVRP folding using ranger exclusively.
	(rvrp_folder::rvrp_folder): New.
	(rvrp_folder::~rvrp_folder): New.
	(rvrp_folder::value_of_expr): New.  Use rangers value_of_expr.
	(rvrp_folder::value_on_edge): New.  Use rangers value_on_edge.
	(rvrp_folder::value_of_Stmt): New.  Use rangers value_of_stmt.
	(rvrp_folder::fold_stmt): New.  Call the simplifier.
	(class hybrid_folder): EVRP folding using both engines.
	(hybrid_folder::hybrid_folder): New.
	(hybrid_folder::~hybrid_folder): New.
	(hybrid_folder::fold_stmt): New.  Simplify with one engne, then the
	other.
	(hybrid_folder::value_of_expr): New.  Use both value routines.
	(hybrid_folder::value_on_edge): New.  Use both value routines.
	(hybrid_folder::value_of_stmt): New.  Use both value routines.
	(hybrid_folder::choose_value): New.  Choose between range_analzyer and
	rangers values.
	(execute_early_vrp): Choose a folder based on flag_evrp_mode.
	* vr-values.c (simplify_using_ranges::fold_cond): Try range_of_stmt
	first to see if it returns a value.
	(simplify_using_ranges::simplify_switch_using_ranges): Return true if
	any changes were made to the switch.

gcc/testsuite/ChangeLog:

2020-10-06  Andrew MacLeod  <amacleod@redhat.com>

	* gcc.dg/pr81192.c: Disable EVRP pass.
	* gcc.dg/tree-ssa/pr77445-2.c: Ditto.
	* gcc.dg/tree-ssa/ssa-dom-thread-6.c: Adjust.
	* gcc.dg/tree-ssa/ssa-dom-thread-7.c: Ditto.
2020-10-06 13:03:13 -04:00
Andrew MacLeod
90e88fd376 Ranger classes.
Add the 8 ranger files and the Makefile changes to build it.

2020-10-06  Andrew MacLeod  <amacleod@redhat.com>

	* Makefile.in (OBJS): Add gimple-range*.o.
	* gimple-range.h: New file.
	* gimple-range.cc: New file.
	* gimple-range-cache.h: New file.
	* gimple-range-cache.cc: New file.
	* gimple-range-edge.h: New file.
	* gimple-range-edge.cc: New file.
	* gimple-range-gori.h: New file.
	* gimple-range-gori.cc: New file.
2020-10-06 12:47:59 -04:00
Tom de Vries
1644d7f4c1 [openacc, libgomp, testsuite] Xfail declare-5.f90
We're currently running into:
...
FAIL: libgomp.oacc-fortran/declare-5.f90 -DACC_DEVICE_TYPE_nvidia=1 \
  -DACC_MEM_SHARED=0 -foffload=nvptx-none  -O0  execution test
FAIL: libgomp.oacc-fortran/declare-5.f90 -DACC_DEVICE_TYPE_nvidia=1 \
  -DACC_MEM_SHARED=0 -foffload=nvptx-none  -O1  execution test
FAIL: libgomp.oacc-fortran/declare-5.f90 -DACC_DEVICE_TYPE_nvidia=1 \
  -DACC_MEM_SHARED=0 -foffload=nvptx-none  -O2  execution test
FAIL: libgomp.oacc-fortran/declare-5.f90 -DACC_DEVICE_TYPE_nvidia=1 \
  -DACC_MEM_SHARED=0 -foffload=nvptx-none  -O3 -fomit-frame-pointer \
  -funroll-loops -fpeel-loops -ftracer -finline-functions  execution test
FAIL: libgomp.oacc-fortran/declare-5.f90 -DACC_DEVICE_TYPE_nvidia=1 \
  -DACC_MEM_SHARED=0 -foffload=nvptx-none  -O3 -g  execution test
FAIL: libgomp.oacc-fortran/declare-5.f90 -DACC_DEVICE_TYPE_nvidia=1 \
  -DACC_MEM_SHARED=0 -foffload=nvptx-none  -Os  execution test
...

A PR was filed for this: PR92790 - "[OpenACC] declare device_resident -
Fortran common blocks not handled / libgomp.oacc-fortran/declare-5.f90 fails"

Xfail the fails.

Tested on x86_64-linux with nvptx accelerator.

libgomp/ChangeLog:

2020-10-06  Tom de Vries  <tdevries@suse.de>

	* testsuite/libgomp.oacc-fortran/declare-5.f90: Add xfail for PR92790.
2020-10-06 18:43:24 +02:00
Jonathan Wakely
1352ea1925 libstdc++: Inline std::exception_ptr members [PR 90295]
This inlines most members of std::exception_ptr so that all operations
on a null exception_ptr can be optimized away. This benefits code like
std::future and coroutines where an exception_ptr object is present to
cope with exceptional cases, but is usually not used and remains null.

Since those functions were previously non-inline we have to continue to
export them from the library, for objects that were compiled against the
old headers and expect to find definitions in the library.

In order to inline the copy constructor and destructor we need to export
the _M_addref() and _M_release() members that increment/decrement the
reference count when copying/destroying a non-null exception_ptr. The
copy ctor and dtor check for null and don't call _M_addref and
_M_release unless they need to. The checks for null pointers in
_M_addref and _M_release are still needed because old code might call
them without checking for null first. But we can use __builtin_expect to
predict that they are usually called for the non-null case.

libstdc++-v3/ChangeLog:

	PR libstdc++/90295
	* config/abi/pre/gnu.ver (CXXABI_1.3.13): New symbol version.
	(exception_ptr::_M_addref(), exception_ptr::_M_release()):
	Export symbols.
	* libsupc++/eh_ptr.cc (exception_ptr::exception_ptr()):
	Remove out-of-line definition.
	(exception_ptr::exception_ptr(const exception_ptr&)):
	Likewise.
	(exception_ptr::~exception_ptr()): Likewise.
	(exception_ptr::operator=(const exception_ptr&)):
	Likewise.
	(exception_ptr::swap(exception_ptr&)): Likewise.
	(exception_ptr::_M_addref()): Add branch prediction.
	* libsupc++/exception_ptr.h (exception_ptr::operator bool):
	Add noexcept.
	[!_GLIBCXX_EH_PTR_COMPAT] (operator==, operator!=): Define
	inline as hidden friends. Remove declarations at namespace
	scope.
	(exception_ptr::exception_ptr()): Define inline.
	(exception_ptr::exception_ptr(const exception_ptr&)):
	Likewise.
	(exception_ptr::~exception_ptr()): Likewise.
	(exception_ptr::operator=(const exception_ptr&)):
	Likewise.
	(exception_ptr::swap(exception_ptr&)): Likewise.
	* testsuite/util/testsuite_abi.cc: Add CXXABI_1.3.13.
	* testsuite/18_support/exception_ptr/90295.cc: New test.
2020-10-06 17:24:16 +01:00
Dennis Zhang
29c650cd89 arm: Enable MVE SIMD modes for vectorization
This patch enables SIMD modes for MVE auto-vectorization.
In this patch, the integer and float MVE SIMD modes are returned by
arm_preferred_simd_mode (TARGET_VECTORIZE_PREFERRED_SIMD_MODE hook) when
MVE or MVE_FLOAT is enabled. Then the expanders for auto-vectorization
can be used for generating MVE SIMD code.

This patch also fixes bugs in MVE vreiterpretq_*.c tests which are
revealed by the enabled MVE SIMD modes.
The tests are for checking the MVE reinterpret intrinsics.
There are two functions in each of the tests. The two functions contain
the pattern of identical code so that they are folded in icf pass.
Because of icf, the instruction count only checks one function which is
8. However when the SIMD modes are enabled, the estimation of the code
size becomes smaller so that inlining is applied after icf, then the
instruction count becomes 16 which causes failure of the tests.
Because the icf is not the expected pattern to be tested but causes
above issues, -fno-ipa-icf is applied to the tests to avoid unstable
instruction count.

gcc/ChangeLog:

2020-10-05  Dennis Zhang  <dennis.zhang@arm.com>

	* config/arm/arm.c (arm_preferred_simd_mode): Enable MVE SIMD modes.

gcc/testsuite/ChangeLog:

2020-10-05  Dennis Zhang  <dennis.zhang@arm.com>

	* gcc.target/arm/mve/intrinsics/vreinterpretq_f16.c: Use additional
	option -fno-ipa-icf and change the instruction count from 8 to 16.
	* gcc.target/arm/mve/intrinsics/vreinterpretq_f32.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vreinterpretq_s16.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vreinterpretq_s32.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vreinterpretq_s64.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vreinterpretq_s8.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vreinterpretq_u16.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vreinterpretq_u32.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vreinterpretq_u64.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vreinterpretq_u8.c: Likewise.
2020-10-06 16:53:46 +01:00
Tom de Vries
3f2e15c2e6 [openacc] Fix acc declare for VLAs
Consider test-case test.c, with VLA A:
...
int main (void) {
  int N = 1000;
  int A[N];
  #pragma acc declare copy(A)
  return 0;
}
...
compiled using:
...
$ gcc test.c -fopenacc -S -fdump-tree-all
...

At original, we have:
...
  #pragma acc declare map(tofrom:A);
...
but at gimple, we have a map (to:A.1), but not a map (from:A.1):
...
  int[0:D.2074] * A.1;

  {
    int A[0:D.2074] [value-expr: *A.1];

    saved_stack.2 = __builtin_stack_save ();
    try
      {
        A.1 = __builtin_alloca_with_align (D.2078, 32);
        #pragma omp target oacc_declare map(to:(*A.1) [len: D.2076])
      }
    finally
      {
        __builtin_stack_restore (saved_stack.2);
      }
  }
...

This is caused by the following incompatibility.  When storing the desired
from clause in oacc_declare_returns, we use 'A.1' as the key:
...
10898                 oacc_declare_returns->put (decl, c);
(gdb) call debug_generic_expr (decl)
A.1
(gdb) call debug_generic_expr (c)
map(from:(*A.1))
...
but when looking it up, we use 'A' as the key:
...
(gdb)
1471                  tree *c = oacc_declare_returns->get (t);
(gdb) call debug_generic_expr (t)
A
...

Fix this by extracing the 'A.1' lookup key from 'A' using the decl-expr.

In addition, unshare the looked up value, to fix avoid running into
an "incorrect sharing of tree nodes" error.

Using these two fixes, we get our desired:
...
     finally
       {
+        #pragma omp target oacc_declare map(from:(*A.1))
         __builtin_stack_restore (saved_stack.2);
       }
...

Build on x86_64-linux with nvptx accelerator, tested libgomp.

gcc/ChangeLog:

2020-10-06  Tom de Vries  <tdevries@suse.de>

	PR middle-end/90861
	* gimplify.c (gimplify_bind_expr): Handle lookup in
	oacc_declare_returns using key with decl-expr.

libgomp/ChangeLog:

2020-10-06  Tom de Vries  <tdevries@suse.de>

	PR middle-end/90861
	* testsuite/libgomp.oacc-c-c++-common/declare-vla.c: Remove xfail.
2020-10-06 16:50:22 +02:00
Martin Liska
190c04ba36 lto: fix LTO debug sections copying.
readelf -S prints:

There are 81999 section headers, starting at offset 0x1f488060:

Section Headers:
  [Nr] Name              Type            Address          Off    Size   ES Flg Lk Inf Al
  [ 0]                   NULL            0000000000000000 000000 01404f 00     81998   0  0
  [ 1] .group            GROUP           0000000000000000 000040 000008 04     81995 105027  4
...
  [81995] .symtab           SYMTAB          0000000000000000 d5d9298 2db310 18     81997 105026  8
  [81996] .symtab_shndx     SYMTAB SECTION INDICES 0000000000000000 d8b45a8 079dd8 04     81995   0  4
  [81997] .strtab           STRTAB          0000000000000000 d92e380 80460c 00      0   0  1
...

Looking at the documentation:
Table 7–15 ELF sh_link and sh_info Interpretation

sh_type - sh_link
SHT_SYMTAB - The section header index of the associated string table.
SHT_SYMTAB_SHNDX - The section header index of the associated symbol table.

As seen, sh_link of a SHT_SYMTAB always points to a .strtab and readelf
confirms that.

So we need to use reverse mapping taken from
  [81996] .symtab_shndx     SYMTAB SECTION INDICES 0000000000000000 d8b45a8 079dd8 04     81995   0  4

where sh_link points to 81995.

libiberty/ChangeLog:

	PR lto/97290
	* simple-object-elf.c (simple_object_elf_copy_lto_debug_sections):
	Use sh_link of a .symtab_shndx section.
2020-10-06 16:07:02 +02:00
Srinath Parvathaneni
a9a88a0a55 [PATCH][GCC] arm: Move iterators from mve.md to iterators.md to maintain consistency.
To maintain consistency with other Arm Architectures backend, iterators and iterator attributes are moved
from mve.md file to iterators.md. Also move enumerators for MVE unspecs from mve.md file to unspecs.md file.

gcc/ChangeLog:

2020-10-06  Srinath Parvathaneni  <srinath.parvathaneni@arm.com>

	* config/arm/iterators.md (MVE_types): Move mode iterator from mve.md to
	iterators.md.
	(MVE_VLD_ST): Likewise.
	(MVE_0): Likewise.
	(MVE_1): Likewise.
	(MVE_3): Likewise.
	(MVE_2): Likewise.
	(MVE_5): Likewise.
	(MVE_6): Likewise.
	(MVE_CNVT): Move mode attribute iterator from mve.md to iterators.md.
	(MVE_LANES): Likewise.
	(MVE_constraint): Likewise.
	(MVE_constraint1): Likewise.
	(MVE_constraint2): Likewise.
	(MVE_constraint3): Likewise.
	(MVE_pred): Likewise.
	(MVE_pred1): Likewise.
	(MVE_pred2): Likewise.
	(MVE_pred3): Likewise.
	(MVE_B_ELEM): Likewise.
	(MVE_H_ELEM): Likewise.
	(V_sz_elem1): Likewise.
	(V_extr_elem): Likewise.
	(earlyclobber_32): Likewise.
	(supf): Move int attribute from mve.md to iterators.md.
	(mode1): Likewise.
	(VCVTQ_TO_F): Move int iterator from mve.md to iterators.md.
	(VMVNQ_N): Likewise.
	(VREV64Q): Likewise.
	(VCVTQ_FROM_F): Likewise.
	(VREV16Q): Likewise.
	(VCVTAQ): Likewise.
	(VMVNQ): Likewise.
	(VDUPQ_N): Likewise.
	(VCLZQ): Likewise.
	(VADDVQ): Likewise.
	(VREV32Q): Likewise.
	(VMOVLBQ): Likewise.
	(VMOVLTQ): Likewise.
	(VCVTPQ): Likewise.
	(VCVTNQ): Likewise.
	(VCVTMQ): Likewise.
	(VADDLVQ): Likewise.
	(VCTPQ): Likewise.
	(VCTPQ_M): Likewise.
	(VCVTQ_N_TO_F): Likewise.
	(VCREATEQ): Likewise.
	(VSHRQ_N): Likewise.
	(VCVTQ_N_FROM_F): Likewise.
	(VADDLVQ_P): Likewise.
	(VCMPNEQ): Likewise.
	(VSHLQ): Likewise.
	(VABDQ): Likewise.
	(VADDQ_N): Likewise.
	(VADDVAQ): Likewise.
	(VADDVQ_P): Likewise.
	(VANDQ): Likewise.
	(VBICQ): Likewise.
	(VBRSRQ_N): Likewise.
	(VCADDQ_ROT270): Likewise.
	(VCADDQ_ROT90): Likewise.
	(VCMPEQQ): Likewise.
	(VCMPEQQ_N): Likewise.
	(VCMPNEQ_N): Likewise.
	(VEORQ): Likewise.
	(VHADDQ): Likewise.
	(VHADDQ_N): Likewise.
	(VHSUBQ): Likewise.
	(VHSUBQ_N): Likewise.
	(VMAXQ): Likewise.
	(VMAXVQ): Likewise.
	(VMINQ): Likewise.
	(VMINVQ): Likewise.
	(VMLADAVQ): Likewise.
	(VMULHQ): Likewise.
	(VMULLBQ_INT): Likewise.
	(VMULLTQ_INT): Likewise.
	(VMULQ): Likewise.
	(VMULQ_N): Likewise.
	(VORNQ): Likewise.
	(VORRQ): Likewise.
	(VQADDQ): Likewise.
	(VQADDQ_N): Likewise.
	(VQRSHLQ): Likewise.
	(VQRSHLQ_N): Likewise.
	(VQSHLQ): Likewise.
	(VQSHLQ_N): Likewise.
	(VQSHLQ_R): Likewise.
	(VQSUBQ): Likewise.
	(VQSUBQ_N): Likewise.
	(VRHADDQ): Likewise.
	(VRMULHQ): Likewise.
	(VRSHLQ): Likewise.
	(VRSHLQ_N): Likewise.
	(VRSHRQ_N): Likewise.
	(VSHLQ_N): Likewise.
	(VSHLQ_R): Likewise.
	(VSUBQ): Likewise.
	(VSUBQ_N): Likewise.
	(VADDLVAQ): Likewise.
	(VBICQ_N): Likewise.
	(VMLALDAVQ): Likewise.
	(VMLALDAVXQ): Likewise.
	(VMOVNBQ): Likewise.
	(VMOVNTQ): Likewise.
	(VORRQ_N): Likewise.
	(VQMOVNBQ): Likewise.
	(VQMOVNTQ): Likewise.
	(VSHLLBQ_N): Likewise.
	(VSHLLTQ_N): Likewise.
	(VRMLALDAVHQ): Likewise.
	(VBICQ_M_N): Likewise.
	(VCVTAQ_M): Likewise.
	(VCVTQ_M_TO_F): Likewise.
	(VQRSHRNBQ_N): Likewise.
	(VABAVQ): Likewise.
	(VSHLCQ): Likewise.
	(VRMLALDAVHAQ): Likewise.
	(VADDVAQ_P): Likewise.
	(VCLZQ_M): Likewise.
	(VCMPEQQ_M_N): Likewise.
	(VCMPEQQ_M): Likewise.
	(VCMPNEQ_M_N): Likewise.
	(VCMPNEQ_M): Likewise.
	(VDUPQ_M_N): Likewise.
	(VMAXVQ_P): Likewise.
	(VMINVQ_P): Likewise.
	(VMLADAVAQ): Likewise.
	(VMLADAVQ_P): Likewise.
	(VMLAQ_N): Likewise.
	(VMLASQ_N): Likewise.
	(VMVNQ_M): Likewise.
	(VPSELQ): Likewise.
	(VQDMLAHQ_N): Likewise.
	(VQRDMLAHQ_N): Likewise.
	(VQRDMLASHQ_N): Likewise.
	(VQRSHLQ_M_N): Likewise.
	(VQSHLQ_M_R): Likewise.
	(VREV64Q_M): Likewise.
	(VRSHLQ_M_N): Likewise.
	(VSHLQ_M_R): Likewise.
	(VSLIQ_N): Likewise.
	(VSRIQ_N): Likewise.
	(VMLALDAVQ_P): Likewise.
	(VQMOVNBQ_M): Likewise.
	(VMOVLTQ_M): Likewise.
	(VMOVNBQ_M): Likewise.
	(VRSHRNTQ_N): Likewise.
	(VORRQ_M_N): Likewise.
	(VREV32Q_M): Likewise.
	(VREV16Q_M): Likewise.
	(VQRSHRNTQ_N): Likewise.
	(VMOVNTQ_M): Likewise.
	(VMOVLBQ_M): Likewise.
	(VMLALDAVAQ): Likewise.
	(VQSHRNBQ_N): Likewise.
	(VSHRNBQ_N): Likewise.
	(VRSHRNBQ_N): Likewise.
	(VMLALDAVXQ_P): Likewise.
	(VQMOVNTQ_M): Likewise.
	(VMVNQ_M_N): Likewise.
	(VQSHRNTQ_N): Likewise.
	(VMLALDAVAXQ): Likewise.
	(VSHRNTQ_N): Likewise.
	(VCVTMQ_M): Likewise.
	(VCVTNQ_M): Likewise.
	(VCVTPQ_M): Likewise.
	(VCVTQ_M_N_FROM_F): Likewise.
	(VCVTQ_M_FROM_F): Likewise.
	(VRMLALDAVHQ_P): Likewise.
	(VADDLVAQ_P): Likewise.
	(VABAVQ_P): Likewise.
	(VSHLQ_M): Likewise.
	(VSRIQ_M_N): Likewise.
	(VSUBQ_M): Likewise.
	(VCVTQ_M_N_TO_F): Likewise.
	(VHSUBQ_M): Likewise.
	(VSLIQ_M_N): Likewise.
	(VRSHLQ_M): Likewise.
	(VMINQ_M): Likewise.
	(VMULLBQ_INT_M): Likewise.
	(VMULHQ_M): Likewise.
	(VMULQ_M): Likewise.
	(VHSUBQ_M_N): Likewise.
	(VHADDQ_M_N): Likewise.
	(VORRQ_M): Likewise.
	(VRMULHQ_M): Likewise.
	(VQADDQ_M): Likewise.
	(VRSHRQ_M_N): Likewise.
	(VQSUBQ_M_N): Likewise.
	(VADDQ_M): Likewise.
	(VORNQ_M): Likewise.
	(VRHADDQ_M): Likewise.
	(VQSHLQ_M): Likewise.
	(VANDQ_M): Likewise.
	(VBICQ_M): Likewise.
	(VSHLQ_M_N): Likewise.
	(VCADDQ_ROT270_M): Likewise.
	(VQRSHLQ_M): Likewise.
	(VQADDQ_M_N): Likewise.
	(VADDQ_M_N): Likewise.
	(VMAXQ_M): Likewise.
	(VQSUBQ_M): Likewise.
	(VMLASQ_M_N): Likewise.
	(VMLADAVAQ_P): Likewise.
	(VBRSRQ_M_N): Likewise.
	(VMULQ_M_N): Likewise.
	(VCADDQ_ROT90_M): Likewise.
	(VMULLTQ_INT_M): Likewise.
	(VEORQ_M): Likewise.
	(VSHRQ_M_N): Likewise.
	(VSUBQ_M_N): Likewise.
	(VHADDQ_M): Likewise.
	(VABDQ_M): Likewise.
	(VMLAQ_M_N): Likewise.
	(VQSHLQ_M_N): Likewise.
	(VMLALDAVAQ_P): Likewise.
	(VMLALDAVAXQ_P): Likewise.
	(VQRSHRNBQ_M_N): Likewise.
	(VQRSHRNTQ_M_N): Likewise.
	(VQSHRNBQ_M_N): Likewise.
	(VQSHRNTQ_M_N): Likewise.
	(VRSHRNBQ_M_N): Likewise.
	(VRSHRNTQ_M_N): Likewise.
	(VSHLLBQ_M_N): Likewise.
	(VSHLLTQ_M_N): Likewise.
	(VSHRNBQ_M_N): Likewise.
	(VSHRNTQ_M_N): Likewise.
	(VSTRWSBQ): Likewise.
	(VSTRBSOQ): Likewise.
	(VSTRBQ): Likewise.
	(VLDRBGOQ): Likewise.
	(VLDRBQ): Likewise.
	(VLDRWGBQ): Likewise.
	(VLD1Q): Likewise.
	(VLDRHGOQ): Likewise.
	(VLDRHGSOQ): Likewise.
	(VLDRHQ): Likewise.
	(VLDRWQ): Likewise.
	(VLDRDGBQ): Likewise.
	(VLDRDGOQ): Likewise.
	(VLDRDGSOQ): Likewise.
	(VLDRWGOQ): Likewise.
	(VLDRWGSOQ): Likewise.
	(VST1Q): Likewise.
	(VSTRHSOQ): Likewise.
	(VSTRHSSOQ): Likewise.
	(VSTRHQ): Likewise.
	(VSTRWQ): Likewise.
	(VSTRDSBQ): Likewise.
	(VSTRDSOQ): Likewise.
	(VSTRDSSOQ): Likewise.
	(VSTRWSOQ): Likewise.
	(VSTRWSSOQ): Likewise.
	(VSTRWSBWBQ): Likewise.
	(VLDRWGBWBQ): Likewise.
	(VSTRDSBWBQ): Likewise.
	(VLDRDGBWBQ): Likewise.
	(VADCIQ): Likewise.
	(VADCIQ_M): Likewise.
	(VSBCQ): Likewise.
	(VSBCQ_M): Likewise.
	(VSBCIQ): Likewise.
	(VSBCIQ_M): Likewise.
	(VADCQ): Likewise.
	(VADCQ_M): Likewise.
	(UQRSHLLQ): Likewise.
	(SQRSHRLQ): Likewise.
	(VSHLCQ_M): Likewise.
	* config/arm/mve.md (MVE_types): Move mode iterator to iterators.md from mve.md.
	(MVE_VLD_ST): Likewise.
	(MVE_0): Likewise.
	(MVE_1): Likewise.
	(MVE_3): Likewise.
	(MVE_2): Likewise.
	(MVE_5): Likewise.
	(MVE_6): Likewise.
	(MVE_CNVT): Move mode attribute iterator to iterators.md from mve.md.
	(MVE_LANES): Likewise.
	(MVE_constraint): Likewise.
	(MVE_constraint1): Likewise.
	(MVE_constraint2): Likewise.
	(MVE_constraint3): Likewise.
	(MVE_pred): Likewise.
	(MVE_pred1): Likewise.
	(MVE_pred2): Likewise.
	(MVE_pred3): Likewise.
	(MVE_B_ELEM): Likewise.
	(MVE_H_ELEM): Likewise.
	(V_sz_elem1): Likewise.
	(V_extr_elem): Likewise.
	(earlyclobber_32): Likewise.
	(supf): Move int attribute to iterators.md from mve.md.
	(mode1): Likewise.
	(VCVTQ_TO_F): Move int iterator to iterators.md from mve.md.
	(VMVNQ_N): Likewise.
	(VREV64Q): Likewise.
	(VCVTQ_FROM_F): Likewise.
	(VREV16Q): Likewise.
	(VCVTAQ): Likewise.
	(VMVNQ): Likewise.
	(VDUPQ_N): Likewise.
	(VCLZQ): Likewise.
	(VADDVQ): Likewise.
	(VREV32Q): Likewise.
	(VMOVLBQ): Likewise.
	(VMOVLTQ): Likewise.
	(VCVTPQ): Likewise.
	(VCVTNQ): Likewise.
	(VCVTMQ): Likewise.
	(VADDLVQ): Likewise.
	(VCTPQ): Likewise.
	(VCTPQ_M): Likewise.
	(VCVTQ_N_TO_F): Likewise.
	(VCREATEQ): Likewise.
	(VSHRQ_N): Likewise.
	(VCVTQ_N_FROM_F): Likewise.
	(VADDLVQ_P): Likewise.
	(VCMPNEQ): Likewise.
	(VSHLQ): Likewise.
	(VABDQ): Likewise.
	(VADDQ_N): Likewise.
	(VADDVAQ): Likewise.
	(VADDVQ_P): Likewise.
	(VANDQ): Likewise.
	(VBICQ): Likewise.
	(VBRSRQ_N): Likewise.
	(VCADDQ_ROT270): Likewise.
	(VCADDQ_ROT90): Likewise.
	(VCMPEQQ): Likewise.
	(VCMPEQQ_N): Likewise.
	(VCMPNEQ_N): Likewise.
	(VEORQ): Likewise.
	(VHADDQ): Likewise.
	(VHADDQ_N): Likewise.
	(VHSUBQ): Likewise.
	(VHSUBQ_N): Likewise.
	(VMAXQ): Likewise.
	(VMAXVQ): Likewise.
	(VMINQ): Likewise.
	(VMINVQ): Likewise.
	(VMLADAVQ): Likewise.
	(VMULHQ): Likewise.
	(VMULLBQ_INT): Likewise.
	(VMULLTQ_INT): Likewise.
	(VMULQ): Likewise.
	(VMULQ_N): Likewise.
	(VORNQ): Likewise.
	(VORRQ): Likewise.
	(VQADDQ): Likewise.
	(VQADDQ_N): Likewise.
	(VQRSHLQ): Likewise.
	(VQRSHLQ_N): Likewise.
	(VQSHLQ): Likewise.
	(VQSHLQ_N): Likewise.
	(VQSHLQ_R): Likewise.
	(VQSUBQ): Likewise.
	(VQSUBQ_N): Likewise.
	(VRHADDQ): Likewise.
	(VRMULHQ): Likewise.
	(VRSHLQ): Likewise.
	(VRSHLQ_N): Likewise.
	(VRSHRQ_N): Likewise.
	(VSHLQ_N): Likewise.
	(VSHLQ_R): Likewise.
	(VSUBQ): Likewise.
	(VSUBQ_N): Likewise.
	(VADDLVAQ): Likewise.
	(VBICQ_N): Likewise.
	(VMLALDAVQ): Likewise.
	(VMLALDAVXQ): Likewise.
	(VMOVNBQ): Likewise.
	(VMOVNTQ): Likewise.
	(VORRQ_N): Likewise.
	(VQMOVNBQ): Likewise.
	(VQMOVNTQ): Likewise.
	(VSHLLBQ_N): Likewise.
	(VSHLLTQ_N): Likewise.
	(VRMLALDAVHQ): Likewise.
	(VBICQ_M_N): Likewise.
	(VCVTAQ_M): Likewise.
	(VCVTQ_M_TO_F): Likewise.
	(VQRSHRNBQ_N): Likewise.
	(VABAVQ): Likewise.
	(VSHLCQ): Likewise.
	(VRMLALDAVHAQ): Likewise.
	(VADDVAQ_P): Likewise.
	(VCLZQ_M): Likewise.
	(VCMPEQQ_M_N): Likewise.
	(VCMPEQQ_M): Likewise.
	(VCMPNEQ_M_N): Likewise.
	(VCMPNEQ_M): Likewise.
	(VDUPQ_M_N): Likewise.
	(VMAXVQ_P): Likewise.
	(VMINVQ_P): Likewise.
	(VMLADAVAQ): Likewise.
	(VMLADAVQ_P): Likewise.
	(VMLAQ_N): Likewise.
	(VMLASQ_N): Likewise.
	(VMVNQ_M): Likewise.
	(VPSELQ): Likewise.
	(VQDMLAHQ_N): Likewise.
	(VQRDMLAHQ_N): Likewise.
	(VQRDMLASHQ_N): Likewise.
	(VQRSHLQ_M_N): Likewise.
	(VQSHLQ_M_R): Likewise.
	(VREV64Q_M): Likewise.
	(VRSHLQ_M_N): Likewise.
	(VSHLQ_M_R): Likewise.
	(VSLIQ_N): Likewise.
	(VSRIQ_N): Likewise.
	(VMLALDAVQ_P): Likewise.
	(VQMOVNBQ_M): Likewise.
	(VMOVLTQ_M): Likewise.
	(VMOVNBQ_M): Likewise.
	(VRSHRNTQ_N): Likewise.
	(VORRQ_M_N): Likewise.
	(VREV32Q_M): Likewise.
	(VREV16Q_M): Likewise.
	(VQRSHRNTQ_N): Likewise.
	(VMOVNTQ_M): Likewise.
	(VMOVLBQ_M): Likewise.
	(VMLALDAVAQ): Likewise.
	(VQSHRNBQ_N): Likewise.
	(VSHRNBQ_N): Likewise.
	(VRSHRNBQ_N): Likewise.
	(VMLALDAVXQ_P): Likewise.
	(VQMOVNTQ_M): Likewise.
	(VMVNQ_M_N): Likewise.
	(VQSHRNTQ_N): Likewise.
	(VMLALDAVAXQ): Likewise.
	(VSHRNTQ_N): Likewise.
	(VCVTMQ_M): Likewise.
	(VCVTNQ_M): Likewise.
	(VCVTPQ_M): Likewise.
	(VCVTQ_M_N_FROM_F): Likewise.
	(VCVTQ_M_FROM_F): Likewise.
	(VRMLALDAVHQ_P): Likewise.
	(VADDLVAQ_P): Likewise.
	(VABAVQ_P): Likewise.
	(VSHLQ_M): Likewise.
	(VSRIQ_M_N): Likewise.
	(VSUBQ_M): Likewise.
	(VCVTQ_M_N_TO_F): Likewise.
	(VHSUBQ_M): Likewise.
	(VSLIQ_M_N): Likewise.
	(VRSHLQ_M): Likewise.
	(VMINQ_M): Likewise.
	(VMULLBQ_INT_M): Likewise.
	(VMULHQ_M): Likewise.
	(VMULQ_M): Likewise.
	(VHSUBQ_M_N): Likewise.
	(VHADDQ_M_N): Likewise.
	(VORRQ_M): Likewise.
	(VRMULHQ_M): Likewise.
	(VQADDQ_M): Likewise.
	(VRSHRQ_M_N): Likewise.
	(VQSUBQ_M_N): Likewise.
	(VADDQ_M): Likewise.
	(VORNQ_M): Likewise.
	(VRHADDQ_M): Likewise.
	(VQSHLQ_M): Likewise.
	(VANDQ_M): Likewise.
	(VBICQ_M): Likewise.
	(VSHLQ_M_N): Likewise.
	(VCADDQ_ROT270_M): Likewise.
	(VQRSHLQ_M): Likewise.
	(VQADDQ_M_N): Likewise.
	(VADDQ_M_N): Likewise.
	(VMAXQ_M): Likewise.
	(VQSUBQ_M): Likewise.
	(VMLASQ_M_N): Likewise.
	(VMLADAVAQ_P): Likewise.
	(VBRSRQ_M_N): Likewise.
	(VMULQ_M_N): Likewise.
	(VCADDQ_ROT90_M): Likewise.
	(VMULLTQ_INT_M): Likewise.
	(VEORQ_M): Likewise.
	(VSHRQ_M_N): Likewise.
	(VSUBQ_M_N): Likewise.
	(VHADDQ_M): Likewise.
	(VABDQ_M): Likewise.
	(VMLAQ_M_N): Likewise.
	(VQSHLQ_M_N): Likewise.
	(VMLALDAVAQ_P): Likewise.
	(VMLALDAVAXQ_P): Likewise.
	(VQRSHRNBQ_M_N): Likewise.
	(VQRSHRNTQ_M_N): Likewise.
	(VQSHRNBQ_M_N): Likewise.
	(VQSHRNTQ_M_N): Likewise.
	(VRSHRNBQ_M_N): Likewise.
	(VRSHRNTQ_M_N): Likewise.
	(VSHLLBQ_M_N): Likewise.
	(VSHLLTQ_M_N): Likewise.
	(VSHRNBQ_M_N): Likewise.
	(VSHRNTQ_M_N): Likewise.
	(VSTRWSBQ): Likewise.
	(VSTRBSOQ): Likewise.
	(VSTRBQ): Likewise.
	(VLDRBGOQ): Likewise.
	(VLDRBQ): Likewise.
	(VLDRWGBQ): Likewise.
	(VLD1Q): Likewise.
	(VLDRHGOQ): Likewise.
	(VLDRHGSOQ): Likewise.
	(VLDRHQ): Likewise.
	(VLDRWQ): Likewise.
	(VLDRDGBQ): Likewise.
	(VLDRDGOQ): Likewise.
	(VLDRDGSOQ): Likewise.
	(VLDRWGOQ): Likewise.
	(VLDRWGSOQ): Likewise.
	(VST1Q): Likewise.
	(VSTRHSOQ): Likewise.
	(VSTRHSSOQ): Likewise.
	(VSTRHQ): Likewise.
	(VSTRWQ): Likewise.
	(VSTRDSBQ): Likewise.
	(VSTRDSOQ): Likewise.
	(VSTRDSSOQ): Likewise.
	(VSTRWSOQ): Likewise.
	(VSTRWSSOQ): Likewise.
	(VSTRWSBWBQ): Likewise.
	(VLDRWGBWBQ): Likewise.
	(VSTRDSBWBQ): Likewise.
	(VLDRDGBWBQ): Likewise.
	(VADCIQ): Likewise.
	(VADCIQ_M): Likewise.
	(VSBCQ): Likewise.
	(VSBCQ_M): Likewise.
	(VSBCIQ): Likewise.
	(VSBCIQ_M): Likewise.
	(VADCQ): Likewise.
	(VADCQ_M): Likewise.
	(UQRSHLLQ): Likewise.
	(SQRSHRLQ): Likewise.
	(VSHLCQ_M): Likewise.
	(define_c_enum "unspec"): Move MVE enumerator to unspecs.md from mve.md.
	* config/arm/unspecs.md (define_c_enum "unspec"): Move MVE enumerator from
	mve.md to unspecs.md.
2020-10-06 14:58:26 +01:00
Martin Liska
a30d4fc519 dbgcnt: print list after compilation
gcc/ChangeLog:

	* common.opt: Remove -fdbg-cnt-list from deferred options.
	* dbgcnt.c (dbg_cnt_set_limit_by_index): Make a copy
	to original_limits.
	(dbg_cnt_list_all_counters): Print also current counter value
	and print to stderr.
	* opts-global.c (handle_common_deferred_options): Do not handle
	-fdbg-cnt-list.
	* opts.c (common_handle_option): Likewise.
	* toplev.c (finalize): Handle it after compilation here.
2020-10-06 15:49:42 +02:00
Martin Liska
8988ec5b42 dbgcnt: report upper limit when lower == upper
gcc/ChangeLog:

	* dbgcnt.c (dbg_cnt): Report also upper limit.
2020-10-06 12:22:39 +02:00
Tobias Burnus
c0d0a722da configure: Fix in-tree building of GMP on BSD [PR97302]
ChangeLog:
	PR target/97302
	* configure.ac: Only set with_gmp to /usr/local
	if not building in tree.
	* configure: Regenerate.
2020-10-06 11:49:34 +02:00
Tom de Vries
e6d995fdde [ftracer] Add caching of can_duplicate_bb_p
The fix "[omp, ftracer] Don't duplicate blocks in SIMT region" adds iteration
over insns in ignore_bb_p, which makes it more expensive.

Counteract this by piggybacking the computation of can_duplicate_bb_p onto
count_insns, which is called at the start of ftracer.

Bootstrapped and reg-tested on x86_64-linux.

gcc/ChangeLog:

2020-10-05  Tom de Vries  <tdevries@suse.de>

	* tracer.c (count_insns): Rename to ...
	(analyze_bb): ... this.
	(cache_can_duplicate_bb_p, cached_can_duplicate_bb_p): New function.
	(ignore_bb_p): Use cached_can_duplicate_bb_p.
	(tail_duplicate): Call cache_can_duplicate_bb_p.
2020-10-06 11:23:09 +02:00
Tom de Vries
9d63e3ab40 [ftracer] Factor out can_duplicate_bb_p
Factor out can_duplicate_bb_p out of ignore_bb_p.

Also factor out can_duplicate_insn_p and can_duplicate_bb_no_insn_iter_p to
expose the parts of can_duplicate_bb_p that are per-bb and per-insn.

Bootstrapped and reg-tested on x86_64-linux.

gcc/ChangeLog:

2020-10-05  Tom de Vries  <tdevries@suse.de>

	* tracer.c (can_duplicate_insn_p, can_duplicate_bb_no_insn_iter_p)
	(can_duplicate_bb_p): New function, factored out of ...
	(ignore_bb_p): ... here.
2020-10-06 11:23:08 +02:00
Jonathan Wakely
9065c4adab libstdc++: Avoid CTAD for std::ranges::join_view [LWG 3474]
In commit ef275d1f2083f8a1fa1b59a3cd07fd3e8431023e I implemented the
wrong resolution of LWG 3474. This removes the deduction guide and
alters the views::join factory to create the right type explicitly.

libstdc++-v3/ChangeLog:

	* include/std/ranges (join_view): Remove deduction guide.
	(views::join): Add explicit template argument list to prevent
	deducing the wrong type.
	* testsuite/std/ranges/adaptors/join.cc: Move test for LWG 3474
	here, from ...
	* testsuite/std/ranges/adaptors/join_lwg3474.cc: Removed.
2020-10-06 09:41:40 +01:00
Jakub Jelinek
bf510679bb divmod: Match and expand DIVMOD even in some cases of constant divisor [PR97282]
As written in the comment, tree-ssa-math-opts.c wouldn't create a DIVMOD
ifn call for division + modulo by constant for the fear that during
expansion we could generate better code for those cases.
If the divisoris a power of two, that is certainly the case always,
but otherwise expand_divmod can punt in many cases, e.g. if the division
type's precision is above HOST_BITS_PER_WIDE_INT, we don't even call
choose_multiplier, because it works on HOST_WIDE_INTs (true, something
we should fix eventually now that we have wide_ints), or if pre/post shift
is larger than BITS_PER_WORD.

So, the following patch recognizes DIVMOD with constant last argument even
when it is unclear if expand_divmod will be able to optimize it, and then
during DIVMOD expansion if the divisor is constant attempts to expand it as
division + modulo and if they actually don't contain any libcalls or
division/modulo, they are kept as is, otherwise that sequence is thrown away
and divmod optab or libcall is used.

2020-10-06  Jakub Jelinek  <jakub@redhat.com>

	PR rtl-optimization/97282
	* tree-ssa-math-opts.c (divmod_candidate_p): Don't return false for
	constant op2 if it is not a power of two and the type has precision
	larger than HOST_BITS_PER_WIDE_INT or BITS_PER_WORD.
	* internal-fn.c (contains_call_div_mod): New function.
	(expand_DIVMOD): If last argument is a constant, try to expand it as
	TRUNC_DIV_EXPR followed by TRUNC_MOD_EXPR, but if the sequence
	contains any calls or {,U}{DIV,MOD} rtxes, throw it away and use
	divmod optab or divmod libfunc.

	* gcc.target/i386/pr97282.c: New test.
2020-10-06 10:32:22 +02:00
Aldy Hernandez
952adf0218 Fix off-by-one storage problem in irange_allocator.
gcc/ChangeLog:

	* value-range.h (irange_allocator::allocate): Increase
	newir storage by one.
2020-10-06 09:35:03 +02:00
Jakub Jelinek
44e20dce59 openmp: Fix ICE in omp_discover_declare_target_tgt_fn_r
This ICEs because node->alias_target is (not yet) a FUNCTION_DECL, but
IDENTIFIER_NODE.

I guess we should retry the discovery before LTO streaming out, the reason
to do it this early is that it can affect the gimplification and omp lowering.

2020-10-06  Jakub Jelinek  <jakub@redhat.com>

	PR middle-end/97289
	* omp-offload.c (omp_discover_declare_target_tgt_fn_r): Only follow
	node->alias_target if it is a FUNCTION_DECL.

	* c-c++-common/gomp/pr97289.c: New test.
2020-10-06 09:25:00 +02:00
Joe Ramsay
3e8fb15a8c arm: Add +nomve and +nomve.fp options to -mcpu=cortex-m55
This patch rearranges feature bits for MVE and FP to implement the
following flags for -mcpu=cortex-m55.

  - +nomve:    equivalent to armv8.1-m.main+fp.dp+dsp.
  - +nomve.fp: equivalent to armv8.1-m.main+mve+fp.dp (+dsp is implied by +mve).
  - +nofp:     equivalent to armv8.1-m.main+mve (+dsp is implied by +mve).
  - +nodsp:    equivalent to armv8.1-m.main+fp.dp.

Combinations of the above:

  - +nomve+nofp: equivalent to armv8.1-m.main+dsp.
  - +nodsp+nofp: equivalent to armv8.1-m.main.

Due to MVE and FP sharing vfp_base, some new syntax was required in the CPU
description to implement the concept of 'implied bits'. These are non-named
features added to the ISA late, depending on whether one or more features which
depend on them are present. This means vfp_base can be present when only one of
MVE and FP is removed, but absent when both are removed.

gcc/ChangeLog:

2020-07-31  Joe Ramsay  <joe.ramsay@arm.com>

	* config/arm/arm-cpus.in:
	(ALL_FPU_INTERNAL): Remove vfp_base.
	(VFPv2): Remove vfp_base.
	(MVE): Remove vfp_base.
	(vfp_base): Redefine as implied bit dependent on MVE or FP
	(cortex-m55): Add flags to disable MVE, MVE FP, FP and DSP extensions.
	* config/arm/arm.c (arm_configure_build_target): Add implied bits to ISA.
	* config/arm/parsecpu.awk:
	(gen_isa): Print implied bits and their dependencies to ISA header.
	(gen_data): Add parsing for implied feature bits.

gcc/testsuite/ChangeLog:

	* gcc.target/arm/cortex-m55-nodsp-flag-hard.c: New test.
	* gcc.target/arm/cortex-m55-nodsp-flag-softfp.c: New test.
	* gcc.target/arm/cortex-m55-nodsp-nofp-flag-softfp.c: New test.
	* gcc.target/arm/cortex-m55-nofp-flag-hard.c: New test.
	* gcc.target/arm/cortex-m55-nofp-flag-softfp.c: New test.
	* gcc.target/arm/cortex-m55-nofp-nomve-flag-softfp.c: New test.
	* gcc.target/arm/cortex-m55-nomve-flag-hard.c: New test.
	* gcc.target/arm/cortex-m55-nomve-flag-softfp.c: New test.
	* gcc.target/arm/cortex-m55-nomve.fp-flag-hard.c: New test.
	* gcc.target/arm/cortex-m55-nomve.fp-flag-softfp.c: New test.
	* gcc.target/arm/multilib.exp: Add tests for -mcpu=cortex-m55.
2020-10-06 08:10:47 +01:00
Andreas Krebbel
d2364fb436 IBM Z: Doc: Add z15/arch13 to the list of -march/-mtune options
gcc/ChangeLog:

	* doc/invoke.texi: Add z15/arch13 to the list of documented
	-march/-mtune options.
2020-10-06 08:02:19 +02:00
Nikhil Benesch
7164745e1c gofrontend: correct file reading logic in Stream_from_file
The implementation of Stream_from_file mishandled several cases:

  * It reversed the check for whether bytes were already available in
    the peek buffer.

  * It considered positive return values from lseek to be an error, when
    only a -1 return value indicates an error.

Reviewed-on: https://go-review.googlesource.com/c/gofrontend/+/259437
2020-10-05 17:37:32 -07:00
GCC Administrator
7e9282ae62 Daily bump. 2020-10-06 00:16:25 +00:00
Jonathan Wakely
9af65c2b90 libstdc++: Reduce uses of std::numeric_limits
This avoids unnecessary instantiations of std::numeric_limits or
inclusion of <limits> when a more lightweight alternative would work.
Some uses can be replaced with __gnu_cxx::__int_traits and some can just
use size_t(-1) directly where SIZE_MAX is needed.

libstdc++-v3/ChangeLog:

	* include/bits/regex.h: Use __int_traits<int> instead of
	std::numeric_limits<int>.
	* include/bits/uniform_int_dist.h: Use __int_traits<T>::__max
	instead of std::numeric_limits<T>::max().
	* include/bits/hashtable_policy.h: Use size_t(-1) instead of
	std::numeric_limits<size_t>::max().
	* include/std/regex: Include <ext/numeric_traits.h>.
	* include/std/string_view: Use typedef for __int_traits<int>.
	* src/c++11/hashtable_c++0x.cc: Use size_t(-1) instead of
	std::numeric_limits<size_t>::max().
	* testsuite/std/ranges/iota/96042.cc: Include <limits>.
	* testsuite/std/ranges/iota/difference_type.cc: Likewise.
	* testsuite/std/ranges/subrange/96042.cc: Likewise.
2020-10-06 00:05:11 +01:00
Marek Polacek
66a0320793 c++: Fix typo in NON_UNION_CLASS_TYPE_P.
gcc/cp/ChangeLog:

	* cp-tree.h (NON_UNION_CLASS_TYPE_P): Fix typo in a comment.
2020-10-05 18:06:48 -04:00
Jonathan Wakely
1c72f460e9 libstdc++: Minor header cleanup in <numeric>
When adding new features to <numeric> I included the required headers
adjacent to the new code. This cleans it up by moving all the includes
to the start of the file.

libstdc++-v3/ChangeLog:

	* include/std/numeric: Move all #include directives to the top
	of the header.
	* testsuite/26_numerics/gcd/gcd_neg.cc: Adjust dg-error line
	numbers.
	* testsuite/26_numerics/lcm/lcm_neg.cc: Likewise.
2020-10-05 22:46:46 +01:00
Aldy Hernandez
ea6da7f50f Cleanup legacy_union and legacy intersect in value_range.
These are cleanups so that multi-range union/intersect doesn't
have to deal with legacy code.  Instead, these should be done in
legacy mode.

gcc/ChangeLog:

	* value-range.cc (irange::legacy_intersect): Only handle
	legacy ranges.
	(irange::legacy_union): Same.
	(irange::union_): When unioning legacy with non-legacy,
	first convert to legacy and do everything in legacy mode.
	(irange::intersect): Same, but for intersect.
	* range-op.cc (range_tests): Adjust for above changes.
2020-10-05 19:51:36 +02:00
Aldy Hernandez
bd431d26de Import various range-op fixes from ranger branch.
This patch imports three fixes from the ranger branch:

1. Fold division by zero into varying instead of undefined.
This provides compatibility with existing stuff on trunk.

2. Solver changes for lshift.
This should not affect anything on trunk, as it only involves
the GORI solver which is yet to be contributed.

3. Preserve existing behavior for ABS([-MIN,-MIN]).
This is actually unrepresentable, but trunk has traditionally
treated this as [-MIN,-MIN] so this patch just syncs range-ops
with the rest of trunk.

gcc/ChangeLog:

	* range-op.cc (operator_div::wi_fold): Return varying for
	division by zero.
	(class operator_rshift): Move class up.
	(operator_abs::wi_fold): Return [-MIN,-MIN] for ABS([-MIN,-MIN]).
	(operator_tests): Adjust tests.
2020-10-05 19:48:55 +02:00
Jakub Jelinek
ac1c65ad1a support TARGET_MEM_REF in C/C++ error pretty-printing [PR97197]
> See my comment above for Martins attempts to improve things.  I don't
> really want to try decide what to do with those late diagnostic IL
> printing but my commit was blamed for showing target-mem-ref unsupported.
>
> I don't have much time to spend to think what to best print and what not,
> but yes, printing only the MEM_REF part is certainly imprecise.

Here is an updated version of the patch that prints TARGET_MEM_REF the way
it should be printed - as C representation of what it actually means.
Of course it would be better to have the original expressions, but with the
late diagnostics we no longer have them.

2020-10-05  Richard Biener  <rguenther@suse.de>
	    Jakub Jelinek  <jakub@redhat.com>

	PR c++/97197
gcc/cp/
	* error.c (dump_expr): Handle TARGET_MEM_REF.
gcc/c-family/
	* c-pretty-print.c: Include langhooks.h.
	(c_pretty_printer::postfix_expression): Handle TARGET_MEM_REF as
	expression.
	(c_pretty_printer::expression): Handle TARGET_MEM_REF as
	unary_expression.
	(c_pretty_printer::unary_expression): Handle TARGET_MEM_REF.
2020-10-05 18:41:53 +02:00
Jonathan Wakely
f92a504fdd libstdc++: Make allocators throw bad_array_new_length on overflow [LWG 3190]
std::allocator and std::pmr::polymorphic_allocator should throw
std::bad_array_new_length from their allocate member functions if the
number of bytes required cannot be represented in std::size_t.

libstdc++-v3/ChangeLog:

	* config/abi/pre/gnu.ver: Add new symbol.
	* include/bits/functexcept.h (__throw_bad_array_new_length):
	Declare new function.
	* include/ext/malloc_allocator.h (malloc_allocator::allocate):
	Throw bad_array_new_length for impossible sizes (LWG 3190).
	* include/ext/new_allocator.h (new_allocator::allocate):
	Likewise.
	* include/std/memory_resource (polymorphic_allocator::allocate)
	(polymorphic_allocator::allocate_object): Use new function,
	__throw_bad_array_new_length.
	* src/c++11/functexcept.cc (__throw_bad_array_new_length):
	Define.
	* testsuite/20_util/allocator/lwg3190.cc: New test.
2020-10-05 15:18:56 +01:00
Tom de Vries
717e402dbf [omp, ftracer] Ignore IFN_GOMP_SIMT_XCHG_* in ignore_bb_p
As IFN_GOMP_SIMT_XCHG_* are part of the group marked by
IFN_GOMP_SIMT_ENTER_ALLOC/IFN_GOMP_SIMT_EXIT, handle them conservatively
in ignore_bb_p.

Build on x86_64-linux with nvptx accelerator, tested with libgomp.

gcc/ChangeLog:

2020-10-05  Tom de Vries  <tdevries@suse.de>

	* tracer.c (ignore_bb_p): Ignore GOMP_SIMT_XCHG_*.
2020-10-05 16:03:17 +02:00
Nathan Sidwell
255aa06d40 c++: Make spell corrections consistent
My change to namespace-scope spell corrections ignored the issue that
different targets might have different builtins, and therefore perturb
iteration order.  This fixes it by using an intermediate array of
identifier, which we sort before considering.

	gcc/cp/
	* name-lookup.c (maybe_add_fuzzy_decl): New.
	(maybe_add_fuzzy_binding): New.
	(consider_binding_level): Use intermediate sortable vector for
	namespace bindings.
	gcc/testsuite/
	* c-c++-common/spellcheck-reserved.c: Restore diagnostic.
2020-10-05 06:39:10 -07:00
Alex Coplan
bf490f0636 arm: Add missing part number for Neoverse V1
This patch adds vendor and part numbers which were missing from the
initial entry for Neoverse V1 in AArch32 GCC.

gcc/ChangeLog:

	* config/arm/arm-cpus.in (neoverse-v1): Add missing vendor and
	part numbers.
2020-10-05 13:45:24 +01:00
Tom de Vries
fc998c21c2 [omp, ftracer] Remove incorrect suggestion in ignore_bb_p
In commit ab3f4b27abe "[omp, ftracer] Don't duplicate blocks in SIMT region" I
added a comment in ignore_bb_p suggesting a reordering of SIMT_VOTE_ANY and
SIMT_EXIT, which is not possible since VOTE_ANY may have data dependencies to
storage that is deallocated by SIMT_EXIT.

I've now opened a PR (PR97291) to describe the problem the reordering was
intended to fix.

Remove the incorrect suggestion.

gcc/ChangeLog:

2020-10-05  Tom de Vries  <tdevries@suse.de>

	* tracer.c (ignore_bb_p): Remove incorrect suggestion.
2020-10-05 14:19:22 +02:00
Mike Crowe
f33a43f9f7 libstdc++: Use correct duration for atomic_futex wait on custom clock [PR 91486]
As Jonathan Wakely pointed out[1], my change in commit
f9ddb696a289cc48d24d3d23c0b324cb88de9573 should have been rounding to
the target clock duration type rather than the input clock duration type
in __atomic_futex_unsigned::_M_load_when_equal_until just as (e.g.)
condition_variable does.

As well as fixing this, let's create a rather contrived test that fails
with the previous code, but unfortunately only when run on a machine
with an uptime of over 208.5 days, and even then not always.

[1] https://gcc.gnu.org/pipermail/libstdc++/2020-September/051004.html

libstdc++-v3/ChangeLog:

	PR libstdc++/91486
	* include/bits/atomic_futex.h:
	(__atomic_futex_unsigned::_M_load_when_equal_until): Use target
	clock duration type when rounding.
	* testsuite/30_threads/async/async.cc (test_pr91486_wait_for):
	Rename from test_pr91486.
	(float_steady_clock): New class for test.
	(test_pr91486_wait_until): New test.
2020-10-05 11:32:10 +01:00
Mike Crowe
d5243c4626 libstdc++: Test C++11 implementation of std::chrono::__detail::ceil
Commit 53ad6b1979f4bd7121e977c4a44151b14d8a0147 split the implementation
of std::chrono::__detail::ceil so that when compiling for C++17 and
later std::chrono::ceil is used but when compiling for earlier versions
a separate implementation is used to comply with C++11's limited
constexpr rules. Let's run the equivalent of the existing
std::chrono::ceil test cases on std::chrono::__detail::ceil too to make
sure that it doesn't get broken.

libstdc++-v3/ChangeLog:

	* testsuite/20_util/duration_cast/rounding_c++11.cc: Copy
	rounding.cc and alter to support compilation for C++11 and to
	test std::chrono::__detail::ceil.
2020-10-05 11:09:03 +01:00
Jonathan Wakely
b98d3cc566 libstdc++: Add missing bugzilla PR numbers to ChangeLog
We missed these out of the git commit messages.
2020-10-05 10:46:25 +01:00
Jakub Jelinek
3c022a4c73 options: Save and restore opts_set for Optimization and Target options fallout
> This breaks ia64:
>
> In file included from ./tm.h:23,
>                  from ../../gcc/gencheck.c:23:
> ./options.h:7816:40: error: ISO C++ forbids zero-size array 'explicit_mask' [-Werror=pedantic]
>  7816 |   unsigned HOST_WIDE_INT explicit_mask[0];
>       |                                        ^
> ./options.h:7816:26: error: zero-size array member 'cl_target_option::explicit_mask' not at end of 'struct cl_target_option' [-Werror=pedantic]
>  7816 |   unsigned HOST_WIDE_INT explicit_mask[0];
>       |                          ^~~~~~~~~~~~~
> ./options.h:7812:16: note: in the definition of 'struct cl_target_option'
>  7812 | struct GTY(()) cl_target_option
>       |                ^~~~~~~~~~~~~~~~

Oops, sorry.

The following patch should fix that and should also fix streaming of the
new explicit_mask_* members.

2020-10-05  Jakub Jelinek  <jakub@redhat.com>

	* opth-gen.awk: Don't emit explicit_mask array if n_target_explicit
	is equal to n_target_explicit_mask.
	* optc-save-gen.awk: Compute has_target_explicit_mask and if false,
	don't emit code iterating over explicit_mask array elements.  Stream
	also explicit_mask_* target members.
2020-10-05 09:34:42 +02:00
Jakub Jelinek
21f65995e0 store-merging: Fix up -Wnarrowing warning
I've noticed a -Wnarrowing warning on gimple-ssa-store-merging.c, this
change fixes that up.

2020-10-05  Jakub Jelinek  <jakub@redhat.com>

	* gimple-ssa-store-merging.c
	(imm_store_chain_info::output_merged_store): Use ~0U instead of ~0 in
	unsigned int array initializer.
2020-10-05 09:09:41 +02:00
Tom de Vries
ab3f4b27ab [omp, ftracer] Don't duplicate blocks in SIMT region
When running the libgomp testsuite on x86_64-linux with nvptx accelerator on
the test-case included in this patch, we run into:
...
FAIL: libgomp.fortran/pr95654.f90 -O3 -fomit-frame-pointer -funroll-loops \
  -fpeel-loops -ftracer -finline-functions  execution test
...

The test-case is a minimal version of this FAIL:
...
FAIL: libgomp.fortran/pr66199-5.f90 -O3 -fomit-frame-pointer -funroll-loops \
  -fpeel-loops -ftracer -finline-functions  execution test
...
but that one has stopped failing at commit c2ebf4f10de "openmp: Add support
for non-rect simd and improve collapsed simd support".

The problem is that ftracer duplicates a block containing GOMP_SIMT_VOTE_ANY.

That is, before ftracer we have (dropping the GOMP_SIMT_ prefix):
...
bb4(ENTER_ALLOC)
*----------+
|           \
|            \
|             v
|             *
v             bb8
*<------------*
bb5(VOTE_ANY)
*-------------+
|             |
|             |
|             |
|             |
|             v
|             *
v             bb7(XCHG_IDX)
*<------------*
bb6(EXIT)
...

The XCHG_IDX internal-fn does inter-SIMT-lane communication, which for nvptx
maps onto shfl, an operator which has the requirement that the warp executing
the operator is convergent.  The warp diverges at bb4, and
reconverges at bb5, and does not diverge by going to bb7, so the shfl is
indeed executed by a convergent warp.

After ftracer, we have:
...
bb4(ENTER_ALLOC)
*----------+
|           \
|            \
|             \
|              \
v               v
*               *
bb5(VOTE_ANY)   bb8(VOTE_ANY)
*               *
|\             /|
| \  +--------+ |
|  \/           |
|  /\           |
| /  +----------v
|/              *
v               bb7(XCHG_IDX)
*<--------------*
bb6(EXIT)
...

The warp diverges again at bb5, but does not reconverge again before bb6, so
the shfl is executed by a divergent warp, which causes the FAIL.

Fix this by making ftracer ignore blocks containing ENTER_ALLOC, VOTE_ANY and
EXIT, effectively treating the SIMT region conservatively.

An argument can be made that the test needs to be added in a more
generic place, like gimple_can_duplicate_bb_p or some such, and that ftracer
then needs to use the generic test.  But that's a discussion with a much
broader scope, so I'm leaving that for another patch.

Bootstrapped and reg-tested on x86_64-linux.

Build on x86_64-linux with nvptx accelerator, tested with libgomp.

gcc/ChangeLog:

	PR fortran/95654
	* tracer.c (ignore_bb_p): Ignore GOMP_SIMT_ENTER_ALLOC,
	GOMP_SIMT_VOTE_ANY and GOMP_SIMT_EXIT.

libgomp/ChangeLog:

2020-10-05  Tom de Vries  <tdevries@suse.de>

	PR fortran/95654
	* testsuite/libgomp.fortran/pr95654.f90: New test.
2020-10-05 08:53:11 +02:00