* config/sparc/sparc.c (const64_operand, const64_high_operand):
Get it right when HOST_BITS_PER_WIDE_INT is not 64.
(input_operand): Fixup test for what we accept for constant
integers.
(sparc_emit_set_const32, sparc_emit_set_symbolic_const64): Give
set VOIDmode.
(safe_constDI): Remove.
(sparc_emit_set_safe_HIGH64, gen_safe_SET64, gen_safe_OR64,
gen_safe_XOR64): New functions.
(sparc_emit_set_const64_quick1, sparc_emit_set_const64_quick2,
sparc_emit_set_const64_longway, sparc_emit_set_const64): Use
them.
* config/sparc/sparc.md (define_insn xordi3_sp64_dbl): Only make
available when HOST_BITS_PER_WIDE_INT is not 64.
(define_insn movdi_sp64_dbl, movdi_const64_special): Likewise and
move before movdi_insn_sp64 pattern.
(define_insn movdi_lo_sum_sp64_dbl, movdi_high_sp64_dbl): Remove.
(define_insn sethi_di_medlow, seth44, setm44, sethh): Use
symbolic_operand as predicate for second operand.
(DImode minus split on arch32, negsi2 expander, one_cmplsi2
expander): Give set VOIDmode.
From-SVN: r21724
* reload1.c (eliminate_regs_in_insn): Handle another case when
eliminating the frame pointer to the hard frame pointer. Add
missing ep->to_rtx check to one existing case.
From-SVN: r21705
* expr.c (safe_from_p): Change code to ERROR_MARK only when not
accessing nodes.
* toplev.c (display_help): Add braces to shut up warnings.
* fold-const.c (non_lvalue): Don't deal with null pointer
constants here.
(fold, case COMPOUND_EXPR): Wrap a constant 0 in a NOP_EXPR.
From-SVN: r21698
* mn10300.c (REG_SAVE_BYTES): Only reserve space for registers
which will be saved.
* mn10300.md (prologue insn): Only save registers which need saving.
(epilogue insn): Similarly.
From-SVN: r21687
1998-08-12 Mark Mitchell <mark@markmitchell.com>
* decl.c (grokdeclarator): Issue errors on namespace qualified
declarators in parameter lists or in class scope.
From-SVN: r21684
* config/sparc/sparc.md (define_insn addx_extend): Rename to
addx_extend_sp64, only allow when TARGET_ARCH64.
(define_insn addx_extend_sp32 and split): Version that works when
not TARGET_ARCH64.
(define_insn subx_extend): Likewise.
(define_split adddi3 and subdi3 with zero extension): Fixup and
correct bugs when not TARGET_ARCH64.
From-SVN: r21677
* except.c (set_exception_lang_code, set_exception_version_code):
Use prototype-style definition if __STDC__, to match declaration
in except.h.
* genemit.c: Change FAIL and DONE macros not to use loops.
From-SVN: r21675
* config/sparc/sparc.c (sparc_emit_set_const32): INTVAL is of
type HOST_WIDE_INT.
(safe_constDI sparc_emit_set_const64_quick1,
sparc_emit_set_const64_quick2, sparc_emit_set_const64_longway,
analyze_64bit_constant, const64_is_2insns,
create_simple_focus_bits): Fix some bugs when compiled on real
64-bit hosts.
(function_arg_record_value_3, function_arg_record_value_2,
function_arg_record_value): Add fully prototyped forward decls.
* config/sparc/sparc.md (define_insn cmpsi_insn_sp32): Rename back
to cmpsi_insn and use on both 64 and 32 bit targets.
(define_insn cmpsi_insn_sp64): Remove.
(define_expand zero_extendsidi2): Allow for 32-bit target too.
(define_insn zero_extendsidi2_insn): Rename to
zero_extendsidi2_insn_sp64.
(define_insn zero_extendsidi2_insn_sp32): New pattern and
assosciated forced split for it.
From-SVN: r21662
* config/sparc/sparc.c (input_operand): Do not accept a LO_SUM MEM
for TFmode when !v9. We require offsettable memory addresses.
* config/sparc/sparc.h (ALTER_HARD_SUBREG): Handle TFmode to
DFmode register number conversions.
* config/sparc/sparc.md (define_split DFmode moves): If register
is a SUBREG do alter_subreg on it before using.
(define_expand movtf): Fixup comment about alignment on v9.
(define_split TFmode moves): Don't use gen_{high,low}part, create
explicit SUBREGs instead.
From-SVN: r21658
