The RVV intrinisc API has sorts of required extension from both
the march or target attribute. It will have error message similar
to below:
built-in function '__riscv_vsetvl_e8m4\(vl\)' requires the V ISA extension
However, it is not accurate as we have many additional sub extenstion
besides v extension. For example, zvbb, zvbk, zvbc ... etc. This patch
would like to refine the error message with a friendly hint for the
required extension. For example as below:
vuint64m1_t
__attribute__((target("arch=+v")))
test_1 (vuint64m1_t op_1, vuint64m1_t op_2, size_t vl)
{
return __riscv_vclmul_vv_u64m1 (op_1, op_2, vl);
}
When compile with march=rv64gc and target arch=+v, we will have error
message as below:
error: built-in function '__riscv_vclmul_vv_u64m1(op_1, op_2, vl)'
requires the 'zvbc' ISA extension
Then the end-user will get the point that the *zvbc* extension is missing
for the intrinisc API easily.
The below tests are passed for this patch.
* The riscv fully regression tests.
gcc/ChangeLog:
* config/riscv/riscv-vector-builtins-shapes.cc (build_one): Pass
required_ext arg when invoke add function.
(build_th_loadstore): Ditto.
(struct vcreate_def): Ditto.
(struct read_vl_def): Ditto.
(struct vlenb_def): Ditto.
* config/riscv/riscv-vector-builtins.cc (function_builder::add_function):
Introduce new arg required_ext to fill in the register func.
(function_builder::add_unique_function): Ditto.
(function_builder::add_overloaded_function): Ditto.
(expand_builtin): Leverage required_extensions_specified to
check if the required extension is provided.
* config/riscv/riscv-vector-builtins.h (reqired_ext_to_isa_name): New
func impl to convert the required_ext enum to the extension name.
(required_extensions_specified): New func impl to predicate if
the required extension is well feeded.
gcc/testsuite/ChangeLog:
* gcc.target/riscv/rvv/base/target_attribute_v_with_intrinsic-7.c: Adjust
the error message for v extension.
* gcc.target/riscv/rvv/base/target_attribute_v_with_intrinsic-8.c: Ditto.
* gcc.target/riscv/rvv/base/intrinsic_required_ext-1.c: New test.
* gcc.target/riscv/rvv/base/intrinsic_required_ext-10.c: New test.
* gcc.target/riscv/rvv/base/intrinsic_required_ext-2.c: New test.
* gcc.target/riscv/rvv/base/intrinsic_required_ext-3.c: New test.
* gcc.target/riscv/rvv/base/intrinsic_required_ext-4.c: New test.
* gcc.target/riscv/rvv/base/intrinsic_required_ext-5.c: New test.
* gcc.target/riscv/rvv/base/intrinsic_required_ext-6.c: New test.
* gcc.target/riscv/rvv/base/intrinsic_required_ext-7.c: New test.
* gcc.target/riscv/rvv/base/intrinsic_required_ext-8.c: New test.
* gcc.target/riscv/rvv/base/intrinsic_required_ext-9.c: New test.
Signed-off-by: Pan Li <pan2.li@intel.com>
The specs for coverage ere out of date leading to test fails for
fcondition-coverage cases. Fixed by updating to match the specs
in gcc/gcc.cc.
gcc/ChangeLog:
* config/darwin.h (LINK_COMMAND_SPEC_A): Update coverage
specs.
Signed-off-by: Iain Sandoe <iain@sandoe.co.uk>
The program points start from 1, so max_point should be equal to
length().
Tested on RV64 and no regression.
gcc/ChangeLog:
* config/riscv/riscv-vector-costs.cc: Use length()
Signed-off-by: demin.han <demin.han@starfivetech.com>
In previous, we allowed the target(("arch=+v")) for a function with
rv64gc build. This patch would like to support more arch options as
below:
* zve32x
* zve32f
* zve64x
* zve64f
* zve64d
* zvfhmin
* zvfh
* zvk*
* zvbb
For example, we have sample code as below.
vfloat32m1_t
__attribute__((target("arch=+zve64f")))
test_9 (vfloat32m1_t a, vfloat32m1_t b, size_t vl)
{
return __riscv_vfadd_vv_f32m1 (a, b, vl);
}
It will generate the asm code when build with -O3 -march=rv64gc
test_9:
vsetvli zero,a0,e32,m1,ta,ma
vfadd.vv v8,v8,v9
ret
Meanwhile, this patch introduces more error handling for the target
attribute. Take arch=+zve32x with vfloat32m1_t will have error message
"'vfloat32m1_t' requires the zve32f, zve64f or zve64d ISA extension".
And take arch=+zve32f with vfloat16m1_t will have error message
"'vfloat16m1_t' requires the zvfhmin or zvfh ISA extension".
By default, all the RVV types includes the cmdline march will be
registered when include the riscv_vector.h. And we have sorts of check
during args and return types.
Below test are passed for this patch:
* The riscv fully regression test.
gcc/ChangeLog:
* config/riscv/riscv-c.cc (struct pragma_intrinsic_flags): New
struct to hold all intrinisc related flags.
(riscv_pragma_intrinsic_flags_pollute): New func to pollute
the intrinsic flags and backup original flags.
(riscv_pragma_intrinsic_flags_restore): New func to restore
the flags from the backup intrinsic flags.
(riscv_pragma_intrinsic): Pollute the flags and register all
possible builtin types and functions, then restore and reinit.
* config/riscv/riscv-protos.h (reinit_builtins): New func
decl to reinit after flags pollution.
(riscv_option_override): New extern func decl.
* config/riscv/riscv-vector-builtins.cc (register_builtin_types_on_null):
New func to register builtin types if null.
(DEF_RVV_TYPE): Ditto.
(DEF_RVV_TUPLE_TYPE): Ditto.
(reinit_builtins): New func impl to reinit after flags pollution.
(expand_builtin): Return
target rtx after error_at.
* config/riscv/riscv.cc (riscv_vector_int_type_p): New predicate
func to tell one tree type is integer or not.
(riscv_vector_float_type_p): New predicate func to tell one tree
type is float or not.
(riscv_vector_element_bitsize): New func to get the element bitsize
of a vector tree type.
(riscv_vector_required_min_vlen): New func to get the required min vlen
of a vector tree type.
(riscv_validate_vector_type): New func to validate the tree type
is valid on flags.
(riscv_return_value_is_vector_type_p): Leverage the func
riscv_validate_vector_type to do the tree type validation.
(riscv_arguments_is_vector_type_p): Ditto.
(riscv_override_options_internal): Ditto.
gcc/testsuite/ChangeLog:
* gcc.target/riscv/rvv/base/pr109479-1.c: Adjust the existing test
scenarios and add new error check tests.
* gcc.target/riscv/rvv/base/pr109479-2.c: Ditto.
* gcc.target/riscv/rvv/base/pr109479-3.c: Ditto.
* gcc.target/riscv/rvv/base/pr109479-4.c: Diito.
* gcc.target/riscv/rvv/base/pr109479-5.c: Diito.
* gcc.target/riscv/rvv/base/pr109479-6.c: Diito.
* gcc.target/riscv/rvv/base/user-10.c: Ditto.
* gcc.target/riscv/rvv/base/user-12.c: Ditto.
* gcc.target/riscv/rvv/base/user-13.c: Ditto.
* gcc.target/riscv/rvv/base/user-14.c: Ditto.
* gcc.target/riscv/rvv/base/user-15.c: Ditto.
* gcc.target/riscv/rvv/base/user-2.c: Ditto.
* gcc.target/riscv/rvv/base/user-3.c: Ditto.
* gcc.target/riscv/rvv/base/user-5.c: Ditto.
* gcc.target/riscv/rvv/base/user-6.c: Ditto.
* gcc.target/riscv/rvv/base/user-9.c: Ditto.
* gcc.target/riscv/rvv/base/target_attribute_v_with_intrinsic-10.c: New test.
* gcc.target/riscv/rvv/base/target_attribute_v_with_intrinsic-11.c: New test.
* gcc.target/riscv/rvv/base/target_attribute_v_with_intrinsic-12.c: New test.
* gcc.target/riscv/rvv/base/target_attribute_v_with_intrinsic-13.c: New test.
* gcc.target/riscv/rvv/base/target_attribute_v_with_intrinsic-14.c: New test.
* gcc.target/riscv/rvv/base/target_attribute_v_with_intrinsic-15.c: New test.
* gcc.target/riscv/rvv/base/target_attribute_v_with_intrinsic-16.c: New test.
* gcc.target/riscv/rvv/base/target_attribute_v_with_intrinsic-17.c: New test.
* gcc.target/riscv/rvv/base/target_attribute_v_with_intrinsic-18.c: New test.
* gcc.target/riscv/rvv/base/target_attribute_v_with_intrinsic-19.c: New test.
* gcc.target/riscv/rvv/base/target_attribute_v_with_intrinsic-20.c: New test.
* gcc.target/riscv/rvv/base/target_attribute_v_with_intrinsic-21.c: New test.
* gcc.target/riscv/rvv/base/target_attribute_v_with_intrinsic-22.c: New test.
* gcc.target/riscv/rvv/base/target_attribute_v_with_intrinsic-23.c: New test.
* gcc.target/riscv/rvv/base/target_attribute_v_with_intrinsic-24.c: New test.
* gcc.target/riscv/rvv/base/target_attribute_v_with_intrinsic-25.c: New test.
* gcc.target/riscv/rvv/base/target_attribute_v_with_intrinsic-26.c: New test.
* gcc.target/riscv/rvv/base/target_attribute_v_with_intrinsic-27.c: New test.
* gcc.target/riscv/rvv/base/target_attribute_v_with_intrinsic-28.c: New test.
* gcc.target/riscv/rvv/base/target_attribute_v_with_intrinsic-29.c: New test.
* gcc.target/riscv/rvv/base/target_attribute_v_with_intrinsic-30.c: New test.
* gcc.target/riscv/rvv/base/target_attribute_v_with_intrinsic-31.c: New test.
* gcc.target/riscv/rvv/base/target_attribute_v_with_intrinsic-32.c: New test.
* gcc.target/riscv/rvv/base/target_attribute_v_with_intrinsic-33.c: New test.
* gcc.target/riscv/rvv/base/target_attribute_v_with_intrinsic-34.c: New test.
* gcc.target/riscv/rvv/base/target_attribute_v_with_intrinsic-35.c: New test.
* gcc.target/riscv/rvv/base/target_attribute_v_with_intrinsic-36.c: New test.
* gcc.target/riscv/rvv/base/target_attribute_v_with_intrinsic-37.c: New test.
* gcc.target/riscv/rvv/base/target_attribute_v_with_intrinsic-38.c: New test.
* gcc.target/riscv/rvv/base/target_attribute_v_with_intrinsic-39.c: New test.
* gcc.target/riscv/rvv/base/target_attribute_v_with_intrinsic-40.c: New test.
* gcc.target/riscv/rvv/base/target_attribute_v_with_intrinsic-41.c: New test.
* gcc.target/riscv/rvv/base/target_attribute_v_with_intrinsic-42.c: New test.
* gcc.target/riscv/rvv/base/target_attribute_v_with_intrinsic-43.c: New test.
* gcc.target/riscv/rvv/base/target_attribute_v_with_intrinsic-44.c: New test.
* gcc.target/riscv/rvv/base/target_attribute_v_with_intrinsic-45.c: New test.
* gcc.target/riscv/rvv/base/target_attribute_v_with_intrinsic-46.c: New test.
* gcc.target/riscv/rvv/base/target_attribute_v_with_intrinsic-47.c: New test.
* gcc.target/riscv/rvv/base/target_attribute_v_with_intrinsic-48.c: New test.
* gcc.target/riscv/rvv/base/target_attribute_v_with_intrinsic-49.c: New test.
* gcc.target/riscv/rvv/base/target_attribute_v_with_intrinsic-50.c: New test.
* gcc.target/riscv/rvv/base/target_attribute_v_with_intrinsic-51.c: New test.
* gcc.target/riscv/rvv/base/target_attribute_v_with_intrinsic-52.c: New test.
* gcc.target/riscv/rvv/base/target_attribute_v_with_intrinsic-53.c: New test.
* gcc.target/riscv/rvv/base/target_attribute_v_with_intrinsic-9.c: New test.
Signed-off-by: Pan Li <pan2.li@intel.com>
Xi Ruoyao set the alignment rules under LA464 in commit r14-1839,
but the macro ASM_OUTPUT_ALIGN_WITH_NOP was removed in R14-4674,
which affected the alignment rules.
So I set different aligns on LA464 and LA664 again to test the
performance of spec2006, and modify the alignment based on the test
results.
gcc/ChangeLog:
PR target/112919
* config/loongarch/loongarch-def.cc (la664_align): Newly defined
function that sets alignment rules under the LA664 microarchitecture.
* config/loongarch/loongarch-opts.cc
(loongarch_target_option_override): If not optimizing for size, set
the default alignment to what the target wants.
* config/loongarch/loongarch-tune.h (struct loongarch_align): Add
new member variables jump and loop.
This patch allows cc1gm2 to resolve constant expressions which use
relative operators. Previous to the patch the result of a relop
was stored in a temporary variable set by an if then else quadruple
sequence. This patch marks a const expression in the quadruples
and then reduces this sequence of quadruples into a single
assignment to an internal constant.
gcc/m2/ChangeLog:
PR modula2/114617
* gm2-compiler/M2GenGCC.mod (CodeStatememt): Add quad trace.
(ResolveConstantExpressions): Add parameter p to FoldIfLess,
FoldIfGre, FoldIfLessEqu, FoldIfGreEqu, FoldIfEqu, FoldIfNotEqu,
FoldIfIn and FoldIfNotIn.
(CodeInline): Add constExpr variable and pass it to GetQuadOtok.
(CodeReturnValue): Ditto.
(CodeParam): Ditto.
(FoldStringLength): Ditto.
(FoldStringConvertM2nul): Ditto.
(FoldStringConvertCnul): Ditto.
(DeclaredOperandsBecomes): Ditto.
(TypeCheckBecomes): Ditto.
(PerformFoldBecomes): Ditto.
(CodeBecomes): Ditto.
(CheckElementSetTypes): Ditto.
(CodeBinarySet): Ditto.
(PerformCodeIfLess): Ditto.
(PerformCodeIfGre): Ditto.
(PerformCodeIfLessEqu): Ditto.
(PerformCodeIfGreEqu): Ditto.
(PerformCodeIfEqu): Ditto.
(PerformCodeIfNotEqu): Ditto.
(IsValidExpressionRelOp): Ditto.
(PerformCodeIfIn): Ditto.
(PerformCodeIfNotIn): Ditto.
(CodeXIndr): Ditto.
(QuadCondition): New procedure function.
(IsBooleanRelOpPattern): Ditto.
(FoldBooleanRelopPattern): Ditto.
(FoldIfGre): Check for boolean relop constant expression and
add parameter p.
(FoldIfLessEqu): Ditto.
(FoldIfIn): Ditto.
(FoldIfEqu): Ditto.
(FoldIfNotIn): Ditto.
(FoldIfGreEqu): New procedure.
(FoldIfNotEqu): Ditto.
* gm2-compiler/M2Optimize.mod (ReduceBranch): Add constExpr
variable and pass it to GetQuadOtok.
* gm2-compiler/M2Quads.def (IsBecomes): New procedure function.
(IsDummy): Ditto.
(IsQuadConstExpr): Ditto.
(SetQuadConstExpr): Ditto.
(GetQuadDest): New procedure.
(GetQuadOp1): New procedure.
(GetQuadOp2): New procedure.
(GetQuadOp3): New procedure.
(GetQuadOtok): New procedure.
(GetQuadOTypetok): New procedure.
(PutQuadOtok): New procedure.
(IsInConstParameters): New procedure function.
* gm2-compiler/M2Quads.mod (IsBecomes): New procedure function.
(IsDummy): Ditto.
(IsQuadConstExpr): Ditto.
(SetQuadConstExpr): Ditto.
(GetQuadDest): New procedure.
(GetQuadOp1): New procedure.
(GetQuadOp2): New procedure.
(GetQuadOp3): New procedure.
(GetQuadOtok): New procedure.
(GetQuadOTypetok): New procedure.
(PutQuadOtok): New procedure.
(IsInConstParameters): New procedure function.
(ConstStack): Remove to ...
(ConstExprStack): ... this.
(ConstParamStack): New variable and initialize.
(QuadFrame): New field ConstExpr.
(GetQuadOtok): Add parameter constExpr and assign.
(PutQuadOtok): Add constExpr parameter and assign.
(PutQuadOType): Ditto.
(GetQuadOTypetok): Ditto.
(EraseQuad): Assign ConstExpr to FALSE.
(FoldSubrange): Set ConstExpr to FALSE in BecomesOp.
(PushInConstParameters): New procedure.
(PopInConstParameters): New procedure.
(IsInConstParameters): New procedure function.
* gm2-compiler/M2SymInit.mod (IssueConditional): Add
constExpr boolean variable.
(CheckReadBeforeInitQuad): Ditto.
(trashParam): Ditto.
* gm2-compiler/P3Build.bnf (ConstExpression): Call
PushInConstExpression and PopInConstExpression.
(ConstSetOrQualidentOrFunction): Call
PushInConstParameters and PopInConstParameters.
* gm2-compiler/PCBuild.bnf (ConstExpression): Call
PushInConstExpression and PopInConstExpression.
* gm2-compiler/PHBuild.bnf: Ditto
* gm2-gcc/m2expr.cc (m2expr_BuildCondIfExpression): New
function.
* gm2-gcc/m2expr.def (BuildCondIfExpression): New prototype.
* gm2-gcc/m2expr.h (m2expr_BuildCondIfExpression): New function.
gcc/testsuite/ChangeLog:
PR modula2/114617
* gm2/iso/const/pass/iso-const-pass.exp: New test.
Signed-off-by: Gaius Mulley <gaiusmod2@gmail.com>
PR libfortran/114304
PR libfortran/105473
libgfortran/ChangeLog:
* io/list_read.c (eat_separator): Add logic to handle spaces
preceding a comma or semicolon such that that a 'null' read
occurs without error at the end of comma or semicolon
terminated input lines. Add check and error message for ';'.
(list_formatted_read_scalar): Treat comma as a decimal point
when specified by the decimal mode on the first item.
gcc/testsuite/ChangeLog:
* gfortran.dg/pr105473.f90: Modify to verify new error message.
* gfortran.dg/pr114304.f90: New test.
Don't use implicit shift count in double-precision shifts in AT&T syntax
since they aren't in Intel SDM. Keep the 's' modifier for backward
compatibility with inline asm statements.
PR target/114590
* config/i386/i386.md (x86_64_shld): Use explicit shift count in
AT&T syntax.
(x86_64_shld_ndd): Likewise.
(x86_shld): Likewise.
(x86_shld_ndd): Likewise.
(x86_64_shrd): Likewise.
(x86_64_shrd_ndd): Likewise.
(x86_shrd): Likewise.
(x86_shrd_ndd): Likewise.
When a function is tree-inlined, copy the condition -> expression mapping
from the inlined function into the caller, shifted so uids are not
mixed. Tree inlining was always problematic under condition coverage -
either through a nullptr dereference (triggered by the test case), or
through quietly mixing caller conditions with the callee conditions.
PR middle-end/114599
gcc/ChangeLog:
* tree-inline.cc (add_local_variables): Copy cond_uids mappings.
gcc/testsuite/ChangeLog:
* gcc.misc-tests/gcov-pr114599.c: New test.
The __sigsetjmp test was added as a regression test in an early
iteration of the MC/DC support, as it caused an internal compiler error.
This was triggered by a code path which did not make it through to the
final revision. Since this test really only worked on systems with
__sigsetjmp, and does not serve a purpose any more it can be removed.
gcc/testsuite/ChangeLog:
* gcc.misc-tests/gcov-19.c: Remove test.
gcc/analyzer/ChangeLog:
PR analyzer/114588
* access-diagram.cc (access_diagram_impl::access_diagram_impl):
Replace hardcoded colors for valid_style and invalid_style with
calls to text_art::get_style_from_color_cap_name.
gcc/ChangeLog:
PR analyzer/114588
* diagnostic-color.cc (color_dict): Add "valid" and "invalid" as
color capability names.
* doc/invoke.texi: Document them in description of GCC_COLORS.
* text-art/style.cc: Include "diagnostic-color.h".
(text_art::get_style_from_color_cap_name): New.
* text-art/types.h (get_style_from_color_cap_name): New decl.
Signed-off-by: David Malcolm <dmalcolm@redhat.com>
When we have '-O3 -g' we emit a bunch of LB{B,E} local labels which
were not currently being discarded, leading to some test fails.
Fixed by adding this case to the ignored labels.
gcc/testsuite/ChangeLog:
* lib/scanasm.exp: Add 'LB*' to the local labels that are
ignored for Darwin.
Signed-off-by: Iain Sandoe <iain@sandoe.co.uk>
Interactions of IPA-CP and IPA-SRA on the same data is a rather big
source of issues, I'm afraid. PR 113964 is a situation where IPA-CP
propagates an unsigned short in a union parameter into a function
which itself calls a different function which has a same union
parameter and both these union parameters are split with IPA-SRA. The
leaf function however uses a signed short member of the union.
In the calling function, we get the unsigned constant as the
replacement for the union and it is then passed in the call without
any type compatibility checks. Apparently on riscv64 it matters
whether the parameter is signed or unsigned short and so the leaf
function can see different values.
Fixed by using useless_type_conversion_p at the appropriate place and
if it fails, use force_value_to type as elsewhere in similar
situations.
gcc/ChangeLog:
2024-04-04 Martin Jambor <mjambor@suse.cz>
PR ipa/113964
* ipa-param-manipulation.cc (ipa_param_adjustments::modify_call):
Force values obtined through pass-through maps to the expected
split type.
gcc/testsuite/ChangeLog:
2024-04-04 Patrick O'Neill <patrick@rivosinc.com>
Martin Jambor <mjambor@suse.cz>
PR ipa/113964
* gcc.dg/ipa/pr114247.c: New test.
The new support for gcov modified condition/decision coverage
introduced two new flags for gcc, -Wcoverage-too-many-conditions and
-fcondition-coverage. But didn't regenerate the gcc/common.opt.urls.
Fixes: 08a5233180 ("Add condition coverage (MC/DC)")
gcc/ChangeLog:
* common.opt.urls: Regenerate.
aarch64-sve.md had a pattern that combined:
cmpeq pb.T, pa/z, zc.T, #0
mov zd.T, pb/z, #1
into:
cnot zd.T, pa/m, zc.T
But this is only valid if pa.T is a ptrue. In other cases, the
original would set inactive elements of zd.T to 0, whereas the
combined form would copy elements from zc.T.
gcc/
PR target/114603
* config/aarch64/aarch64-sve.md (@aarch64_pred_cnot<mode>): Replace
with...
(@aarch64_ptrue_cnot<mode>): ...this, requiring operand 1 to be
a ptrue.
(*cnot<mode>): Require operand 1 to be a ptrue.
* config/aarch64/aarch64-sve-builtins-base.cc (svcnot_impl::expand):
Use aarch64_ptrue_cnot<mode> for _x operations that are predicated
with a ptrue. Represent other _x operations as fully-defined _m
operations.
gcc/testsuite/
PR target/114603
* gcc.target/aarch64/sve/acle/general/cnot_1.c: New test.
The #undef was added in r0-90320-g100d537d7a7b5c but it never did
anything.
gcc/c-family/ChangeLog:
* c-warn.cc (warn_about_parentheses): Remove an #undef.
We evaluate constexpr functions on the original, pre-genericization bodies.
That means that the function body we're evaluating will not have gone
through cp_genericize_r's "Map block scope extern declarations to visible
declarations with the same name and type in outer scopes if any". Here:
constexpr bool bar() { return true; } // #1
constexpr bool foo() {
constexpr bool bar(void); // #2
return bar();
}
it means that we:
1) register_constexpr_fundef (#1)
2) cp_genericize (#1)
nothing interesting happens
3) register_constexpr_fundef (foo)
does copy_fn, so we have two copies of the BIND_EXPR
4) cp_genericize (foo)
this remaps #2 to #1, but only on one copy of the BIND_EXPR
5) retrieve_constexpr_fundef (foo)
we find it, no problem
6) retrieve_constexpr_fundef (#2)
and here #2 isn't found in constexpr_fundef_table, because
we're working on the BIND_EXPR copy where #2 wasn't mapped to #1
so we fail. We've only registered #1.
It should work to use DECL_LOCAL_DECL_ALIAS (which used to be
extern_decl_map). We evaluate constexpr functions on pre-cp_fold
bodies to avoid diagnostic problems, but the remapping I'm proposing
should not interfere with diagnostics.
This is not a problem for a global scope redeclaration; there we go
through duplicate_decls which keeps the DECL_UID:
DECL_UID (olddecl) = olddecl_uid;
and DECL_UID is what constexpr_fundef_hasher::hash uses.
PR c++/111132
gcc/cp/ChangeLog:
* constexpr.cc (get_function_named_in_call): Use
cp_get_fndecl_from_callee.
* cvt.cc (cp_get_fndecl_from_callee): If there's a
DECL_LOCAL_DECL_ALIAS, use it.
gcc/testsuite/ChangeLog:
* g++.dg/cpp0x/constexpr-redeclaration3.C: New test.
* g++.dg/cpp0x/constexpr-redeclaration4.C: New test.
The following testcase is miscompiled, because in the vectorized
epilogue the vectorizer assumes it can use aligned loads/stores
(if the base decl gets alignment increased), but it actually doesn't
increase that.
This is because r10-4203-g97c1460367 added the hunk following
patch removes. The explanation feels reasonable, but actually it
is not true as the testcase proves.
The thing is, we vectorize the main loop with 64-byte vectors
and the corresponding data refs have base_alignment 16 (the
a array has DECL_ALIGN 128) and offset_alignment 32. Now, because
of the offset_alignment 32 rather than 64, we need to use unaligned
loads/stores in the main loop (and ditto in the first load/store
in vectorized epilogue). But the second load/store in the vectorized
epilogue uses only 32-byte vectors and because it is a multiple
of offset_alignment, it checks if we could increase alignment of the
a VAR_DECL, the function returns true, sets base_misaligned = true
and says the access is then aligned.
But when update_epilogue_loop_vinfo clears base_misaligned with the
assumption that the var had to have the alignment increased already,
the update of DECL_ALIGN doesn't happen anymore.
Now, I'd think this base_alignment = false was needed before
r10-4030-gd2db7f7901 change was committed where it incorrectly
overwrote DECL_ALIGN even if it was already larger, rather than
just always increasing it. But with that change in, it doesn't
make sense to me anymore.
Note, the testcase is latent on the trunk, but reproduces on the 13
branch.
2024-04-05 Jakub Jelinek <jakub@redhat.com>
PR tree-optimization/114566
* tree-vect-loop.cc (update_epilogue_loop_vinfo): Don't clear
base_misaligned.
* gcc.target/i386/avx512f-pr114566.c: New test.
m2 has a m2.dvi build rule, but lacks the m2.install-dvi one.
2024-04-04 Christophe Lyon <christophe.lyon@linaro.org>
gcc/m2/
* Make-lang.in (m2.install-dvi): New rule.
With commit 7520a4992c
"nvptx: In mkoffload.cc, call diagnostic_color_init + gcc_init_libintl",
we regressed:
[-PASS:-]{+FAIL:+} libgomp.c/reverse-offload-sm30.c at line 15 (test for warnings, line )
[-PASS:-]{+FAIL:+} libgomp.c/reverse-offload-sm30.c (test for excess errors)
libgomp/
* testsuite/libgomp.c/reverse-offload-sm30.c: Set 'GCC_COLORS' to the empty string.
Seems configure hasn't been regenerated properly after the last
acinclude.m4 change.
2024-04-05 Jakub Jelinek <jakub@redhat.com>
* configure: Regenerate.
There's no default bitmap obstack during global CTORs, so allocate the
bitmap locally.
PR middle-end/114599
PR gcov-profile/114115
* symtab.cc (ifunc_ref_map): Do not use auto_bitmap.
(is_caller_ifunc_resolver): Optimize bitmap_bit_p/bitmap_set_bit
pair.
(symtab_node::check_ifunc_callee_symtab_nodes): Properly
allocate ifunc_ref_map here.
On Fri, Feb 23, 2024 at 12:18:00PM +0100, Jørgen Kvalsvik wrote:
> This is a mostly straight port from the gcov-19.c tests from the C test
> suite. The only notable differences from C to D are that D flips the
> true/false outcomes for loop headers, and the D front end ties loop and
> ternary conditions to slightly different locus.
>
> The test for >64 conditions warning is disabled as it either needs
> support from the testing framework or a something similar to #pragma GCC
> diagnostic push to not cause a test failure from detecting a warning.
>
> gcc/testsuite/ChangeLog:
>
> * gdc.dg/gcov.exp: New test.
> * gdc.dg/gcov1.d: New test.
Unfortunately, this doesn't work.
I see
PASS: gdc.dg/gcov1.d execution test
ERROR: (DejaGnu) proc "run-gcov conditions { --conditions gcov1.d }" does not exist.
The error code is TCL LOOKUP COMMAND run-gcov
The info on the error is:
invalid command name "run-gcov"
while executing
"::tcl_unknown run-gcov conditions { --conditions gcov1.d }"
("uplevel" body line 1)
invoked from within
"uplevel 1 ::tcl_unknown $args"
ERROR: gdc.dg/gcov1.d : error executing dg-final: invalid command name "run-gcov"
both on x86_64-linux and i686-linux.
The problem is that the test hasn't been added to a new directory, but
to a directory already covered by a different *.exp file - dg.exp.
Now, usually either one has a test directory like gcc.misc-tests where
there are many *.exp files but each *.exp file globs for its own tests,
or there is one *.exp per directory and covers everything in there.
By having both dg.exp and gcov.exp in the same directory with dg.exp
covering all *.d files in there and gcov gcov*.d in there, the gcov*.d
tests are tested twice, once using the dg.exp driver and once using gcov.exp
driver. With the latter, they do work properly, with the former they don't
because gcov.exp lib file isn't loaded and so run-gcov isn't available.
The following patch fixes that similarly how g++.dg/modules/modules.exp,
gcc.target/s390/s390.exp or gcc.target/i386/i386.exp deal with that,
by pruning some tests based on glob patterns from the list.
2024-04-05 Jakub Jelinek <jakub@redhat.com>
* gdc.dg/dg.exp: Prune gcov*.d from the list of tests to run.
* gdc.dg/gcov.exp: Update copyright years.
While ctors/dtors don't return anything (undeclared void or this pointer
on arm) and copy assignment operators normally return a reference to *this,
it isn't invalid to return uselessly some class object which might need
destructing, but the OpenMP clause handling code wasn't expecting that.
The following patch fixes that.
2024-04-05 Jakub Jelinek <jakub@redhat.com>
PR c++/114572
* cp-gimplify.cc (cxx_omp_clause_apply_fn): Call build_cplus_new
on build_call_a result if it has class type.
* testsuite/libgomp.c++/pr114572.C: New test.
go has a go.dvi build rule, but lacks the go.install-dvi one.
2024-04-04 Christophe Lyon <christophe.lyon@linaro.org>
gcc/go/
* Make-lang.in (go.install-dvi): New rule.
After r14-9692-g839bc42772ba7a, a sequence that actually
looks optimal is now emitted, observed at
r14-9788-gb7bd2ec73d66f7. This caused an XPASS for this
test. While adjusting the test, better also guard it
against regressions by checking that there are no redundant
move insns.
That's the only test that's improved to the point of
affecting test-patterns. E.g. pr93372-5.c (which references
pr93372-2.c) is also improved, though it retains a redundant
compare insn. (PR 93372 was about regressions from the cc0
representation; not further improvement like here, thus it's
not tagged. Though, I did not double-check whether this
actually *was* a regression from cc0.)
* gcc.target/cris/pr93372-2.c: Tweak scan-assembler
checks to cover recent combine improvement.
I noticed my autotester for cris-elf flagging this as a regression.
* gcc.dg/debug/btf/btf-datasec-1.c: Adjust pattern for targets with
symbols having a leading underscore.
Fix libatomic build to support --disable-gnu-indirect-function on AArch64.
Always build atomic_16.S, add aliases to the __atomic_ functions if !HAVE_IFUNC.
Include auto-config.h in atomic_16.S to avoid having to pass defines via
makefiles. Fix build if HWCAP_ATOMICS/CPUID are not defined.
libatomic:
PR target/113986
* Makefile.in: Regenerated.
* Makefile.am: Make atomic_16.S not depend on HAVE_IFUNC.
Remove predefine of HAVE_FEAT_LSE128.
* acinclude.m4: Remove ARCH_AARCH64_HAVE_LSE128.
* configure: Regenerated.
* config/linux/aarch64/atomic_16.S: Add __atomic_ alias if !HAVE_IFUNC.
* config/linux/aarch64/host-config.h: Correctly handle !HAVE_IFUNC.
Add defines for HWCAP_ATOMICS and HWCAP_CPUID.
To match all the other places that pull a _TEMPLATE_PARM out of a
_DECL (get_template_parm_index, etc.).
This change is too small to be legally significant for copyright.
PR c++/114377
gcc/cp/ChangeLog:
* pt.cc (find_template_parameter_info::found): Use TREE_TYPE for
TEMPLATE_DECL instead of DECL_INITIAL.
gcc/testsuite/ChangeLog:
* g++.dg/cpp2a/class-deduction-alias19.C: New test.
Reviewed-by: Jason Merrill <jason@redhat.com>
When the analysis part of IPA-SRA figures out that it would split out
a scalar part of an aggregate which is known by IPA-CP to contain a
known constant, it skips it knowing that the transformation part looks
at IPA-CP aggregate results too and does the right thing (which can
include doing the propagation in GIMPLE because that is the last
moment the parameter exists).
However, when IPA-SRA wants to split out a smaller aggregate out
of an aggregate, which happens to be of the same size as a known
scalar constant at the same offset, the transformation bit fails to
recognize the situation, tries to do both splitting and constant
propagation and in PR 111571 testcase creates a nonsensical call
statement on which the call redirection then ICEs.
Fixed by making sure we don't try to do two replacements of the same
part of the same parameter.
The look-up among replacements requires these are sorted and this
patch just sorts them if they are not already sorted before each new
look-up. The worst number of sortings that can happen is number of
parameters which are both split and have aggregate constants times
param_ipa_max_agg_items (default 16). I don't think complicating the
source code to optimize for this unlikely case is worth it but if need
be, it can of course be done.
gcc/ChangeLog:
2024-03-15 Martin Jambor <mjambor@suse.cz>
PR ipa/111571
* ipa-param-manipulation.cc
(ipa_param_body_adjustments::common_initialization): Avoid creating
duplicate replacement entries.
gcc/testsuite/ChangeLog:
2024-03-15 Martin Jambor <mjambor@suse.cz>
PR ipa/111571
* gcc.dg/ipa/pr111571.c: New test.
For the test case, the insn scheduler (working for live range
shrinkage) moves insns modifying stack memory before an insn reserving
the stack memory. Comments in the patch contains more details about
the problem and its solution.
gcc/ChangeLog:
PR rtl-optimization/114415
* sched-deps.cc (add_insn_mem_dependence): Add memory check for mem argument.
(sched_analyze_1): Treat stack pointer modification as memory read.
(sched_analyze_2, sched_analyze_insn): Add memory guard for processing pending_read_mems.
* sched-int.h (deps_desc): Add comment to pending_read_mems.
gcc/testsuite/ChangeLog:
PR rtl-optimization/114415
* gcc.target/i386/pr114415.c: New test.
Define __APX_F__ when APX is enabled.
gcc/
PR target/114587
* config/i386/i386-c.cc (ix86_target_macros_internal): Define
__APX_F__ when APX is enabled.
gcc/testsuite/
PR target/114587
* gcc.target/i386/apx-2.c: New test.
This is a mostly straight port from the gcov-19.c tests from the C test
suite. The only notable differences from C to D are that D flips the
true/false outcomes for loop headers, and the D front end ties loop and
ternary conditions to slightly different locus.
The test for >64 conditions warning is disabled as it either needs
support from the testing framework or a something similar to #pragma GCC
diagnostic push to not cause a test failure from detecting a warning.
gcc/testsuite/ChangeLog:
* gdc.dg/gcov.exp: New test.
* gdc.dg/gcov1.d: New test.
This patch adds support in gcc+gcov for modified condition/decision
coverage (MC/DC) with the -fcondition-coverage flag. MC/DC is a type of
test/code coverage and it is particularly important for safety-critical
applicaitons in industries like aviation and automotive. Notably, MC/DC
is required or recommended by:
* DO-178C for the most critical software (Level A) in avionics.
* IEC 61508 for SIL 4.
* ISO 26262-6 for ASIL D.
From the SQLite webpage:
Two methods of measuring test coverage were described above:
"statement" and "branch" coverage. There are many other test
coverage metrics besides these two. Another popular metric is
"Modified Condition/Decision Coverage" or MC/DC. Wikipedia defines
MC/DC as follows:
* Each decision tries every possible outcome.
* Each condition in a decision takes on every possible outcome.
* Each entry and exit point is invoked.
* Each condition in a decision is shown to independently affect
the outcome of the decision.
In the C programming language where && and || are "short-circuit"
operators, MC/DC and branch coverage are very nearly the same thing.
The primary difference is in boolean vector tests. One can test for
any of several bits in bit-vector and still obtain 100% branch test
coverage even though the second element of MC/DC - the requirement
that each condition in a decision take on every possible outcome -
might not be satisfied.
https://sqlite.org/testing.html#mcdc
MC/DC comes in different flavors, the most important being unique cause
MC/DC and masking MC/DC. This patch implements masking MC/DC, which is
works well with short circuiting semantics, and according to John
Chilenski's "An Investigation of Three Forms of the Modified Condition
Decision Coverage (MCDC) Criterion" (2001) is as good as unique cause at
catching bugs.
Whalen, Heimdahl, and De Silva "Efficient Test Coverage Measurement for
MC/DC" describes an algorithm for finding the masking table from an AST
walk, but my algorithm figures this out by analyzing the control flow
graph. The CFG is considered a reduced ordered binary decision diagram
and an input vector a path through the BDD, which is recorded. Specific
edges will mask ("null out") the contribution from earlier path
segments, which can be determined by finding short circuit endpoints.
Masking is most easily understood as circuiting of terms in the
reverse-ordered Boolean function, and the masked conditions do not
affect the decision like short-circuited conditions do not affect the
decision.
A tag/discriminator mapping from gcond->uid is created during
gimplification and made available through the function struct. The
values are unimportant as long as basic conditions constructed from a
single Boolean expression are given the same identifier. This happens in
the breaking down of ANDIF/ORIF trees, so the coverage generally works
well for frontends that create such trees.
Like Whalen et al this implementation records coverage in fixed-size
bitsets which gcov knows how to interpret. Recording conditions only
requires a few bitwise operations per condition and is very fast, but
comes with a limit on the number of terms in a single boolean
expression; the number of bits in a gcov_unsigned_type (which is usually
typedef'd to uint64_t). For most practical purposes this is acceptable,
and by default a warning will be issued if gcc cannot instrument the
expression. This is a practical limitation in the implementation, and
not a limitation of the algorithm, so support for more conditions can be
supported by introducing arbitrary-sized bitsets.
In action it looks pretty similar to the branch coverage. The -g short
opt carries no significance, but was chosen because it was an available
option with the upper-case free too.
gcov --conditions:
3: 17:void fn (int a, int b, int c, int d) {
3: 18: if ((a && (b || c)) && d)
conditions covered 3/8
condition 0 not covered (true false)
condition 1 not covered (true)
condition 2 not covered (true)
condition 3 not covered (true)
1: 19: x = 1;
-: 20: else
2: 21: x = 2;
3: 22:}
gcov --conditions --json-format:
"conditions": [
{
"not_covered_false": [
0
],
"count": 8,
"covered": 3,
"not_covered_true": [
0,
1,
2,
3
]
}
],
Expressions with constants may be heavily rewritten before it reaches
the gimplification, so constructs like int x = a ? 0 : 1 becomes
_x = (_a == 0). From source you would expect coverage, but it gets
neither branch nor condition coverage. The same applies to expressions
like int x = 1 || a which are simply replaced by a constant.
The test suite contains a lot of small programs and functions. Some of
these were designed by hand to test for specific behaviours and graph
shapes, and some are previously-failed test cases in other programs
adapted into the test suite.
gcc/ChangeLog:
* builtins.cc (expand_builtin_fork_or_exec): Check
condition_coverage_flag.
* collect2.cc (main): Add -fno-condition-coverage to OBSTACK.
* common.opt: Add new options -fcondition-coverage and
-Wcoverage-too-many-conditions.
* doc/gcov.texi: Add --conditions documentation.
* doc/invoke.texi: Add -fcondition-coverage documentation.
* function.cc (free_after_compilation): Free cond_uids.
* function.h (struct function): Add cond_uids.
* gcc.cc: Link gcov on -fcondition-coverage.
* gcov-counter.def (GCOV_COUNTER_CONDS): New.
* gcov-dump.cc (tag_conditions): New.
* gcov-io.h (GCOV_TAG_CONDS): New.
(GCOV_TAG_CONDS_LENGTH): New.
(GCOV_TAG_CONDS_NUM): New.
* gcov.cc (class condition_info): New.
(condition_info::condition_info): New.
(condition_info::popcount): New.
(struct coverage_info): New.
(add_condition_counts): New.
(output_conditions): New.
(print_usage): Add -g, --conditions.
(process_args): Likewise.
(output_intermediate_json_line): Output conditions.
(read_graph_file): Read condition counters.
(read_count_file): Likewise.
(file_summary): Print conditions.
(accumulate_line_info): Accumulate conditions.
(output_line_details): Print conditions.
* gimplify.cc (next_cond_uid): New.
(reset_cond_uid): New.
(shortcut_cond_r): Set condition discriminator.
(tag_shortcut_cond): New.
(gimple_associate_condition_with_expr): New.
(shortcut_cond_expr): Set condition discriminator.
(gimplify_cond_expr): Likewise.
(gimplify_function_tree): Call reset_cond_uid.
* ipa-inline.cc (can_early_inline_edge_p): Check
condition_coverage_flag.
* ipa-split.cc (pass_split_functions::gate): Likewise.
* passes.cc (finish_optimization_passes): Likewise.
* profile.cc (struct condcov): New declaration.
(cov_length): Likewise.
(cov_blocks): Likewise.
(cov_masks): Likewise.
(cov_maps): Likewise.
(cov_free): Likewise.
(instrument_decisions): New.
(read_thunk_profile): Control output to file.
(branch_prob): Call find_conditions, instrument_decisions.
(init_branch_prob): Add total_num_conds.
(end_branch_prob): Likewise.
* tree-core.h (struct tree_exp): Add condition_uid.
* tree-profile.cc (struct conds_ctx): New.
(CONDITIONS_MAX_TERMS): New.
(EDGE_CONDITION): New.
(topological_cmp): New.
(index_of): New.
(single_p): New.
(single_edge): New.
(contract_edge_up): New.
(struct outcomes): New.
(conditional_succs): New.
(condition_index): New.
(condition_uid): New.
(masking_vectors): New.
(emit_assign): New.
(emit_bitwise_op): New.
(make_top_index_visit): New.
(make_top_index): New.
(paths_between): New.
(struct condcov): New.
(cov_length): New.
(cov_blocks): New.
(cov_masks): New.
(cov_maps): New.
(cov_free): New.
(find_conditions): New.
(struct counters): New.
(find_counters): New.
(resolve_counter): New.
(resolve_counters): New.
(instrument_decisions): New.
(tree_profiling): Check condition_coverage_flag.
(pass_ipa_tree_profile::gate): Likewise.
* tree.h (SET_EXPR_UID): New.
(EXPR_COND_UID): New.
libgcc/ChangeLog:
* libgcov-merge.c (__gcov_merge_ior): New.
gcc/testsuite/ChangeLog:
* lib/gcov.exp: Add condition coverage test function.
* g++.dg/gcov/gcov-18.C: New test.
* gcc.misc-tests/gcov-19.c: New test.
* gcc.misc-tests/gcov-20.c: New test.
* gcc.misc-tests/gcov-21.c: New test.
* gcc.misc-tests/gcov-22.c: New test.
* gcc.misc-tests/gcov-23.c: New test.
GCC 14 adds the header file arm_neon_sve_bridge.h to help interface
SVE and Advanced SIMD code. One of the defined idioms is:
svset_neonq (svundef_TYPE (), advsimd_vector)
which simply reinterprets advsimd_vector as an SVE vector without
regard for what's in the upper bits.
GCC was failing to recognise this idiom, which was likely to
significantly hamper adoption.
There is (AFAIK) no good way of representing an extension with
undefined bits in gimple. We could add an internal-only builtin
to represent it, but the current framework makes that somewhat
awkward. It also doesn't seem very forward-looking.
This patch instead goes for the simpler approach of recognising
undefined arguments at expansion time.
gcc/
PR target/114577
* config/aarch64/aarch64-sve-builtins.h (aarch64_sve::lookup_fndecl):
Declare.
* config/aarch64/aarch64-sve-builtins.cc (aarch64_sve::lookup_fndecl):
New function.
* config/aarch64/aarch64-sve-builtins-base.cc (is_undef): Likewise.
(svset_neonq_impl::expand): Optimise expansions whose first argument
is undefined.
gcc/testsuite/
PR target/114577
* gcc.target/aarch64/sve/acle/general/pr114577_1.c: New test.
* gcc.target/aarch64/sve/acle/general/pr114577_2.c: Likewise.
We can't use vect_update_ivs_after_vectorizer for partial vectors,
the following fixes vect_can_peel_nonlinear_iv_p accordingly.
PR tree-optimization/114485
* tree-vect-loop-manip.cc (vect_can_peel_nonlinear_iv_p):
vect_step_op_neg isn't OK for partial vectors but only
for unknown niter.
* gcc.dg/vect/pr114485.c: New testcase.
The following testcase is incorrectly rejected. The problem is that
for bit-fields native_encode_initializer expects the corresponding
CONSTRUCTOR elt value must be INTEGER_CST, but that isn't the case
here, it is wrapped into NON_LVALUE_EXPR by maybe_wrap_with_location.
We could STRIP_ANY_LOCATION_WRAPPER as well, but as all we are looking for
is INTEGER_CST inside, just looking through NON_LVALUE_EXPR seems easier.
2024-04-04 Jakub Jelinek <jakub@redhat.com>
PR c++/114537
* fold-const.cc (native_encode_initializer): Look through
NON_LVALUE_EXPR if val is INTEGER_CST.
* g++.dg/cpp2a/bit-cast16.C: New test.
We ICE on the following testcase, because we use result of a PHI node
which is only conditional because of a m_cast_conditional on the outermost
loops PHI node argument and so is invalid SSA form.
The following patch fixes it like similar cases elsewhere by adding
needed intervening PHI(s).
2024-04-04 Jakub Jelinek <jakub@redhat.com>
PR tree-optimization/114555
* gimple-lower-bitint.cc (bitint_large_huge::handle_cast): For
m_bitfld_load and save_cast_conditional add any needed PHIs
and adjust t4 accordingly.
* gcc.dg/bitint-103.c: New test.
* gcc.dg/bitint-104.c: New test.
When loop splitting hoists a guard computation it needs to make sure
that can be safely evaluated at this place when it was previously
only conditionally evaluated. The following fixes this for the
case of undefined overflow.
PR tree-optimization/114551
* tree-ssa-loop-split.cc (split_loop): If the guard is
only conditionally evaluated rewrite computations with
possibly undefined overflow to unsigned arithmetic.
* gcc.dg/torture/pr114551.c: New testcase.
auto-profile currently doesn't guarantee that it will set probabilities
on all edges because of zero basic block counts. Normally those edges
just have probabilities set by the preceding profile_estimate pass but
under -O0 profile_estimate pass doesn't run. The patch removes setting
of full_profile to true in auto-profile.
Tested on x86_64-pc-linux-gnu.
gcc/ChangeLog:
PR gcov-profile/113765
* auto-profile.cc (afdo_annotate_cfg): Don't set full_profile to true
