For deferred macros we also need a new field on the macro itself, so
that the module machinery can determine the macro was imported. Also
the documentation for the hashnode's deferred field was incomplete.
libcpp/
* include/cpplib.h (struct cpp_macro): Add imported_p field.
(struct cpp_hashnode): Tweak deferred field documentation.
* macro.c (_cpp_new_macro): Clear new field.
(cpp_get_deferred_macro, get_deferred_or_lazy_macro): Assert
more.
Similarly to UNKNOWN permutes, TOP needs to be excluded from being considered
for blends because it produces no permute to check.
gcc/ChangeLog:
PR middle-end/98264
* tree-vect-slp-patterns.c (linear_loads_p): Exclude TOP permute.
gcc/testsuite/ChangeLog:
PR middle-end/98264
* gcc.target/i386/pr98264.c: New test.
Commit 2ead1ab911 ("Limit perf data buffer during profiling") added
-m8 to perf invocations during running tests, but the same problem
exists for checking whether perf is working in the first place.
gcc/testsuite/ChangeLog:
2020-12-08 Ilya Leoshkevich <iii@linux.ibm.com>
* lib/target-supports.exp(check_profiling_available): Limit
perf data buffer.
This patch enables MVE vneg instructions for auto-vectorization. MVE
vnegq insns in mve.md are modified to use 'neg' instead of unspec
expression. The neg<mode>2 expander is added to vec-common.md.
Existing patterns in neon.md are prefixed with neon_.
It's not clear why we have different patterns for VDQW
and VH in neon.md, when WDQWH handles both, and patterns
with VDQ have provision for attributes for FP modes.
Another question is why <absneg_str><mode>2 always sets
neon_abs<q> type when it also handles neon_neq<q> cases.
2020-12-11 Christophe Lyon <christophe.lyon@linaro.org>
gcc/
* config/arm/mve.md (mve_vnegq_f): Use 'neg' instead of unspec.
(mve_vnegq_s): Likewise.
* config/arm/neon.md (neg<mode>2): Rename into neon_neg<mode>2.
(<absneg_str><mode>2): Rename into neon_<absneg_str><mode>2.
(neon_v<absneg_str><mode>): Call gen_neon_<absneg_str><mode>2.
(vashr<mode>3): Call gen_neon_neg<mode>2.
(vlshr<mode>3): Call gen_neon_neg<mode>2.
(neon_vneg<mode>): Call gen_neon_neg<mode>2.
* config/arm/unspecs.md (VNEGQ_F, VNEGQ_S): Remove.
* config/arm/vec-common.md (neg<mode>2): New expander.
gcc/testsuite/
* gcc.target/arm/simd/mve-vneg.c: Add tests for vneg.
This patch enables MVE vmvnq instructions for auto-vectorization. MVE
vmvnq insns in mve.md are modified to use 'not' instead of unspec
expression to support one_cmpl<mode>2. The one_cmpl<mode>2 expander
is added to vec-common.md.
2020-12-11 Christophe Lyon <christophe.lyon@linaro.org>
gcc/
* config/arm/iterators.md (VDQNOTM2): New mode iterator.
(supf): Remove VMVNQ_S and VMVNQ_U.
(VMVNQ): Remove.
* config/arm/mve.md (mve_vmvnq_u<mode>): New entry for vmvn
instruction using expression not.
(mve_vmvnq_s<mode>): New expander.
* config/arm/neon.md (one_cmpl<mode>2): Renamed into
one_cmpl<mode>2_neon.
* config/arm/unspecs.md (VMVNQ_S, VMVNQ_U): Remove.
* config/arm/vec-common.md (one_cmpl<mode>2): New expander.
gcc/testsuite/
* gcc.target/arm/simd/mve-vmvn.c: Add tests for vmvn.
This patch enables MVE vbic instructions for auto-vectorization. MVE
vbicq insns in mve.md are modified to use 'and not' instead of unspec
expression.
2020-12-11 Christophe Lyon <christophe.lyon@linaro.org>
gcc/
* config/arm/iterators.md (supf): Remove VBICQ_S and VBICQ_U.
(VBICQ): Remove.
* config/arm/mve.md (mve_vbicq_u<mode>): New entry for vbic
instruction using expression and not.
(mve_vbicq_s<mode>): New expander.
(mve_vbicq_f<mode>): Replace use of unspec by 'and not'.
* config/arm/unspecs.md (VBICQ_S, VBICQ_U, VBICQ_F): Remove.
gcc/testsuite/
* gcc.target/arm/simd/mve-vbic.c: Add tests for vbic.
This patch enables MVE veorq instructions for auto-vectorization. MVE
veorq insns in mve.md are modified to use xor instead of unspec
expression to support xor<mode>3. The xor<mode>3 expander is added to
vec-common.md
2020-12-11 Christophe Lyon <christophe.lyon@linaro.org>
gcc/
* config/arm/iterators.md (supf): Remove VEORQ_S and VEORQ_U.
(VEORQ): Remove.
* config/arm/mve.md (mve_veorq_u<mode>): New entry for veor
instruction using expression xor.
(mve_veorq_s<mode>): New expander.
(mve_veorq_f<mode>): Use 'xor' code instead of unspec.
* config/arm/neon.md (xor<mode>3): Renamed into xor<mode>3_neon.
* config/arm/unspecs.md (VEORQ_S, VEORQ_U, VEORQ_F): Remove.
* config/arm/vec-common.md (xor<mode>3): New expander.
gcc/testsuite/
* gcc.target/arm/simd/mve-veor.c: Add tests for veor.
This patch fixes typos in effective targets which otherwise lead to
DejaGnu errors.
It also replaces dg-additional-options with dg-options to avoid
compiling with -ansi -pedantic-errors, resulting in
error: ISO C does not support the '_Float16' type [-Wpedantic]
2020-12-14 Christophe Lyon <christophe.lyon@linaro.org>
gcc/testsuite/
* gcc.target/arm/vect-half-floats.c: Fix typos.
This patch adds support for -mcpu=cortex-a78c command line option.
For more information about this processor, see [0]:
[0] https://developer.arm.com/ip-products/processors/cortex-a/cortex-a78c
gcc/ChangeLog:
* config/aarch64/aarch64-cores.def (AARCH64_CORE): Add Cortex-A78C core.
* config/aarch64/aarch64-tune.md: Regenerate.
* doc/invoke.texi: Update docs.
gcc/:
* godump.c (go_output_typedef): Suppress typedefs whose name
matches the tag of the underlying struct, union, or enum.
Output declarations for enums that do not appear in typedefs.
gcc/testsuite:
* gcc.misc-tests/godump-1.c: Add test cases.
libstdc++-v3/ChangeLog:
* testsuite/23_containers/array/debug/back2_neg.cc: target c++14 because assertion
for constexpr is disabled in C++11.
* testsuite/23_containers/array/debug/front2_neg.cc: Likewise.
* testsuite/23_containers/array/debug/square_brackets_operator2_neg.cc: Likewise.
* testsuite/23_containers/vector/debug/multithreaded_swap.cc: Include <memory>
for shared_ptr.
Avoid the possibility of code discrepancies like one fixed with the
previous change and improve the structure of code by selecting between
push and non-push operations in a single place in `vax_output_int_move'.
The PUSHAB/MOVAB address moves are never actually produced from this
code as the SImode invocation of this function is guarded with the
`nonsymbolic_operand' predicate, but let's not mess up with this code
too much on this occasion and keep the piece in place.
* config/vax/vax.c (vax_output_int_move): Unify push operation
selection.
Check the output operand for representing pushing a value onto the stack
rather than the constant 0 input in determining whether to use the PUSHL
or the CLRL instruction for a SImode move. The latter actually works by
means of using the predecrement addressing mode with the SP register and
the machine code produced even takes the same number of bytes, however
at least with some VAX implementations it incurs a performance penalty.
Besides, we don't want to check the wrong operand anyway and have code
that works by chance only.
Add a test case covering push operations; for operands different from
constant zero there is actually a code size advantage for using PUSHL
rather than the equivalent MOVL instruction.
gcc/
* config/vax/vax.c (vax_output_int_move): Check the correct
operand for constant 0 push operation.
gcc/testsuite/
* gcc.target/vax/push.c: New test.
Remove an assertion the failure of which has not been actually observed,
but which appears clearly dangerous, for when the QMATH DImode add/sub
handler is invoked with the subtrahend and the minuend both the same.
Instead handle the operation by emitting a move of constant 0 to the
output operand. Adjust the relevant inline comment accordingly.
gcc/
* config/vax/vax.c (vax_expand_addsub_di_operands): Handle equal
input operands with subtraction.
Handle constant 0 passed to the QMATH DImode add/sub handler such as
with:
#2 0x0000000011d409b0 in gen_adddi3 (operand0=0x7ffff5c0a128,
operand1=0x7ffff5c60480, operand2=0x7ffff5c60470)
at .../gcc/config/vax/vax.md:755
755 "vax_expand_addsub_di_operands (operands, PLUS); DONE;")
(gdb) pr operand0
(reg:DI 31)
(gdb) pr operand1
(const_int 0 [0])
(gdb) pr operand2
(const_int -1 [0xffffffffffffffff])
(gdb)
causing an assertion in `vax_expand_addsub_di_operands':
gcc_assert (operands[1] != const0_rtx || code == MINUS);
to trigger:
during RTL pass: expand
.../gcc/testsuite/gcc.c-torture/compile/sync-1.c: In function 'test_op_ignore':
.../gcc/testsuite/gcc.c-torture/compile/sync-1.c:33:10: internal compiler error: in vax_expand_addsub_di_operands, at config/vax/vax.c:2080
0x11815003 vax_expand_addsub_di_operands(rtx_def**, rtx_code)
.../gcc/config/vax/vax.c:2080
0x11d409af gen_adddi3(rtx_def*, rtx_def*, rtx_def*)
.../gcc/config/vax/vax.md:755
0x10ea2763 rtx_insn* insn_gen_fn::operator()<rtx_def*, rtx_def*, rtx_def*>(rtx_def*, rtx_def*, rtx_def*) const
.../gcc/recog.h:304
0x10f7fc8f maybe_gen_insn(insn_code, unsigned int, expand_operand*)
.../gcc/optabs.c:7402
0x10f67f8b expand_binop_directly
.../gcc/optabs.c:1122
0x10f684cf expand_binop(machine_mode, optab_tag, rtx_def*, rtx_def*, rtx_def*, int, optab_methods)
.../gcc/optabs.c:1209
0x10f6fb4f expand_unop(machine_mode, optab_tag, rtx_def*, rtx_def*, int)
.../gcc/optabs.c:3013
0x10f6c493 expand_simple_unop(machine_mode, rtx_code, rtx_def*, rtx_def*, int)
.../gcc/optabs.c:2200
0x10f7e2f3 expand_atomic_fetch_op(rtx_def*, rtx_def*, rtx_def*, rtx_code, memmodel, bool)
.../gcc/optabs.c:7021
0x107f7523 expand_builtin_sync_operation
.../gcc/builtins.c:7605
0x107ff547 expand_builtin(tree_node*, rtx_def*, rtx_def*, machine_mode, int)
.../gcc/builtins.c:9430
0x10acda63 expand_expr_real_1(tree_node*, rtx_def*, machine_mode, expand_modifier, rtx_def**, bool)
.../gcc/expr.c:11249
0x10abeb9f expand_expr_real(tree_node*, rtx_def*, machine_mode, expand_modifier, rtx_def**, bool)
.../gcc/expr.c:8486
0x1085606b expand_expr
.../gcc/expr.h:282
0x1086157f expand_call_stmt
.../gcc/cfgexpand.c:2709
0x10865ab7 expand_gimple_stmt_1
.../gcc/cfgexpand.c:3713
0x108662fb expand_gimple_stmt
.../gcc/cfgexpand.c:3877
0x10870387 expand_gimple_basic_block
.../gcc/cfgexpand.c:5918
0x10872b6b execute
.../gcc/cfgexpand.c:6602
Please submit a full bug report,
with preprocessed source if appropriate.
Please include the complete backtrace with any bug report.
See <https://gcc.gnu.org/bugs/> for instructions.
compiler exited with status 1
FAIL: gcc.c-torture/compile/sync-1.c -O0 (internal compiler error)
causing numerous failures in regression testing.
While requesting an addition operation to be produced for the constant
operands of 0 and -1 may seem silly, technically there is nothing wrong
with it, and non-QMATH code (as with the `-mno-qmath' option) has no
issues with that, so neither should QMATH code. This operation will
normally be folded in later passes anyway.
Observe then, that adding or subtracting constant 0 amounts to a move
(and we even have a machine instruction available to do that with a
single operation) so handle the case explicitly, swapping the addends if
so required, removing the assertion failure and along with that 70 test
suite failures like:
FAIL: gcc.c-torture/compile/sync-1.c -O0 (internal compiler error)
FAIL: gcc.c-torture/compile/sync-1.c -O0 fetch_and_nand (test for warnings, line )
FAIL: gcc.c-torture/compile/sync-1.c -O0 nand_and_fetch (test for warnings, line )
FAIL: gcc.c-torture/compile/sync-1.c -O0 (test for excess errors)
FAIL: gcc.c-torture/compile/sync-2.c -O0 (internal compiler error)
FAIL: gcc.c-torture/compile/sync-2.c -O0 (test for warnings, line )
FAIL: gcc.c-torture/compile/sync-2.c -O0 (test for excess errors)
FAIL: gcc.c-torture/compile/sync-3.c -O0 (internal compiler error)
FAIL: gcc.c-torture/compile/sync-3.c -O0 (test for warnings, line )
FAIL: gcc.c-torture/compile/sync-3.c -O0 (test for excess errors)
and similarly across all the other optimization levels and compilation
options covered.
gcc/
* config/vax/vax.c (vax_expand_addsub_di_operands): Handle the
addition or subtraction of 0.
An allocation is made for a temporary register, however it is unneeded,
as actually explained in the comment preceding the conditional block in
question, and consequently never used, so remove it. The `temp' rtx is
already used elsewhere in the function, which is possibly why this dead
assignment has not been warned about.
gcc/
* config/vax/vax.c (vax_expand_addsub_di_operands): Remove
unused register allocation.
Fix an issue with the `casesi' expander using `GEN_INT' to produce the
constant rtx for lower bound adjustment. This generates a VOIDmode
value which may overflow the SImode range required for the operand to
stay within to satisfy `general_operand', resulting in an ICE like:
.../gcc/testsuite/gcc.c-torture/compile/pr46934.c: In function 'caller':
.../gcc/testsuite/gcc.c-torture/compile/pr46934.c:17:1: error: unrecognizable insn:
(insn 5 2 6 2 (set (reg:SI 25)
(plus:SI (mem/c:SI (reg/f:SI 17 virtual-incoming-args) [1 reg_type+0 S4 A32])
(const_int 2147483648 [0x80000000]))) -1
(nil))
during RTL pass: vregs
.../gcc/testsuite/gcc.c-torture/compile/pr46934.c:17:1: internal compiler error: in extract_insn, at recog.c:2315
0x110d4673 _fatal_insn(char const*, rtx_def const*, char const*, int, char const*)
.../gcc/rtl-error.c:108
0x110d46eb _fatal_insn_not_found(rtx_def const*, char const*, int, char const*)
.../gcc/rtl-error.c:116
0x1106578b extract_insn(rtx_insn*)
.../gcc/recog.c:2315
0x10b63f73 instantiate_virtual_regs_in_insn
.../gcc/function.c:1609
0x10b65b2f instantiate_virtual_regs
.../gcc/function.c:1979
0x10b65ca7 execute
.../gcc/function.c:2028
Please submit a full bug report,
with preprocessed source if appropriate.
Please include the complete backtrace with any bug report.
See <https://gcc.gnu.org/bugs/> for instructions.
compiler exited with status 1
FAIL: gcc.c-torture/compile/pr46934.c -O0 (internal compiler error)
Use `gen_int_mode' to produce the rtx instead, requesting a SImode value
so that the constant gets correctly truncated:
@@ -199,7 +199,7 @@ caller (unsigned int reg_type)
(insn 5 4 6 (set (reg:SI 25)
(plus:SI (mem/c:SI (reg/f:SI 17 virtual-incoming-args) [1 reg_type+0 S4 A32])
- (const_int 2147483648 [0x80000000]))) -1
+ (const_int -2147483648 [0xffffffff80000000]))) -1
(nil))
(jump_insn 6 5 7 (set (pc)
removing these test suite failures:
FAIL: gcc.c-torture/compile/pr46934.c -O0 (internal compiler error)
FAIL: gcc.c-torture/compile/pr46934.c -O0 (test for excess errors)
with the `vax-netbsdelf' target.
gcc/
* config/vax/vax.md (casesi): Use `gen_int_mode' rather than
`GEN_INT' for the immediate used for lower bound adjustment.
Unfortunately, my latest tree-ssa-math-opts.c patch broke the following
testcase. The problem is that the code is adding .ADD_OVERFLOW or
.SUB_OVERFLOW before or after the stmt on which the function has been
called, which is normally a addition or subtraction that has all the
operands.
But in the a > ~b optimization that stmt is the ~b stmt and the other
comparison operand might be defined only after that ~b stmt, so we can't
insert the .ADD_OVERFLOW next to ~b that we want to delete, but need to
insert it before the a > temp comparison that uses it; and in that case
when removing the BIT_NOT_EXPR stmt we need to ensure the caller doesn't do
gsi_next because gsi_remove already points the iterator to the next stmt.
2020-12-13 Jakub Jelinek <jakub@redhat.com>
PR tree-optimization/98256
* tree-ssa-math-opts.c (match_uaddsub_overflow): For BIT_NOT_EXPR,
only handle a single use, and insert .ADD_OVERFLOW before the
comparison rather than after the BIT_NOT_EXPR. Return true iff
it is BIT_NOT_EXPR and it has been removed.
(math_opts_dom_walker::after_dom_children) <case BIT_NOT_EXPR>:
If match_uaddsub_overflow returned true, continue instead of break.
* gcc.c-torture/compile/pr98256.c: New test.
The following patch rejects frame, argp and retarg registers (unless they are equal
to hard frame pointer registers or if they aren't eliminable) from local or global
register vars.
These are just internal implementation details eliminated later into hard
frame pointer or stack pointer and using them as register variable leads
to numerous ICEs.
2020-12-13 Jakub Jelinek <jakub@redhat.com>
PR target/92469
* varasm.c (eliminable_regno_p): New function.
(make_decl_rtl): Reject asm vars for frame and argp
if they are different from hard frame pointer.
* gcc.target/i386/pr92469.c: New test.
* gcc.target/i386/pr79804.c: Adjust expected diagnostics.
* gcc.target/i386/pr88178.c: Expect an error.
This adds support to the auto-vectorizer to support HFmode vectorization for
AArch32. This is supported when +fp16 is used. I wonder if I should disable
the returning of the type if the option isn't enabled.
At the moment it will be returned but the vectorizer will try and fail to use
it. It wastes a few compile cycles but doesn't result in bad code.
gcc/ChangeLog:
* config/arm/arm.c (arm_preferred_simd_mode): Add E_HFmode.
gcc/testsuite/ChangeLog:
* gcc.target/arm/vect-half-floats.c: New test.
This patch adds support for
* Complex Addition with rotation of 90 and 270.
Addition with rotation of the second argument around the Argand plane.
Supported rotations are 90 and 180.
c = a + (b * I) and c = a + (b * I * I * I)
gcc/ChangeLog:
* tree-vect-slp-patterns.c: New file.
* Makefile.in: Add it.
* doc/passes.texi: Document it.
* internal-fn.def (COMPLEX_ADD_ROT90, COMPLEX_ADD_ROT270): New.
* optabs.def (cadd90_optab, cadd270_optab): New.
* doc/md.texi: Document them.
* tree-vect-loop.c (vect_analyze_loop_2): Add dissolve code.
* tree-vect-slp.c:
(vect_free_slp_instance, vect_create_new_slp_node): Export.
(vect_match_slp_patterns_2, vect_match_slp_patterns): New.
(vect_analyze_slp): Use it.
* tree-vectorizer.h (vect_free_slp_tree): Export.
(enum _complex_operation): Forward declare.
(class vect_pattern): New
gcc/testsuite/ChangeLog:
* lib/target-supports.exp
(check_effective_target_arm_v8_3a_complex_neon_ok_nocache): Fix it.
(check_effective_target_vect_complex_add_byte
,check_effective_target_vect_complex_add_int
,check_effective_target_vect_complex_add_short
,check_effective_target_vect_complex_add_long
,check_effective_target_vect_complex_add_half
,check_effective_target_vect_complex_add_float
,check_effective_target_vect_complex_add_double): New.
* gcc.dg/vect/complex/bb-slp-complex-add-pattern-byte.c: New test.
* gcc.dg/vect/complex/bb-slp-complex-add-pattern-int.c: New test.
* gcc.dg/vect/complex/bb-slp-complex-add-pattern-long.c: New test.
* gcc.dg/vect/complex/bb-slp-complex-add-pattern-short.c: New test.
* gcc.dg/vect/complex/bb-slp-complex-add-pattern-unsigned-byte.c: New test.
* gcc.dg/vect/complex/bb-slp-complex-add-pattern-unsigned-int.c: New test.
* gcc.dg/vect/complex/bb-slp-complex-add-pattern-unsigned-long.c: New test.
* gcc.dg/vect/complex/bb-slp-complex-add-pattern-unsigned-short.c: New test.
* gcc.dg/vect/complex/complex-add-pattern-template.c: New test.
* gcc.dg/vect/complex/complex-add-template.c: New test.
* gcc.dg/vect/complex/complex-operations-run.c: New test.
* gcc.dg/vect/complex/complex-operations.c: New test.
* gcc.dg/vect/complex/complex.exp: New test.
* gcc.dg/vect/complex/fast-math-bb-slp-complex-add-double.c: New test.
* gcc.dg/vect/complex/fast-math-bb-slp-complex-add-float.c: New test.
* gcc.dg/vect/complex/fast-math-bb-slp-complex-add-half-float.c: New test.
* gcc.dg/vect/complex/fast-math-bb-slp-complex-add-pattern-double.c: New test.
* gcc.dg/vect/complex/fast-math-bb-slp-complex-add-pattern-float.c: New test.
* gcc.dg/vect/complex/fast-math-bb-slp-complex-add-pattern-half-float.c: New test.
* gcc.dg/vect/complex/fast-math-complex-add-double.c: New test.
* gcc.dg/vect/complex/fast-math-complex-add-float.c: New test.
* gcc.dg/vect/complex/fast-math-complex-add-half-float.c: New test.
* gcc.dg/vect/complex/fast-math-complex-add-pattern-double.c: New test.
* gcc.dg/vect/complex/fast-math-complex-add-pattern-float.c: New test.
* gcc.dg/vect/complex/fast-math-complex-add-pattern-half-float.c: New test.
* gcc.dg/vect/complex/vect-complex-add-pattern-byte.c: New test.
* gcc.dg/vect/complex/vect-complex-add-pattern-int.c: New test.
* gcc.dg/vect/complex/vect-complex-add-pattern-long.c: New test.
* gcc.dg/vect/complex/vect-complex-add-pattern-short.c: New test.
* gcc.dg/vect/complex/vect-complex-add-pattern-unsigned-byte.c: New test.
* gcc.dg/vect/complex/vect-complex-add-pattern-unsigned-int.c: New test.
* gcc.dg/vect/complex/vect-complex-add-pattern-unsigned-long.c: New test.
* gcc.dg/vect/complex/vect-complex-add-pattern-unsigned-short.c: New test.
This is a small refactoring which exposes some helper functions in the
vectorizer so they can be used in other places.
gcc/ChangeLog:
* tree-vect-patterns.c (vect_mark_pattern_stmts): Remove static inline.
* tree-vect-slp.c (vect_create_new_slp_node): Remove static and only
set smts if valid.
* tree-vectorizer.c (vec_info::add_pattern_stmt): New.
(vec_info::set_vinfo_for_stmt): Optionally enforce read-only.
* tree-vectorizer.h (struct _slp_tree): Use new types.
(lane_permutation_t, lane_permutation_t): New.
(vect_create_new_slp_node, vect_mark_pattern_stmts): New.
This patch addresses some of the issues that I found when looking into the
failures of the scan-assembler-symbol-section tests on Solaris/SPARC.
* The first issue was that on Solaris/SPARC, section names are
double-quoted, both with as and gas:
.section ".text"
When using as, the section flag and type syntax is completely
different from other ELF targets:
.section "my_named_section",#alloc,#execinstr,#progbits
This patch fixes this by stripping double quotes from section names.
* However, this didn't work initially (only the leading quote was
stripped), which is due to David's recent AIX patch: with the
introduction of the new capturing group to handle both .section (ELF)
and .csect (XCOFF), $full_section_directive would never be empty on
ELF and Mach-O targets, so the extraction of the section name didn't
work any longer. This had also broken the Darwin tests completely.
* With working double quote stripping, all but one of the tests PASSed
on Solaris/SPARC, the exception being:
FAIL: gcc.dg/20021029-1.c scan-assembler-symbol-section symbol ar (found __sparc_get_pc_thunk.l7) has section ^\\\\.(const|rodata)|\\\\[RO\\\\] (found .text.__sparc_get_pc_thunk.l7%__sparc_get_pc_thunk.l7)
This is due to the symbol name (ar) not being anchored in the test and
unexpectedly matchting __sparc_get_pc_thunk.l7.
* Next, I ran the tests on Darwin 11 and found two failing tests:
FAIL: gcc.dg/darwin-sections.c scan-assembler-symbol-section symbol ^_a\$ (symbol not found) has section \\\\.data
FAIL: gcc.dg/darwin-sections.c scan-assembler-symbol-section symbol ^_b\$ (symbol not found) has section \\\\.data
is due to Iain's recent "Darwin : Begin rework of zero-fill sections."
patch which emits
.globl _a
.zerofill __DATA,__common,_a,1,0
This is already scanned for, so the two scans above can just go.
The other failing test is
FAIL: g++.dg/gomp/tls-5.C -std=c++14 scan-assembler-symbol-section symbol ^_?_ZGR2ir_\$ (symbol not found) has section ^\\\\.tdata|\\\\[TL\\\\]
FAIL: g++.dg/gomp/tls-5.C -std=c++14 scan-assembler-symbol-section symbol ^_?ir\$ (symbol not found) has section ^\\\\.tbss|\\\\[TL\\\\]
Other scans are guarded by target tls_native, and indeed the assembler
output has
___emutls_v._ZGR2ir_:
___emutls_t._ZGR2ir_:
___emutls_v.ir:
Unfortunately scan-assembler-symbol-section doesn't support selects
yet, which this test implements both for the benefit of this test and
for symmetry.
With those changes, test results are clean now on sparc-sun-solaris2.11,
i386-pc-solaris2.11, i386-apple-darwin11.4.2, and
powerpc-ibm-aix7.2.4.0.
2020-12-03 Rainer Orth <ro@CeBiTec.Uni-Bielefeld.DE>
gcc:
* doc/sourcebuild.texi (Commands for use in dg-final, Scan the
assembly output, scan-assembler-symbol-section): Document.
(scan-symbol-section): Document.
gcc/testsuite:
* lib/scanasm.exp (scan-symbol-section): Pass args to
dg-scan-symbol-section.
(scan-assembler-symbol-section): Likewise.
(dg-scan-symbol-section): Handle selector from orig_args.
Get patterns from orig_args.
(parse_section_of_symbols): Fix section_pattern.
Strip double quotes from section name.
* g++.dg/gomp/tls-5.C: Restrict ir, _ZGR2ir_ scans to tls_native.
* gcc.dg/20021029-1.c: Anchor ar symbol.
* gcc.dg/darwin-sections.c: Remove obsolete scans for _a, _b in
.data.
At the moment, class hierarchies that use is_a are expected
to define specialisations like:
template <>
template <>
inline bool
is_a_helper <cgraph_node *>::test (symtab_node *p)
{
return p->type == SYMTAB_FUNCTION;
}
But this doesn't scale well to larger hierarchies, because it only
defines ::test for an argument that is exactly “symtab_node *”
(and not for example “const symtab_node *” or something that
comes between cgraph_node and symtab_node in the hierarchy).
For example:
struct A { int x; };
struct B : A {};
struct C : B {};
template <>
template <>
inline bool
is_a_helper <C *>::test (A *a)
{
return a->x == 1;
}
bool f(B *b) { return is_a<C *> (b); }
gives:
warning: inline function ‘static bool is_a_helper<T>::test(U*) [with U = B; T = C*]’ used but never defined
and:
bool f(const A *a) { return is_a<const C *> (a); }
gives:
warning: inline function ‘static bool is_a_helper<T>::test(U*) [with U = const A; T = const C*]’ used but never defined
This patch instead allows is_a to be implemented by specialising
is_a_helper as a whole, for example:
template<>
struct is_a_helper<C *> : static_is_a_helper<C *>
{
static inline bool test (const A *a) { return a->x == 1; }
};
It also adds a general specialisation of is_a_helper for const
pointers. Together, this makes both of the above examples work.
gcc/
* is-a.h (reinterpret_is_a_helper): New class.
(static_is_a_helper): Likewise.
(is_a_helper): Inherit from reinterpret_is_a_helper.
(is_a_helper<const T *>): New specialization.
A later patch will add more iterator-related utilities. Rather than
putting them all directly in coretypes.h, it seemed better to add a
new header file, here called "iterator-utils.h". This preliminary
patch moves the existing iterator_range class there too.
I used the same copyright date range as coretypes.h “just to be sure”.
gcc/
* coretypes.h (iterator_range): Move to...
* iterator-utils.h: ...this new file.
noop_move_p currently keeps any instruction that has a REG_EQUAL
note, on the basis that the equality might be useful in future.
But this creates a perverse incentive not to add potentially-useful
REG_EQUAL notes, in case they prevent an instruction from later being
removed as dead.
The condition originates from flow.c:life_analysis_1 and predates
the changes tracked by the current repository (1992). It probably
made sense when most optimisations were done on RTL rather than FE
trees, but it seems counterproductive now.
gcc/
* rtlanal.c (noop_move_p): Don't check for REG_EQUAL notes.
I noticed during compatibility testing that clang warns that this
operator won't be implicitly const in C++14 onwards.
gcc/
* vec.h (vnull::operator vec<T, A, L>): Make const.
The __glibcxx_check_can_[increment|decrement]_range macros are using the
_GLIBCXX_DEBUG_VERIFY_COND_AT macro which is not constexpr compliant and will produce nasty
diagnostics rather than the std::__failed_assertion dedicated to constexpr. Replace it with
correct _GLIBCXX_DEBUG_VERIFY_AT_F.
libstdc++-v3/ChangeLog:
* include/debug/macros.h (__glibcxx_check_can_increment_range): Replace
_GLIBCXX_DEBUG_VERIFY_COND_AT usage with _GLIBCXX_DEBUG_VERIFY_AT_F.
(__glibcxx_check_can_decrement_range): Likewise.
* testsuite/25_algorithms/copy_backward/constexpr.cc (test03): New.
* testsuite/25_algorithms/copy/debug/constexpr_neg.cc: New test.
* testsuite/25_algorithms/copy_backward/debug/constexpr_neg.cc: New test.
* testsuite/25_algorithms/equal/constexpr_neg.cc: New test.
* testsuite/25_algorithms/equal/debug/constexpr_neg.cc: New test.
2020-12-12 Paul Thomas <pault@gcc.gnu.org>
gcc/fortran
PR fortran/98022
* data.c (gfc_assign_data_value): Handle inquiry references in
the data statement object list.
gcc/testsuite/
PR fortran/98022
* gfortran.dg/data_inquiry_ref.f90: New test.
This patch adds the ~(X - Y) -> ~X + Y simplification requested
in the PR (plus also ~(X + C) -> ~X + (-C) for constants C that can
be safely negated.
The first two simplify blocks is what has been requested in the PR
and that makes the first testcase pass.
Unfortunately, that change also breaks the second testcase, because
while the same expressions appearing in the same stmt and split
across multiple stmts has been folded (not really) before, with
this optimization fold-const.c optimizes ~X + Y further into
(Y - X) - 1 in fold_binary_loc associate: code, but we have nothing
like that in GIMPLE and so end up with different expressions.
The last simplify is an attempt to deal with just this case,
had to rule out there the Y == -1U case, because then we
reached infinite recursion as ~X + -1U was canonicalized by
the pattern into (-1U - X) + -1U but there is a canonicalization
-1 - A -> ~A that turns it back. Furthermore, had to make it #if
GIMPLE only, because it otherwise resulted in infinite recursion
when interacting with the associate: optimization.
The end result is that we pass all 3 testcases and thus canonizalize
the 3 possible forms of writing the same thing.
2020-12-12 Jakub Jelinek <jakub@redhat.com>
PR tree-optimization/96685
* match.pd (~(X - Y) -> ~X + Y): New optimization.
(~X + Y -> (Y - X) - 1): Likewise.
* gcc.dg/tree-ssa/pr96685-1.c: New test.
* gcc.dg/tree-ssa/pr96685-2.c: New test.
* gcc.dg/tree-ssa/pr96685-3.c: New test.
The following patch recognizes another form of hand written
__builtin_add_overflow (this time _p), in particular when
the code does unsigned
if (x > ~0U - y)
or
if (x <= ~0U - y)
it can be optimized (if the subtraction turned into ~y is single use)
into
if (__builtin_add_overflow_p (x, y, 0U))
or
if (!__builtin_add_overflow_p (x, y, 0U))
and generate better code, e.g. for the first function in the testcase:
- movl %esi, %eax
addl %edi, %esi
- notl %eax
- cmpl %edi, %eax
- movl $-1, %eax
- cmovnb %esi, %eax
+ jc .L3
+ movl %esi, %eax
+ ret
+.L3:
+ orl $-1, %eax
ret
on x86_64. As for the jumps vs. conditional move case, that is some CE
issue with complex branch patterns we should fix up no matter what, but
in this case I'm actually not sure if branchy code isn't better, overflow
is something that isn't that common.
2020-12-12 Jakub Jelinek <jakub@redhat.com>
PR tree-optimization/96272
* tree-ssa-math-opts.c (uaddsub_overflow_check_p): Add OTHER argument.
Handle BIT_NOT_EXPR.
(match_uaddsub_overflow): Optimize unsigned a > ~b into
__imag__ .ADD_OVERFLOW (a, b).
(math_opts_dom_walker::after_dom_children): Call match_uaddsub_overflow
even for BIT_NOT_EXPR.
* gcc.dg/tree-ssa/pr96272.c: New test.
While the data regions (target data and OpenACC counterparts) aren't
standalone directives, unlike most other OpenMP/OpenACC constructs
we allow (apparently as an extension) exceptions and goto out of
the block. During gimplification we place an *end* call into a finally
block so that it is reached even on exceptions or goto out etc.).
During omplower pass we then add paired #pragma omp return for them,
but due to the exceptions because the region is not SESE we can end up
with #pragma omp return appearing only conditionally in the CFG etc.,
which the ompexp pass can't handle.
For the ompexp pass, we actually don't care about the end part or about
target data nesting, so we can treat it as standalone directive.
2020-12-12 Jakub Jelinek <jakub@redhat.com>
PR middle-end/98183
* omp-low.c (lower_omp_target): Don't add OMP_RETURN for
data regions.
* omp-expand.c (expand_omp_target): Don't try to remove
OMP_RETURN for data regions.
(build_omp_regions_1, omp_make_gimple_edges): Don't expect
OMP_RETURN for data regions.
* gcc.dg/gomp/pr98183.c: New test.
* gcc.dg/goacc/pr98183.c: New test.
Patrick's earlier patch to check convertibility before constraints for
conversion ops wasn't suitable because checking convertibility can also lead
to unwanted instantiations, but it occurs to me that there's a smaller check
we can do to avoid doing normal consideration of the conversion ops in this
case: since we're in the middle of a user-defined conversion, we can exclude
from consideration any conversion ops that return a type that would need an
additional user-defined conversion to reach the desired type: namely, a type
that differs in class-ness from the desired type.
[temp.inst]/9 allows optimizations like this: "If the function selected by
overload resolution can be determined without instantiating a class template
definition, it is unspecified whether that instantiation actually takes
place."
gcc/cp/ChangeLog:
PR libstdc++/97600
* call.c (build_user_type_conversion_1): Avoid considering
conversion functions that return a clearly unsuitable type.
gcc/testsuite/ChangeLog:
* g++.dg/cpp2a/concepts-conv3.C: New test.
Nathan's recent patch added make_binding_vec defined with MEM_STAT_DECL, but
didn't add the parallel decoration to the forward declaration.
gcc/cp/ChangeLog:
* cp-tree.h (make_binding_vec): Add CXX_MEM_STAT_INFO.
This adds the final few preparations to drop modules in. I'd missed a
couple of changes to core compiler -- a new pair of preprocessor
options, and marking the boundary of fixed and lazy global trees.
For C++, we need to add module.cc to the GTY scanner. Parsing final
cleanups needs a few tweaks for modules. Lambdas used to initialize a
global (for instance) get an extra scope, but we now need to point
that object to the lambda too. Finally template instantiation needs
to do lazy loading before looking at the available instantiations and
specializations.
gcc/
* gcc.c (cpp_unique_options): Add Mmodules, Mno-modules.
* tree-core.h (enum tree_index): Add TI_MODULE_HWM.
gcc/cp/
* config-lang.in (gtfiles): Add cp/module.cc.
* decl2.c (c_parse_final_cleanups): Add module support.
* lambda.c (record_lambda_scope): Call maybe_attach_decl.
* module.cc (maybe_attach_decl, lazy_load_specializations): Stubs.
(finish_module_procesing): Stub.
* pt.c (lookup_template_class_1): Lazy load specializations.
(instantiate_template_1): Likewise.
This is a small refactor of the end of decl processing, into which
dropping module support will be simpler.
gcc/cp/
* decl2.c (c_parse_final_cleanups): Refactor loop.
This fixes a riscv64-linux bootstrap failure.
get_constant_section calls the select_section target hook, and select_section
calls get_named_section which calls get_section. So it is possible to have
a constant not a decl in both of these functions. They already call DECL_P
checks everywhere except for the new code HJ recently added. This adds the
missing DECL_P check.
gcc/
* varasm.c (get_section): Add DECL_P check before DECL_PRESERVE_P.
Avoid putting weird characters into the user visible name.
It breaks stabs in particular, and may also cause debugger problems.
Instead, encode those names, and use a "g." prefix to tell the debugger.
Also dereference the type for the name of a recover thunk, to avoid a
pointless '*' that gets encoded.
Reviewed-on: https://go-review.googlesource.com/c/gofrontend/+/277232
The patch restores the unconditional definition of the VDQ iterator,
and changes the conditions of the vand and vorr expanders to use
ARM_HAVE_<MODE>_ARITH.
2020-12-11 Christophe Lyon <christophe.lyon@linaro.org>
gcc/
* config/arm/iterators.md (VDQ): Remove TARGET_HAVE_MVE
conditions.
* config/arm/vec-common.md (and<mode>3): Use
ARM_HAVE_<MODE>_ARITH.
(ior<mode>3): Likewise.
Replace/update ARC700 cache hazard detection. The next situations are
handled:
- There are 2 stores back2back, then 3 loads in next 3 or 4 instructions.
if 3 loads in 3 instructions then we insert 2 nops after stores.
if 3 loads in 4 instructions then we insert 1 nop after stores
- 2 back to back stores, followed by at least 3 loads in next 4 instructions.
st st ld ld ld ##
st st ## ld ld ld
st st ld ## ld ld
st st ld ld ## ld
## - any instruction
- store between non-store instructions, followed by 3 loads
$$ st SS ld ld ld
$$ - non-store instruction, even load.
gcc/
2020-12-11 Claudiu Zissulescu <claziss@synopsys.com>
* config/arc/arc.c (arc_active_insn): Ignore all non essential
instructions when getting the next active instruction.
(check_store_cacheline_hazard): Update.
(workaround_arc_anomaly): Remove obsolete cache hazard code.
Signed-off-by: Claudiu Zissulescu <claziss@gmail.com>
BRcc instructions are generated quite late in the compilation
process. These instructions combines a compare with a regular
conditional branch if the result of the compare is not used
anylonger. However, when compiling for size, it is better to avoid
BRcc instructions which are introducing a 32-bit long immediate.
gcc/
2020-12-11 Claudiu Zissulescu <claziss@synopsys.com>
* config/arc/arc.c (arc_reorg): Avoid limm in BRcc.
