This makes sure to compute the vector type for invariant SLP children
of nested cycles.
2020-11-02 Richard Biener <rguenther@suse.de>
PR tree-optimization/97558
* tree-vect-loop.c (vectorizable_reduction): For nested SLP
cycles compute invariant operands vector type.
* gcc.dg/vect/pr97558-2.c: New testcase.
This avoids analyzing reductions that are not relevant (thus dead)
which eventually will lead into crashes because the participating
stmts meta is not analyzed. For this to work the patch also
properly removes reduction groups that are not uniformly recognized
as patterns.
2020-11-02 Richard Biener <rguenther@suse.de>
PR tree-optimization/97558
* tree-vect-loop.c (vect_fixup_scalar_cycles_with_patterns):
Check for any mismatch in pattern vs. non-pattern and dissolve
the group if there is one.
* tree-vect-slp.c (vect_analyze_slp_instance): Avoid
analyzing not relevant reductions.
(vect_analyze_slp): Avoid analyzing not relevant reduction
groups.
* gcc.dg/vect/pr97558.c: New testcase.
I was mistaken to treat vect_external_def as only applying to
SSA_NAME defs, so check for that.
2020-11-02 Richard Biener <rguenther@suse.de>
PR tree-optimization/97650
* tree-vect-slp.c (vect_get_and_check_slp_defs): Check
for SSA_NAME before checking SSA_NAME_IS_DEFAULT_DEF.
* gcc.dg/vect/bb-slp-pr97650.c: New testcase.
- Able to configure complex multi-lib rule in configure time, without modify
any in-tree source.
- I was consider to implmenet this into `--with-multilib-list` option,
but I am not sure who will using that with riscv*-*-elf*, so I decide to
using another option name for that.
- --with-multilib-generator will pass arguments to multilib-generator, and
then using the generated multi-lib config file to build the toolchain.
e.g. Build riscv gcc, default arch/abi is rv64gc/lp64, and build multilib
for rv32imafd/ilp32 and rv32i/ilp32; rv32ic/ilp32 will reuse
rv32i/ilp32.
$ <GCC-SRC>/configure \
--target=riscv64-elf \
--with-arch=rv64gc --with-abi=lp64 \
--with-multilib-generator=rv32i-ilp32--c;rv32imafd-ilp32--
V3 Changes:
- Rename --with-multilib-config to --with-multilib-generator
- Check --with-multilib-generator and --with-multilib-list can't be used at
same time.
V2 Changes:
- Fix --with-multilib-config hanling on non riscv*-*-elf* triple.
gcc/ChangeLog:
* config.gcc (riscv*-*-*): Handle --with-multilib-generator.
* configure: Regen.
* configure.ac: Add --with-multilib-generator.
* config/riscv/multilib-generator: Exit when parsing arch string error.
* config/riscv/t-withmultilib-generator: New.
* doc/install.texi: Document --with-multilib-generator.
With -mpure-code on v6m (thumb-1), we can use small offsets with
upper/lower relocations to avoid the extra addition of the
offset.
This patch accepts expressions symbol+offset as legitimate constants
when the literal pool is disabled, making sure that the offset is
within the range supported by thumb-1 [0..255] as described in the
AAELF32 documentation.
It also makes sure that thumb1_movsi_insn emits an error in case we
try to use it with an unsupported RTL construct.
2020-09-28 Christophe Lyon <christophe.lyon@linaro.org>
gcc/
PR target/96770
* config/arm/arm.c (thumb_legitimate_constant_p): Accept
(symbol_ref + addend) when literal pool is disabled.
(arm_valid_symbolic_address_p): Add support for thumb-1 without
MOVT/MOVW.
* config/arm/thumb1.md (*thumb1_movsi_insn): Accept (symbol_ref +
addend) in the pure-code alternative.
gcc/testsuite/
PR target/96770
* gcc.target/arm/pure-code/pr96770.c: New test.
With -mpure-code on v6m (thumb-1), to avoid a useless indirection when
building the address of a symbol, we want to consider SYMBOL_REF as a
legitimate constant. This way, we build the address using a series of
upper/lower relocations instead of loading the address from memory.
This patch also fixes a missing "clob" conds attribute for
thumb1_movsi_insn, needed because that alternative clobbers the flags.
2020-11-02 Christophe Lyon <christophe.lyon@linaro.org>
gcc/
PR target/96967
* config/arm/arm.c (thumb_legitimate_constant_p): Add support for
disabled literal pool in thumb-1.
* config/arm/thumb1.md (thumb1_movsi_symbol_ref): Remove.
(*thumb1_movsi_insn): Add support for SYMBOL_REF with -mpure-code.
gcc/testsuite
PR target/96967
* gcc.target/arm/pure-code/pr96767.c: New test.
Newer versions of Darwin report pagesize 20 which means that we
need to adjust the aligment of the PCH area.
gcc/ChangeLog:
* config/host-darwin.c: Align pch_address_space to 16384.
The reference implementation for Objective-C provides the SEL
typedef (although it is also available from <objc/objc.h>).
gcc/objc/ChangeLog:
* objc-act.c (synth_module_prologue): Get the SEL identifier.
* objc-act.h (enum objc_tree_index): Add OCTI_SEL_NAME.
(objc_selector_name): New.
(SEL_TYPEDEF_NAME): New.
* objc-gnu-runtime-abi-01.c
(gnu_runtime_01_initialize): Initialize SEL typedef.
* objc-next-runtime-abi-01.c
(next_runtime_01_initialize): Likewise.
* objc-next-runtime-abi-02.c
gcc/testsuite/ChangeLog:
* obj-c++.dg/SEL-typedef.mm: New test.
* objc.dg/SEL-typedef.m: New test.
When we are lexing tokens for Objective-C, we combine '@' tokens
with a following keyword (when that keyword is a valid Objective-C
one or, for Objective-C, one of the C++ keywords that can appear in
this position). The responsibility is passed on to the parser to
validate the resulting combination.
The combination of tokens was being done without applying the rule
to their locations - so that we get:
@property
^
instead of what the user might expect:
@property
^~~~~~~~~
This patch combines the source range of the keyword with that of the
'@' sign - which improves diagnostics.
gcc/c-family/ChangeLog:
* c-lex.c (c_lex_with_flags): When combining '@' with a
keyword for Objective-C, combine the location ranges too.
We can avoid the spurious additional complaint about a closing
')' by short-circuiting the test in the case we know there's a
syntax error already reported.
gcc/cp/ChangeLog:
* parser.c (cp_parser_objc_at_property_declaration): Use any
exisiting syntax error to suppress complaints about a missing
closing parenthesis in parsing property attributes.
gcc/testsuite/ChangeLog:
* obj-c++.dg/property/at-property-1.mm: Adjust test after
fixing spurious error output.
PR 97660 occurs when cgraph_node::get returns NULL, and this NULL
cgraph_node is then passed to clone_info::get. As the original assert
prior to the regressing change in r11-4587 allowed for the cgraph_node
to be NULL, clone_info::get is now only called when cgraph_node::get
returns a nonnull value.
gcc/ChangeLog:
PR ipa/97660
* cgraph.c (cgraph_edge::redirect_call_stmt_to_callee): Don't call
clone_info::get when cgraph_node::get returns NULL.
This meets the requirement that std::is_integral_v<wchar_t> is true,
even when full library support for wchar_t via specializations of
char_traits etc. is not provided. This is done by checking
__WCHAR_TYPE__ to see if the compiler knows about the type, rather than
checking the library's own _GLIBCXX_USE_WCHAR_T autoconf macro.
This assumes that the C++ compiler correctly defines wchar_t as a
distinct type, not a typedef for one of the other integeral types. This
is always true for G++ and should be true for any supported non-GNU
compilers.
Similarly, the std::make_unsigned and std::make_signed traits and the
internal helpers std::__is_integer and std::__is_char are also changed
to depend on the same macro.
libstdc++-v3/ChangeLog:
* include/std/type_traits (is_integral<wchar_t>)
(make_unsigned<wchar_t>, make_signed<wchar_t>): Define based
on #ifdef __WCHAR_TYPE__ instead of _GLIBCXX_USE_WCHAR_T.
* include/bits/cpp_type_traits.h (__is_integer<wchar_t>)
(__is_char<wchar_t>): Likewise.
The transition algorithm for std::shuffle_order_engine uses long double
to ensure that the value (max() - min() + 1) can be accurately
represented, to avoid bias in the shuffling. However, when the base
engine's range is small enough we can avoid slower long double
arithmetic by using double. For example, long double is unnecessary for
any base engine returning 32-bit values.
This makes std::knuth_b::operator() about 15% faster on x86_64, and
probably even more on targets where long double uses soft-float.
libstdc++-v3/ChangeLog:
* include/bits/random.h (independent_bit_engine): Fix typo
in comment.
(shuffle_order_engine): Fix incorrect description in comment.
* include/bits/random.tcc (__representable_as_double
(__p1_representable_as_double): New helper functions.
(shuffle_order_engine::operator()): Use double for calculation
if (max() - min() + 1) is representable as double.
* testsuite/26_numerics/random/pr60037-neg.cc: Adjust dg-error
line number.
My previous commit for this PR changed the types from long double to
double, but didn't change the uses of __builtin_ceill and
__builtin_floorl. It also failed to change the non-inline functions in
src/c++11/hashtable_c++0x.cc. This should fix it properly now.
libstdc++-v3/ChangeLog:
PR libstdc++/96958
* include/bits/hashtable_policy.h (_Prime_rehash_policy)
(_Power2_rehash_policy): Use ceil and floor instead of ceill and
floorl.
* src/c++11/hashtable_c++0x.cc (_Prime_rehash_policy): Likewise.
Use double instead of long double.
This works around a subtle issue where instantiating the begin()/end()
member of some views (as part of return type deduction) inadvertently
requires computing the satisfaction value of range<foo_view>.
This is problematic because the constraint range<foo_view> requires the
begin()/end() member to be callable. But it's not callable until we've
deduced its return type, so evaluation of range<foo_view> yields false
at this point. And if after both members are instantiated (and their
return types deduced) we evaluate range<foo_view> again, this time it
will yield true since the begin()/end() members are now both callable.
This makes the program ill-formed according to [temp.constr.atomic]/3:
If, at different points in the program, the satisfaction result is
different for identical atomic constraints and template arguments, the
program is ill-formed, no diagnostic required.
The views affected by this issue are those whose begin()/end() member
has a placeholder return type and that member initializes an _Iterator
or _Sentinel object from a reference to *this. The second condition is
relevant because it means explicit conversion functions are considered
during overload resolution (as per [over.match.copy], I think), and
therefore it causes g++ to check the constraints of the conversion
function view_interface<foo_view>::operator bool(). And this conversion
function's constraints indirectly require range<foo_view>.
This issue is observable on trunk only with basic_istream_view (as in
the testcase in the PR). But a pending patch that makes g++ memoize
constraint satisfaction values indefinitely (it currently invalidates
the satisfaction cache on various events) causes many existing tests for
the other affected views to fail, because range<foo_view> then remains
false for the whole compilation.
This patch works around this issue by adjusting the constructors of the
_Iterator and _Sentinel types of the affected views to take their
foo_view argument by pointer instead of by reference, so that g++ no
longer considers explicit conversion functions when resolving the
direct-initialization inside these views' begin()/end() members.
libstdc++-v3/ChangeLog:
PR libstdc++/97600
* include/std/ranges (basic_istream_view::begin): Initialize
_Iterator from 'this' instead of '*this'.
(basic_istream_view::_Iterator::_Iterator): Adjust constructor
accordingly.
(filter_view::_Iterator::_Iterator): Take a filter_view*
argument instead of a filter_view& argument.
(filter_view::_Sentinel::_Sentinel): Likewise.
(filter_view::begin): Initialize _Iterator from 'this' instead
of '*this'.
(filter_view::end): Likewise.
(transform_view::_Iterator::_Iterator): Take a _Parent* instead
of a _Parent&.
(filter_view::_Iterator::operator+): Adjust accordingly.
(filter_view::_Iterator::operator-): Likewise.
(filter_view::begin): Initialize _Iterator from 'this' instead
of '*this'.
(filter_view::end): Likewise.
(join_view::_Iterator): Take a _Parent* instead of a _Parent&.
(join_view::_Sentinel): Likewise.
(join_view::begin): Initialize _Iterator from 'this' instead of
'*this'.
(join_view::end): Initialize _Sentinel from 'this' instead of
'*this'.
(split_view::_OuterIter): Take a _Parent& instead of a _Parent*.
(split_view::begin): Initialize _OuterIter from 'this' instead
of '*this'.
(split_view::end): Likewise.
* testsuite/std/ranges/97600.cc: New test.
This makes some range adaptors model the borrowed_range concept if they
are adapting a borrowed range. This hasn't been added to the C++23
working paper yet, but it has been approved by LWG, and the
recommendation is to treat it as a defect report for C++20 as well.
libstdc++-v3/ChangeLog:
* include/std/ranges (enable_borrowed_view<take_view<T>>)
(enable_borrowed_view<drop_view<T>>)
(enable_borrowed_view<drop_while_view<T>>)
(enable_borrowed_view<reverse_view<T>>)
(enable_borrowed_view<common_view<T>>)
(enable_borrowed_view<elements_view<T>>): Add partial
specializations as per P2017R1.
* testsuite/std/ranges/adaptors/conditionally_borrowed.cc:
New test.
gcc/
2020-10-30 Michael Meissner <meissner@linux.ibm.com>
* config/rs6000/rs6000.c (glibc_supports_ieee_128bit): New helper
function.
(rs6000_option_override_internal): Call it.
These calculations were changed to use long double nearly ten years ago
in order to get more precision than float:
https://gcc.gnu.org/pipermail/libstdc++/2011-September/036420.html
However, double should be sufficient, whlie being potentially faster
than long double, and not requiring soft FP calculations for targets
without native long double support.
libstdc++-v3/ChangeLog:
PR libstdc++/96958
* include/bits/hashtable_policy.h (_Prime_rehash_policy)
(_Power2_rehash_policy): Use double instead of long double.
The random number generator internal state may be saved to/restored from
an array of integers. Clean up calculation of needed number of elements
to avoid redefiniton of auxiliary macro SZ.
libgfortran/ChangeLog:
* intrinsics/random.c (SZ_IN_INT_4): Define size of state in int32_t.
(SZ_IN_INT_8): Define size of state in int64_t.
(SZ): Remove.
(random_seed_i4): Use size SZ_IN_INT_4 instead of SZ.
(random_seed_i8): Use size SZ_IN_INT_8 instead of SZ.
This new feature causes the compiler to zero a subset of all call-used
registers at function return. This is used to increase program security
by either mitigating Return-Oriented Programming (ROP) attacks or
preventing information leakage through registers.
gcc/ChangeLog:
2020-10-30 Qing Zhao <qing.zhao@oracle.com>
H.J.Lu <hjl.tools@gmail.com>
* common.opt: Add new option -fzero-call-used-regs
* config/i386/i386.c (zero_call_used_regno_p): New function.
(zero_call_used_regno_mode): Likewise.
(zero_all_vector_registers): Likewise.
(zero_all_st_registers): Likewise.
(zero_all_mm_registers): Likewise.
(ix86_zero_call_used_regs): Likewise.
(TARGET_ZERO_CALL_USED_REGS): Define.
* df-scan.c (df_epilogue_uses_p): New function.
(df_get_exit_block_use_set): Replace EPILOGUE_USES with
df_epilogue_uses_p.
* df.h (df_epilogue_uses_p): Declare.
* doc/extend.texi: Document the new zero_call_used_regs attribute.
* doc/invoke.texi: Document the new -fzero-call-used-regs option.
* doc/tm.texi: Regenerate.
* doc/tm.texi.in (TARGET_ZERO_CALL_USED_REGS): New hook.
* emit-rtl.h (struct rtl_data): New field must_be_zero_on_return.
* flag-types.h (namespace zero_regs_flags): New namespace.
* function.c (gen_call_used_regs_seq): New function.
(class pass_zero_call_used_regs): New class.
(pass_zero_call_used_regs::execute): New function.
(make_pass_zero_call_used_regs): New function.
* optabs.c (expand_asm_reg_clobber_mem_blockage): New function.
* optabs.h (expand_asm_reg_clobber_mem_blockage): Declare.
* opts.c (zero_call_used_regs_opts): New structure array
initialization.
(parse_zero_call_used_regs_options): New function.
(common_handle_option): Handle -fzero-call-used-regs.
* opts.h (zero_call_used_regs_opts): New structure array.
* passes.def: Add new pass pass_zero_call_used_regs.
* recog.c (valid_insn_p): New function.
* recog.h (valid_insn_p): Declare.
* resource.c (init_resource_info): Replace EPILOGUE_USES with
df_epilogue_uses_p.
* target.def (zero_call_used_regs): New hook.
* targhooks.c (default_zero_call_used_regs): New function.
* targhooks.h (default_zero_call_used_regs): Declare.
* tree-pass.h (make_pass_zero_call_used_regs): Declare.
gcc/c-family/ChangeLog:
2020-10-30 Qing Zhao <qing.zhao@oracle.com>
H.J.Lu <hjl.tools@gmail.com>
* c-attribs.c (c_common_attribute_table): Add new attribute
zero_call_used_regs.
(handle_zero_call_used_regs_attribute): New function.
gcc/testsuite/ChangeLog:
2020-10-30 Qing Zhao <qing.zhao@oracle.com>
H.J.Lu <hjl.tools@gmail.com>
* c-c++-common/zero-scratch-regs-1.c: New test.
* c-c++-common/zero-scratch-regs-10.c: New test.
* c-c++-common/zero-scratch-regs-11.c: New test.
* c-c++-common/zero-scratch-regs-2.c: New test.
* c-c++-common/zero-scratch-regs-3.c: New test.
* c-c++-common/zero-scratch-regs-4.c: New test.
* c-c++-common/zero-scratch-regs-5.c: New test.
* c-c++-common/zero-scratch-regs-6.c: New test.
* c-c++-common/zero-scratch-regs-7.c: New test.
* c-c++-common/zero-scratch-regs-8.c: New test.
* c-c++-common/zero-scratch-regs-9.c: New test.
* c-c++-common/zero-scratch-regs-attr-usages.c: New test.
* gcc.target/i386/zero-scratch-regs-1.c: New test.
* gcc.target/i386/zero-scratch-regs-10.c: New test.
* gcc.target/i386/zero-scratch-regs-11.c: New test.
* gcc.target/i386/zero-scratch-regs-12.c: New test.
* gcc.target/i386/zero-scratch-regs-13.c: New test.
* gcc.target/i386/zero-scratch-regs-14.c: New test.
* gcc.target/i386/zero-scratch-regs-15.c: New test.
* gcc.target/i386/zero-scratch-regs-16.c: New test.
* gcc.target/i386/zero-scratch-regs-17.c: New test.
* gcc.target/i386/zero-scratch-regs-18.c: New test.
* gcc.target/i386/zero-scratch-regs-19.c: New test.
* gcc.target/i386/zero-scratch-regs-2.c: New test.
* gcc.target/i386/zero-scratch-regs-20.c: New test.
* gcc.target/i386/zero-scratch-regs-21.c: New test.
* gcc.target/i386/zero-scratch-regs-22.c: New test.
* gcc.target/i386/zero-scratch-regs-23.c: New test.
* gcc.target/i386/zero-scratch-regs-24.c: New test.
* gcc.target/i386/zero-scratch-regs-25.c: New test.
* gcc.target/i386/zero-scratch-regs-26.c: New test.
* gcc.target/i386/zero-scratch-regs-27.c: New test.
* gcc.target/i386/zero-scratch-regs-28.c: New test.
* gcc.target/i386/zero-scratch-regs-29.c: New test.
* gcc.target/i386/zero-scratch-regs-30.c: New test.
* gcc.target/i386/zero-scratch-regs-31.c: New test.
* gcc.target/i386/zero-scratch-regs-3.c: New test.
* gcc.target/i386/zero-scratch-regs-4.c: New test.
* gcc.target/i386/zero-scratch-regs-5.c: New test.
* gcc.target/i386/zero-scratch-regs-6.c: New test.
* gcc.target/i386/zero-scratch-regs-7.c: New test.
* gcc.target/i386/zero-scratch-regs-8.c: New test.
* gcc.target/i386/zero-scratch-regs-9.c: New test.
The patch changes insn scratches which require registers for all
insn alternatives (in other words w/o X constraint in scratch
constraint string). This is done before IRA staring its work. LRA
still continue to change the rest scratches (with X constraint and in
insn created during IRA) into pseudos. As before the patch at the end
of LRA work, spilled scratch pseudos (for which X constraint was
chosen) changed into scratches back.
gcc/ChangeLog:
* lra.c (get_scratch_reg): New function.
(remove_scratches_1): Rename remove_insn_scratches. Use
ira_remove_insn_scratches and get_scratch_reg.
(remove_scratches): Do not
initialize scratches, scratch_bitmap, and scratch_operand_bitmap.
(lra): Call ira_restore_scratches instead of restore_scratches.
(struct sloc, sloc_t, scratches, scratch_bitmap)
(scratch_operand_bitmap, lra_former_scratch_p)
(lra_former_scratch_operand_p, lra_register_new_scratch_op)
(restore_scratches): Move them to ...
* ira.c: ... here.
(former_scratch_p, former_scratch_operand_p): Rename to
ira_former_scratch_p and ira_former_scratch_operand_p.
(contains_X_constraint_p): New function.
(register_new_scratch_op): Rename to ira_register_new_scratch_op.
Change it to work for IRA and LRA.
(restore_scratches): Rename to ira_restore_scratches.
(get_scratch_reg, ira_remove_insn_scratches): New functions.
(ira): Call ira_remove_scratches if we use LRA.
* ira.h (ira_former_scratch_p, ira_former_scratch_operand_p): New
prototypes.
(ira_register_new_scratch_op, ira_restore_scratches): New prototypes.
(ira_remove_insn_scratches): New prototype.
* lra-int.h (lra_former_scratch_p, lra_former_scratch_operand_p):
Remove prototypes.
(lra_register_new_scratch_op): Ditto.
* lra-constraints.c: Rename lra_former_scratch_p and
lra_former_scratch_p to ira_former_scratch_p and to
ira_former_scratch_p.
* lra-remat.c: Ditto.
* lra-spills.c: Rename lra_former_scratch_p to ira_former_scratch_p.
gcc/ChangeLog:
PR middle-end/97556
* builtins.c (access_ref::add_offset): Cap offset lower bound
to at most the the upper bound.
gcc/testsuite/ChangeLog:
PR middle-end/97556
* gcc.dg/Warray-bounds-70.c: New test.
The class template semiregular-box<T> of [range.semi.wrap] is specified
to value-initialize the underlying object whenever its type is default
initializable. Our primary template for __detail::__box respects this
requirement, but the recently added partial specialization (for types
that are already semiregular) does not.
This patch fixes this issue, and additionally makes the corresponding in
place constructor explicit (as in the primary template).
libstdc++-v3/ChangeLog:
* include/std/ranges (__detail::__box): For the partial
specialization used by types that are already semiregular,
make the default constructor value-initialize the underlying
object instead of default-initializing it. Make its in place
constructor explicit.
* testsuite/std/ranges/adaptors/detail/semiregular_box.cc:
Augment test.
gcc/testsuite/
* g++.dg/guality/guality.exp: Skip $rootme-based check if unset.
* gcc.dg/guality/guality.exp: Likewise.
* gfortran.dg/guality/guality.exp: Likewise.
* lib/asan-dg.exp: Don't use $asan_saved_library_path if not set.
* lib/tsan-dg.exp: Don't use $tsan_saved_library_path if not set.
* lib/ubsan-dg.exp: Don't use $ubsan_saved_library_path if not set.
PR pch/97593
* cgraph.c (cgraph_node::create_thunk): Register thunk as early during
parsing.
* cgraphunit.c (analyze_functions): Call
thunk_info::process_early_thunks.
* symtab-thunks.cc (struct unprocessed_thunk): New struct.
(thunks): New static variable.
(thunk_info::register_early): New member function.
(thunk_info::process_early_thunks): New member function.
* symtab-thunks.h (thunk_info::register_early): Declare.
(thunk_info::process_early_thunks): Declare.
This avoids requiring insert iteration for back-to-back hoisting
opportunities as seen in the added testcase. For the PR at hand
this halves the number of insert iterations retaining only
the hard to avoid PRE / hoist insert back-to-backs.
2020-10-30 Richard Biener <rguenther@suse.de>
PR tree-optimization/97623
* tree-ssa-pre.c (insert): First do hoist insertion in
a backward walk.
* gcc.dg/tree-ssa/ssa-hoist-7.c: New testcase.
This makes sure to roll-back the whole SCC when we fail stmt
analysis, otherwise the optimistic visited treatment breaks down
with different entries. Rollback is easy when tracking additions
to visited in a vector which also makes the whole thing cheaper
than the two hash-sets used before.
2020-10-30 Richard Biener <rguenther@suse.de>
PR tree-optimization/97626
* tree-vect-slp.c (vect_slp_analyze_node_operations):
Exchange the lvisited hash-set for a vector, roll back
recursive adds to visited when analysis failed.
(vect_slp_analyze_operations): Likewise.
* gcc.dg/vect/bb-slp-pr97626.c: New testcase.
After PR92793 commit 9c81750c5bedd7883182ee2684a012c6210ebe1d "Fortran] PR
92793 - fix column used for error diagnostic", commit
d0d0ba20f2345023e9cec2419c9fb9e6cc7098c6 did "Add tests to verify OpenACC
clause locations", later fixed up in PR92901 commit
e6c90dba73291435c244decb9a89c47019cc5a45 to "Fix PR92901: Change test
expectation for C++ in OpenACC test clause-locations.c".
Now, add some more testing to verify/document the status quo.
gcc/testsuite/
PR fortran/92793
* c-c++-common/goacc/clause-locations.c: Rewrite into...
* c-c++-common/goacc/pr92793-1.c: ... this.
* gfortran.dg/goacc/clause-locations.f90: Rewrite into...
* gfortran.dg/goacc/pr92793-1.f90: ... this.
This makes sure to update backedges in single-node cycles.
2020-10-30 Richard Biener <rguenther@suse.de>
PR tree-optimization/97633
* tree-vect-slp.c (): Update backedges in single-node cycles.
Optimize processing of externals.
* g++.dg/vect/slp-pr97636.cc: New testcase.
* gcc.dg/vect/bb-slp-pr97633.c: Likewise.
This change fixes a bug in the AArch64 backend. Currently, we accept an
odd sign_extract representation of addresses, but don't accept that same
odd form of address as an LEA.
This is the cause of PR96998. In the testcase given in the PR, combine
produces:
(insn 9 8 10 3 (set (mem:SI (plus:DI (sign_extract:DI (mult:DI (subreg:DI (reg/v:SI 92 [ g ]) 0)
(const_int 4 [0x4]))
(const_int 34 [0x22])
(const_int 0 [0]))
(reg/f:DI 96)) [3 *i_5+0 S4 A32])
(asm_operands:SI ("") ("=Q") 0 []
[]
[] test.c:11)) "test.c":11:5 -1
(expr_list:REG_DEAD (reg/v:SI 92 [ g ])
(nil)))
Then LRA reloads the address and we ICE because we fail to recognize the
sign_extract outside the mem:
(insn 33 8 34 3 (set (reg:DI 100)
(sign_extract:DI (ashift:DI (subreg:DI (reg/v:SI 92 [ g ]) 0)
(const_int 2 [0x2]))
(const_int 34 [0x22])
(const_int 0 [0]))) "test.c":11:5 -1
(nil))
The aarch64 changes here remove the support for this sign_extract
representation of addresses, fixing PR96998. Now this by itself would
regress code quality, so this change is paired with an improvement to
combine which prevents an extract rtx from being emitted in this case:
we now write the rtx above as a shift of an extend, which allows the
combination to go ahead.
Prior to this, combine.c:make_extraction() identified where we can emit
an ashift of an extend in place of an extraction, but failed to make the
corresponding canonicalization/simplification when presented with a mult
by a power of two. Such a representation is canonical when representing
a left-shifted address inside a mem.
This change remedies this situation. For rtxes such as:
(mult:DI (subreg:DI (reg:SI r) 0) (const_int 2^n))
where the bottom 32 + n bits are valid (the higher-order bits are
undefined) and make_extraction() is being asked to sign_extract the
lower (valid) bits, after the patch, we rewrite this as:
(mult:DI (sign_extend:DI (reg:SI r)) (const_int 2^n))
instead of using a sign_extract.
gcc/ChangeLog:
PR target/96998
* combine.c (make_extraction): Also handle shifts written as
(mult x 2^n), avoid creating an extract rtx for these.
* config/aarch64/aarch64.c (aarch64_is_extend_from_extract): Delete.
(aarch64_classify_index): Remove extract-based address handling.
(aarch64_strip_extend): Likewise.
(aarch64_rtx_arith_op_extract_p): Likewise, remove now-unused parameter.
Update callers...
(aarch64_rtx_costs): ... here.
gcc/testsuite/ChangeLog:
PR target/96998
* gcc.c-torture/compile/pr96998.c: New test.
Unfortunately, some VxWorks 7r2 system headers rely on a
couple more variations of the predefined macros expected
to characterize a "powerpc" target that we discussed recently.
setjmp.h, for example, relies on __ppc and the absence of
a definition results in "gcc" dejagnu test failures from all
the tests #including that header, which stumble on:
#error "_JBLEN not set!"
The other case is __ppc__ expected by yvals.h, key to libstdc++.
This change adjusts the VxWorks 7 section of our configuration
to honor those expectations.
2020-10-29 Olivier Hainque <hainque@adacore.com>
gcc/
* config/rs6000/vxworks.h (TARGET_OS_CPP_BUILTINS): Also
builtin_define __ppc and __ppc__ for VxWorks 7.
This change extends the VxWorks support on intel CPUs to
VxWorks7r2 for x86_64 as well as x86, with a "mcmodel=large"
additional multilib for the 64bit configuration.
The support for fPIC is not functional yet for this model,
so we just don't add the corresponding multilib.
We extend the range of CPU families handled by TARGET_OS_CPP_BUILTINS,
accounting for the fact that archs older than PENTIUM4 are
not supported (any more) by VxWorks 7.
As we did for powerpc, we leverage VX_CPU_PREFIX to emit different
forms of definitions for different families of VxWorks as the system
headers's expectations has evolved between Vx 5, 6 and 7.
2020-10-27 Olivier Hainque <hainque@adacore.com>
gcc/
* config.gcc: Adjust the ix86/x86_64-wrs-vxworks filters
to apply to VxWorks 7 as well.
* config/i386/t-vxworks (MULTILIB_OPTIONS, MULTILIB_DIRNAMES):
Remove the fPIC multilib and add one for the large code model
on x86_64.
* config/i386/vxworks.h: Separate sections for TARGET_VXWORKS7,
other variants and common bits.
(TARGET_OS_CPP_BUILTINS): Augment to support a range of CPU
families. Leverage VX_CPU_PREFIX.
(CC1_SPEC): Add definition.
(STACK_CHECK_PROTECT): Use conditional expression instead of
heavier to read conditioned macro definitions.
libgcc/
* config.host: Adjust the ix86/x86_64-wrs-vxworks filters
to apply to VxWorks 7 as well.
Co-authored-by: Douglas Rupp <rupp@adacore.com>
Co-authored-by: Pat Bernardi <bernardi@adacore.com>
This patch fixes gimplification of allocate clause on taskloop - puts
allocate on inner taskloop only if there is allocate clause, because otherwise
the data sharing clauses are only on the task construct in the construct sandwich.
2020-10-30 Jakub Jelinek <jakub@redhat.com>
* gimplify.c (gimplify_scan_omp_clauses): Force
OMP_CLAUSE_ALLOCATE_ALLOCATOR into a temporary if it is non-NULL and
non-constant.
(gimplify_omp_for): Only put allocate on inner taskloop if lastprivate
for the same variable is going to be put there, and in that case
if the OMP_CLAUSE_ALLOCATE_ALLOCATOR is non-NULL non-constant, make
the allocator firstprivate on task.
* c-c++-common/gomp/allocate-3.c: New test.
This allows specification of non-static data members in allocate clause like it
can be specified in other privatization clauses and adds a new testcase that covers
also handling of that clause in templates.
2020-10-30 Jakub Jelinek <jakub@redhat.com>
* semantics.c (finish_omp_clauses) <case OMP_CLAUSE_ALLOCATE>: Handle
non-static members in methods.
* pt.c (tsubst_omp_clauses): Handle OMP_CLAUSE_ALLOCATE.
* c-c++-common/gomp/allocate-1.c (qux): Add another test.
* g++.dg/gomp/allocate-1.C: New test.
This adjusts the testcase to allow splitting up the group for
larger vector sizes and thus printing the splat message multiple times.
2020-10-30 Richard Biener <rguenther@suse.de>
* gcc.dg/vect/bb-slp-pr65935.c: Adjust.
This patch ccombines two patches:
1) If GLIBC is 2.32 or newer, and the language is C or C++, allow the user to
change the long double type without having to use -Wno-psabi.
2) Adjust the warnings for intermixing __float128 and __ibm128 to accomidate
the future change to allow long double to use the IEEE 128-bit format.
gcc/
2020-10-29 Michael Meissner <meissner@linux.ibm.com>
* config/rs6000/rs6000.c (rs6000_option_override_internal): Allow
long double type to be changed for C/C++ if glibc 2.32 or newer.
(rs6000_invalid_binary_op): Update error messages about mixing IBM
long double and IEEE 128-bit.
gcc/testsuite/
2020-10-27 Michael Meissner <meissner@linux.ibm.com>
* gcc.target/powerpc/float128-mix-2.c: New test.
* gcc.target/powerpc/float128-mix-3.c: New test.
* gcc.target/powerpc/float128-mix.c: Update failure messages.
The 20_util/unique_ptr/creation/for_overwrite.cc testcase relies on
operator new, which requires special features on AIX. This patch
disables the testcase.
libstdc++-v3/ChangeLog:
* testsuite/20_util/unique_ptr/creation/for_overwrite.cc: XFAIL on AIX.
