174720 Commits

Author SHA1 Message Date
Jakub Jelinek
187dd955db match.pd: Disallow side-effects in GENERIC for non-COND_EXPR to COND_EXPR simplifications [PR93744]
As the following testcases show (the first one reported, last two
found by code inspection), we need to disallow side-effects
in simplifications that turn some unconditional expression into conditional
one.  From my little understanding of genmatch.c, it is able to
automatically disallow side effects if the same operand is used multiple
times in the match pattern, maybe if it is used multiple times in the
replacement pattern, and if it is used in conditional contexts in the match
pattern, could it be taught to handle this case too?  If yes, perhaps
just the first hunk could be usable for 8/9 backports (+ the testcases).

2020-02-15  Jakub Jelinek  <jakub@redhat.com>

	PR tree-optimization/93744
	* match.pd (((m1 >/</>=/<= m2) * d -> (m1 >/</>=/<= m2) ? d : 0,
	A - ((A - B) & -(C cmp D)) -> (C cmp D) ? B : A,
	A + ((B - A) & -(C cmp D)) -> (C cmp D) ? B : A): For GENERIC, make
	sure @2 in the first and @1 in the other patterns has no side-effects.

	* gcc.c-torture/execute/pr93744-1.c: New test.
	* gcc.c-torture/execute/pr93744-2.c: New test.
	* gcc.c-torture/execute/pr93744-3.c: New test.
2020-02-15 12:53:44 +01:00
Jonathan Wakely
55b00d14f4 libstdc++: Update __cpp_lib_erase_if macro (P1115R3)
Now that this feature has been approved for C++20 we can define the
macro to the official value.

	* include/bits/erase_if.h (__cpp_lib_erase_if): Define to 202002L.
	* include/std/deque: Likewise.
	* include/std/forward_list: Likewise.
	* include/std/list: Likewise.
	* include/std/string: Likewise.
	* include/std/vector: Likewise.
	* include/std/version: Likewise.
	* testsuite/23_containers/deque/erasure.cc: Test for new value.
	* testsuite/23_containers/forward_list/erasure.cc: Likewise.
	* testsuite/23_containers/list/erasure.cc: Likewise.
	* testsuite/23_containers/map/erasure.cc: Likewise.
	* testsuite/23_containers/set/erasure.cc: Likewise.
	* testsuite/23_containers/unordered_map/erasure.cc: Likewise.
	* testsuite/23_containers/unordered_set/erasure.cc: Likewise.
	* testsuite/23_containers/vector/erasure.cc: Likewise.
2020-02-15 10:25:23 +00:00
Jonathan Wakely
5b1d588509 libstdc++: Implement LWG 3150 for std::uniform_random_bit_generator
* include/bits/random.h (uniform_random_bit_generator): Require min()
	and max() to be constant expressions and min() to be less than max().
	* testsuite/26_numerics/random/concept.cc: Check additional cases.
	* testsuite/26_numerics/random/pr60037-neg.cc: Adjust dg-error lineno.
2020-02-15 10:24:57 +00:00
Bernd Edlinger
458c8d6459 PR 87488: Add --with-diagnostics-urls configuration option
2020-02-15  David Malcolm  <dmalcolm@redhat.com>
	    Bernd Edlinger  <bernd.edlinger@hotmail.de>

	PR 87488
	PR other/93168
	* config.in (DIAGNOSTICS_URLS_DEFAULT): New define.
	* configure.ac (--with-diagnostics-urls): New configuration
	option, based on --with-diagnostics-color.
	(DIAGNOSTICS_URLS_DEFAULT): New define.
	* config.h: Regenerate.
	* configure: Regenerate.
	* diagnostic.c (diagnostic_urls_init): Handle -1 for
	DIAGNOSTICS_URLS_DEFAULT from configure-time
	--with-diagnostics-urls=auto-if-env by querying for a GCC_URLS
	and TERM_URLS environment variable.
	* diagnostic-url.h (diagnostic_url_format): New enum type.
	(diagnostic_urls_enabled_p): rename to...
	(determine_url_format): ... this, and change return type.
	* diagnostic-color.c (parse_env_vars_for_urls): New helper function.
	(auto_enable_urls): Disable URLs on xfce4-terminal, gnome-terminal,
	the linux console, and mingw.
	(diagnostic_urls_enabled_p): rename to...
	(determine_url_format): ... this, and adjust.
	* pretty-print.h (pretty_printer::show_urls): rename to...
	(pretty_printer::url_format): ... this, and change to enum.
	* pretty-print.c (pretty_printer::pretty_printer,
	pp_begin_url, pp_end_url, test_urls): Adjust.
	* doc/install.texi (--with-diagnostics-urls): Document the new
	configuration option.
	(--with-diagnostics-color): Document the existing interaction
	with GCC_COLORS better.
	* doc/invoke.texi (-fdiagnostics-urls): Add GCC_URLS and TERM_URLS
	vindex reference.  Update description of defaults based on the above.
	(-fdiagnostics-color): Update description of how -fdiagnostics-color
	interacts with GCC_COLORS.
2020-02-15 08:32:57 +01:00
Martin Sebor
d6ee2e7c5a Document compatibility of aliases and their targets, correct weakref example.
gcc/ChangeLog:

	* doc/extend.texi (attribute alias): Mention type requirement.
	(attribute weak): Same.
	(attribute weakref): Correct invalid example.
2020-02-14 17:13:29 -07:00
Eric Botcazou
1d757b0950 Fix duplicates for anonymous structures with -fdump-ada-spec
This fixes a weakness in the way -fdump-ada-spec builds names for
anonymous structures in the C/C++ code, resulting in duplicate
identifiers under specific circumstances.

c-family/
	* c-ada-spec.c: Include bitmap.h.
	(dump_ada_double_name): Rename into...
	(dump_anonymous_type_name): ...this.  Always use the TYPE_UID.
	(dump_ada_array_type): Adjust to above renaming.  Robustify.
	(dump_nested_types_1): New function copied from...  Add
	dumped_types parameter and pass it down to dump_nested_type.
	(dump_nested_types): ...this.  Remove parent parameter.  Just
	call dump_nested_types_1 on an automatic bitmap.
	(dump_nested_type): Add dumped_types parameter.
	<ARRAY_TYPE>: Do not dump it if already present in dumped_types.
	Adjust recursive calls and adjust to above renaming.
	(dump_ada_declaration): Adjust call to dump_nested_types.
	Tidy up and adjust to above renaming.
	(dump_ada_specs): Initialize and release bitmap obstack.
2020-02-15 00:13:18 +01:00
Joseph Myers
c26007ab17 Update .po files.
gcc/po:
	* be.po, da.po, de.po, el.po, es.po, fi.po, fr.po, hr.po, id.po,
	ja.po, nl.po, ru.po, sr.po, sv.po, tr.po, uk.po, vi.po, zh_CN.po,
	zh_TW.po: Update.

libcpp/po:
	* be.po, ca.po, da.po, de.po, el.po, eo.po, es.po, fi.po, fr.po,
	id.po, ja.po, nl.po, pt_BR.po, ru.po, sr.po, sv.po, tr.po, uk.po,
	vi.po, zh_CN.po, zh_TW.po: Update.
2020-02-14 22:00:13 +00:00
Eric Botcazou
81fc552558 Fix problematic TLS sequences for the Solaris linker
This is an old thinko pertaining to the interaction between TLS
sequences and delay slot filling: the compiler knows that it cannot
put instructions with TLS relocations into delay slots with the
original Sun TLS model, but it tests TARGET_SUN_TLS in this context,
which depends only on the assembler.  So if the compiler is configured
with the GNU assembler and the Solaris linker, then TARGET_GNU_TLS is
set instead and the limitation is not enforced.

	PR target/93704
	* config/sparc/sparc.c (eligible_for_call_delay): Test HAVE_GNU_LD
	in conjunction with TARGET_GNU_TLS in early return.
2020-02-14 19:24:33 +01:00
Alexander Monakov
d8305a03b4 rtlanal: optimize costly division in rtx_cost
There's a costly signed 64-bit division in rtx_cost on x86 as well as
any other target where UNITS_PER_WORD expands to TARGET_64BIT ?  8 : 4.
It's also evident that rtx_cost does redundant work for a SET.

Obviously the variable named 'factor' rarely exceeds 1, so in the
majority of cases it can be computed with a well-predictable branch
rather than a division.

This patch makes rtx_cost do the division only in case mode is wider
than UNITS_PER_WORD, and also moves a test for a SET up front to avoid
redundancy.
No functional change.

	* rtlanal.c (rtx_cost): Handle a SET up front. Avoid division if
	the mode is not wider than UNITS_PER_WORD.
2020-02-14 20:22:36 +03:00
Jakub Jelinek
519a33f954 c++: Fix thinko in enum_min_precision [PR61414]
When backporting the PR61414 fix to 8.4, I've noticed that the caching
of prec is actually broken, as it would fail to actually store the computed
precision into the hash_map's value and so next time we'd think the enum needs
0 bits.

2020-02-14  Jakub Jelinek  <jakub@redhat.com>

	PR c++/61414
	* class.c (enum_min_precision): Change prec type from int to int &.

	* g++.dg/cpp0x/enum39.C: New test.
2020-02-14 17:36:00 +01:00
Martin Jambor
515dd04260 sra: Avoid verification failure (PR 93516)
get_ref_base_and_extent can return different sizes for COMPONENT_REFs
and DECLs of the same type, with the latter including (more?)  padding.
When in the IL there is an assignment between such a COMPONENT_REF and a
DECL, SRA will try to propagate the access from the former as a child of
the latter, creating an artificial reference that does not match the
access's declared size, which triggers a verifier assert.

Fixed by teaching the propagation functions about this special situation
so that they don't do it.  The condition is the same that
build_user_friendly_ref_for_offset uses so the artificial reference
causing the verifier is guaranteed not to be created.

2020-02-14  Martin Jambor  <mjambor@suse.cz>

	PR tree-optimization/93516
	* tree-sra.c (propagate_subaccesses_from_rhs): Do not create
	access of the same type as the parent.
	(propagate_subaccesses_from_lhs): Likewise.

	gcc/testsuite/
	* g++.dg/tree-ssa/pr93516.C: New test.
2020-02-14 15:02:35 +01:00
liuhongt
5a8754323d Add ChangeLog entries to relevant ChangeLog files for my last commit. 2020-02-14 21:01:55 +08:00
liuhongt
cf1db5c9a3 Intrinsic macro of vpshr* and vpshl* lack a closing parenthesis which would cause failure in O0.
2020-02-14 Hongtao Liu  <hongtao.liu@intel.com>

gcc/
	PR target/93724
	* config/i386/avx512vbmi2intrin.h
	(_mm512_shrdi_epi16, _mm512_mask_shrdi_epi16,
	_mm512_maskz_shrdi_epi16, _mm512_shrdi_epi32,
	_mm512_mask_shrdi_epi32, _mm512_maskz_shrdi_epi32,
	_m512_shrdi_epi64, _m512_mask_shrdi_epi64,
	_m512_maskz_shrdi_epi64, _mm512_shldi_epi16,
	_mm512_mask_shldi_epi16, _mm512_maskz_shldi_epi16,
	_mm512_shldi_epi32, _mm512_mask_shldi_epi32,
	_mm512_maskz_shldi_epi32, _mm512_shldi_epi64,
	_mm512_mask_shldi_epi64, _mm512_maskz_shldi_epi64): Fix typo
	of lacking a closing parenthesis.
	* config/i386/avx512vbmi2vlintrin.h
	(_mm256_shrdi_epi16, _mm256_mask_shrdi_epi16,
	_mm256_maskz_shrdi_epi16, _mm256_shrdi_epi32,
	_mm256_mask_shrdi_epi32, _mm256_maskz_shrdi_epi32,
	_m256_shrdi_epi64, _m256_mask_shrdi_epi64,
	_m256_maskz_shrdi_epi64, _mm256_shldi_epi16,
	_mm256_mask_shldi_epi16, _mm256_maskz_shldi_epi16,
	_mm256_shldi_epi32, _mm256_mask_shldi_epi32,
	_mm256_maskz_shldi_epi32, _mm256_shldi_epi64,
	_mm256_mask_shldi_epi64, _mm256_maskz_shldi_epi64,
	_mm_shrdi_epi16, _mm_mask_shrdi_epi16,
	_mm_maskz_shrdi_epi16, _mm_shrdi_epi32,
	_mm_mask_shrdi_epi32, _mm_maskz_shrdi_epi32,
	_mm_shrdi_epi64, _mm_mask_shrdi_epi64,
	_m_maskz_shrdi_epi64, _mm_shldi_epi16,
	_mm_mask_shldi_epi16, _mm_maskz_shldi_epi16,
	_mm_shldi_epi32, _mm_mask_shldi_epi32,
	_mm_maskz_shldi_epi32, _mm_shldi_epi64,
	_mm_mask_shldi_epi64, _mm_maskz_shldi_epi64): Ditto.

gcc/testsuite/
	* gcc.target/i386/avx512vbmi2-vpshld-1.c: New test.
	* gcc.target/i386/avx512vbmi2-vpshrd-1.c: Ditto.
	* gcc.target/i386/sse-12.c: Add -mavx512vbmi2.
	* gcc.target/i386/sse-13.c: Ditto.
	* gcc.target/i386/sse-14.c: Add -mavx512vbmi2 and tests.
	* gcc.target/i386/sse-22.c: Ditto.
2020-02-14 16:20:43 +08:00
Jakub Jelinek
e235031d49 c++: Partially implement P1042R1: __VA_OPT__ wording clarifications [PR92319]
I've noticed we claim in cxx-status.html that we implement P1042R1,
but it seems we don't implement any of the changes from there.
The following patch implements just the change that __VA_OPT__ determines
whether to expand to nothing or the enclosed tokens no longer based on
whether there were any tokens passed to __VA_ARGS__, but whether __VA_ARGS__
expands to any tokens (from testing apparently it has to be non-CPP_PADDING
tokens).

I'm afraid I'm completely lost about the padding preservation/removal
changes that are also in the paper, so haven't touched that part.

2020-02-14  Jakub Jelinek  <jakub@redhat.com>

	Partially implement P1042R1: __VA_OPT__ wording clarifications
	PR preprocessor/92319
	* macro.c (expand_arg): Move declarations before vaopt_state
	definition.
	(class vaopt_state): Move enum update_type definition earlier.  Remove
	m_allowed member, add m_arg and m_update members.
	(vaopt_state::vaopt_state): Change last argument from bool any_args
	to macro_arg *arg, initialize m_arg and m_update instead of m_allowed.
	(vaopt_state::update): When bumping m_state from 1 to 2 and m_update
	is ERROR, determine if __VA_ARGS__ expansion has any non-CPP_PADDING
	tokens and set m_update to INCLUDE if it has any, DROP otherwise.
	Return m_update instead of m_allowed ? INCLUDE : DROP in m_state >= 2.
	(replace_args, create_iso_definition): Adjust last argument to
	vaopt_state ctor.

	* c-c++-common/cpp/va-opt-4.c: New test.
2020-02-14 09:04:14 +01:00
GCC Administrator
c595ad44fa Daily bump. 2020-02-14 00:16:36 +00:00
Matheus Castanho
d876c8f9cf rs6000: fixinc: Skip machine_name fix for powerpc*-*-linux*
Some system headers can be broken by the machine_name fix performed
by GCC during the fixincludes step. According to the comment in
fixincludes/fixinc.h:130 :

   On some platforms, machine_name doesn't work properly and
   breaks some of the header files.  Since everything works
   properly without it, just wipe the macro list to
   disable the fix.

So we can just skip it to avoid trouble.

fixincludes/
	* fixinc.in: Skip machine_name fix on powerpc*-*-linux*.
2020-02-14 00:00:33 +00:00
Jakub Jelinek
994e0ad415 c++: Emit DFP typeinfos even when DFP is disabled [PR92906]
Before Joseph's changes when compiling
libstdc++-v3/libsupc++/fundamental_type_info.cc
we were emitting
_ZTIPDd, _ZTIPDe, _ZTIPDf, _ZTIPKDd, _ZTIPKDe, _ZTIPKDf, _ZTIDd, _ZTIDe, _ZTIDf
symbols even when DFP wasn't usable, but now we don't and thus those 9
symbols @@CXXABI_1.3.4 are gone from libstdc++.  While nothing could
probably use it (except perhaps dlsym etc.), various tools don't really like
symbols disappearing from symbol versioned shared libraries with stable ABI.
Adding those in assembly would be possible, but would be a portability
nightmare (the PR has something Red Hat uses in libstdc++_nonshared.a, but that
can handle only a handful of linux ELF targets we care about).
So, instead this patch hacks up the FE, so that it emits those, but in a way
that won't make the DFP types available again on targets that don't support
them.

2020-02-14  Jakub Jelinek  <jakub@redhat.com>

	PR libstdc++/92906
	* cp-tree.h (enum cp_tree_index): Add CPTI_FALLBACK_DFLOAT32_TYPE,
	CPTI_FALLBACK_DFLOAT64_TYPE and CPTI_FALLBACK_DFLOAT128_TYPE.
	(fallback_dfloat32_type, fallback_dfloat64_type,
	fallback_dfloat128_type): Define.
	* mangle.c (write_builtin_type): Handle fallback_dfloat*_type like
	dfloat*_type_node.
	* rtti.c (emit_support_tinfos): Emit DFP typeinfos even when dfp
	is disabled for compatibility.
2020-02-14 00:11:24 +01:00
Jason Merrill
9a0c4f5b37 c++: Fix useless using-declaration.
Here reintroducing the same declarations into the global namespace via
using-declaration is useless but OK.  And a function and a function template
with the same parameters do not conflict.

gcc/cp/ChangeLog
2020-02-13  Jason Merrill  <jason@redhat.com>

	PR c++/93713
	* name-lookup.c (matching_fn_p): A function does not match a
	template.
2020-02-13 22:32:13 +01:00
Jason Merrill
abc79c6498 c++: Fix static local vars in extern "C".
Since my patch for PR 91476 moved visibility determination sooner, a local
static in a vague linkage function now gets TREE_PUBLIC set before
retrofit_lang_decl calls set_decl_linkage, which was making decl_linkage
think that it has external linkage.  It still has no linkage according to
the standard.

gcc/cp/ChangeLog
2020-02-13  Jason Merrill  <jason@redhat.com>

	PR c++/93643
	PR c++/91476
	* tree.c (decl_linkage): Always lk_none for locals.
2020-02-13 22:29:25 +01:00
Patrick Palka
613c932f5e libstdc++: Implement ranges [specialized.algorithms]
This implements all the ranges members defined in [specialized.algorithms]:

  ranges::uninitialized_default_construct
  ranges::uninitialized_value_construct
  ranges::uninitialized_copy
  ranges::uninitialized_copy_n
  ranges::uninitialized_move
  ranges::uninitialized_move_n
  ranges::uninitialized_fill
  ranges::uninitialized_fill_n
  ranges::construct_at
  ranges::destroy_at
  ranges::destroy

It also implements (hopefully correctly) the "obvious" optimizations for these
algos, namely that if the output range has a trivial value type and if the
appropriate operation won't throw then we can dispatch to the standard ranges
version of the algorithm which will then potentially enable further
optimizations.

libstdc++-v3/ChangeLog:

	* include/Makefile.am: Add <bits/ranges_uninitialized.h>.
	* include/Makefile.in: Regenerate.
	* include/bits/ranges_uninitialized.h: New header.
	* include/std/memory: Include it.
	* testsuite/20_util/specialized_algorithms/destroy/constrained.cc: New
	test.
	* .../uninitialized_copy/constrained.cc: New test.
	* .../uninitialized_default_construct/constrained.cc: New test.
	* .../uninitialized_fill/constrained.cc: New test.
	* .../uninitialized_move/constrained.cc: New test.
	* .../uninitialized_value_construct/constrained.cc: New test.
2020-02-13 15:22:28 -05:00
Patrick Palka
90fc7b3ce0 libstdc++: Move some ranges algos to a new header <bits/ranges_algobase.h>
This roughly mirrors the existing split between <bits/stl_algo.h> and
<bits/stl_algobase.h>.  The ranges [specialized.algorithms] will use this new
header to avoid including all of of <bits/ranges_algo.h>.

libstdc++-v3/ChangeLog:

	* include/Makefile.am: Add bits/ranges_algobase.h
	* include/Makefile.in: Regenerate.
	* bits/ranges_algo.h: Include <bits/ranges_algobase.h> and refactor
	existing #includes.
	(__detail::__is_normal_iterator, __detail::is_reverse_iterator,
	__detail::__is_move_iterator, copy_result, move_result,
	__equal, equal, copy_result, move_result, move_backward_result,
	copy_backward_result, __copy_or_move_backward, __copy_or_move, copy,
	move, copy_backward, move_backward, copy_n_result, copy_n, fill_n,
	fill): Split out into ...
	* bits/range_algobase.h: ... this new header.
2020-02-13 15:20:49 -05:00
Jakub Jelinek
bacdd5e978 c: Fix ICE with cast to VLA [93576]
The following testcase ICEs, because the PR84305 changes try to evaluate
the size earlier.  If size has side-effects, that is desirable, and the
side-effects will actually be wrapped in a SAVE_EXPR.  The problem on this
testcase is that there are no side-effects, and c_fully_fold doesn't fold
those COMPOUND_EXPRs to constant, and while before gimplification we unshare
trees found in the expressions, the unsharing doesn't involve TYPE_SIZE etc.
of used types.  Gimplification is destructive though, so when we gimplify
the two nested COMPOUND_EXPRs and then try to gimplify it the second time
for the TYPE_SIZEs, we ICE.
Now, we could use unshare_expr in what we push to *expr, SAVE_EXPRs and
their operands in there aren't unshared, but I really don't see a point of
evaluating expressions that don't have side-effects before, so instead
this just pushes there expressions that do have side-effects.

2020-02-13  Jakub Jelinek  <jakub@redhat.com>

	PR c/93576
	* c-decl.c (grokdeclarator): If this_size_varies, only push size into
	*expr if it has side effects.

	* gcc.dg/pr93576.c: New test.
2020-02-13 21:00:09 +01:00
Alexandre Oliva
0a649b8375 skip fixinc on vxworks7*, amend mkheaders
vxworks7 headers haven't required fixes, and we've decided to avoid
running fixinc on them.

The problem with that is that, with a dummy fixinc, mkheaders wipes
out include-fixed but then multi_dir subdirs are not created again, so
we end up with a limits.h named after each multi_dir, when there are
non-default multilibs.  Oops.

This patch arranges for a dummy fixinc to be created for *-*-vxworks7*
targets, and fixes mkheaders so as to create multi_dir subdirs in
include-fixed after wiping them out, and to copy limits.h so that it
won't take the name that should be of a subdir (unless the multi_dir
is limits.h, but that's hopefully never the case ;-)


for  fixincludes/ChangeLog

	* mkheaders.in: Re-create subdirs, copy limits.h into subdir.
	* mkfixinc.sh: Create dummy fixinc for *-*-vxworks7*.
2020-02-13 15:52:18 -03:00
Sandra Loosemore
bb97ad35ea Add -fdelete-null-pointer-checks to more new C++ testcases.
2020-02-13  Sandra Loosemore  <sandra@codesourcery.com>

	gcc/testsuite/
	* g++.dg/cpp0x/constexpr-static13.C:
	Add -fdelete-null-pointer-checks.
	* g++.dg/cpp2a/constexpr-new11.C: Likewise.
	* g++.dg/cpp2a/constexpr-new12.C: Likewise.
2020-02-13 10:47:55 -08:00
H.J. Lu
1d69147af2 i386: Skip ENDBR32 at the target function entry
Skip ENDBR32 at the target function entry when initializing trampoline.

Tested on Linux/x86-64 CET machine with and without -m32.

gcc/

	PR target/93656
	* config/i386/i386.c (ix86_trampoline_init): Skip ENDBR32 at
	the target function entry.

gcc/testsuite/

	PR target/93656
	* gcc.target/i386/pr93656.c: New test.
2020-02-13 05:29:14 -08:00
Claudiu Zissulescu
ac5e8d2fa0 arc: Don't use if-conversion when optimizing for size.
For ARC, predicated instructions are not very friendly with size
optimizations, leading to increased object size. Disable if-conversion
step when optimized for size.

gcc/
xxxx-xx-xx  Claudiu Zissulescu  <claziss@synopsys.com>

	* common/config/arc/arc-common.c (arc_option_optimization_table):
	Disable if-conversion step when optimized for size.

Signed-off-by: Claudiu Zissulescu <claziss@gmail.com>
2020-02-13 12:49:12 +02:00
Claudiu Zissulescu
9ebba06b5b [ARC] Deprecate q-class option.
This option was used to control the short instruction selection.  However,
there is no difference in cycles if we use or not a short instruction,
and always someone wants a smaller program.

gcc/
xxxx-xx-xx  Claudiu Zissulescu  <claziss@synopsys.com>

	* config/arc/arc.c (arc_conditional_register_usage): R0-R3 and
	R12-R15 are always in ARCOMPACT16_REGS register class.
	* config/arc/arc.opt (mq-class): Deprecate.
	* config/arc/constraint.md ("q"): Remove dependency on mq-class
	option.
	* doc/invoke.texi (mq-class): Update text.
	* common/config/arc/arc-common.c (arc_option_optimization_table):
	Update list.

testsuite/
xxxx-xx-xx  Claudiu Zissulescu  <claziss@synopsys.com>

	* gcc.target/arc/nps400-1.c: Update test.
2020-02-13 12:49:12 +02:00
Claudiu Zissulescu
e57764be55 [ARC] Use TARGET_INSN_COST.
TARGET_INSN_COST gives us a better control over the instruction costs
than classical RTX_COSTS.  A simple cost scheme is in place for the
time being, when optimizing for size, the cost is given by the
instruction length. When optimizing for speed, the cost is 1 for any
recognized instruction, and 2 for any load/store instruction.  The
latter one can be overwritten by using cost attribute for an
instruction.  Due to this change, we need to update also a number of
instruction patterns with a new predicate to better reflect the costs.

gcc/
xxxx-xx-xx  Claudiu Zissulescu  <claziss@synopsys.com>

	* config/arc/arc.c (arc_insn_cost): New function.
	(TARGET_INSN_COST): Define.
	* config/arc/arc.md (cost): New attribute.
	(add_n): Use arc_nonmemory_operand.
	(ashlsi3_insn): Likewise, also update constraints.
	(ashrsi3_insn): Likewise.
	(rotrsi3): Likewise.
	(add_shift): Likewise.
	* config/arc/predicates.md (arc_nonmemory_operand): New predicate.

testsuite/
xxxx-xx-xx  Claudiu Zissulescu  <claziss@synopsys.com>

	* gcc.target/arc/or-cnst-size2.c: Update test.
2020-02-13 12:32:05 +02:00
Claudiu Zissulescu
8dca38c43c [ARC] Update mlo/mhi handling when big-endian CPU.
gcc/
xxxx-xx-xx  Claudiu Zissulescu  <claziss@synopsys.com>

	* config/arc/arc.md (mulsidi_600): Correctly select mlo/mhi
	registers.
	(umulsidi_600): Likewise.

testsuite/
xxxx-xx-xx  Claudiu Zissulescu  <claziss@synopsys.com>
	Petro Karashchenko  <petro.karashchenko@ring.com>

	* estsuite/gcc.target/arc/mul64-1.c: New test.
2020-02-13 12:32:05 +02:00
Jakub Jelinek
ae2b8ede40 i386: Fix up _mm*_mask_popcnt_epi* [PR93696]
As mentioned in the PR and as
https://software.intel.com/sites/landingpage/IntrinsicsGuide/#text=_mask_popcnt_epi
also documents, _mm*_popcnt_epi* intrinsics are consistent with all other
unary AVX512* intrinsics regarding arguments, i.e. the
_mm*_whatever has just single argument (called a in the docs, and __A in the
GCC headers),
_mm*_mask_whatever has 3 arguments (called src, k, a in the docs and
_W, __U, __A in GCC headers) and
_mm*_maskz_whatever 2 arguments (called k, a in the docs and __U, __A in GCC
headers).  Unfortunately, whomever implemented the _mm*_popcnt_epi*
intrinsics got it wrong for the _mm*_mask_popcnt_epi* ones, calling the
args __A, __U, __B and not passing them in the canonical order to the
builtins, making it API incompatible with ICC as well as clang (tested on
godbolts clang 7/8/9/trunk and ICC 19.0.{0,1}, older clang/ICC don't
understand those, so it isn't that it used to be broken even in other
compilers and got changed afterwards).

2020-02-13  Jakub Jelinek  <jakub@redhat.com>

	PR target/93696
	* config/i386/avx512bitalgintrin.h (_mm512_mask_popcnt_epi8,
	_mm512_mask_popcnt_epi16, _mm256_mask_popcnt_epi8,
	_mm256_mask_popcnt_epi16, _mm_mask_popcnt_epi8,
	_mm_mask_popcnt_epi16): Rename __B argument to __A and __A to __W,
	pass __A to the builtin followed by __W instead of __A followed by
	__B.
	* config/i386/avx512vpopcntdqintrin.h (_mm512_mask_popcnt_epi32,
	_mm512_mask_popcnt_epi64): Likewise.
	* config/i386/avx512vpopcntdqvlintrin.h (_mm_mask_popcnt_epi32,
	_mm256_mask_popcnt_epi32, _mm_mask_popcnt_epi64,
	_mm256_mask_popcnt_epi64): Likewise.

	* gcc.target/i386/pr93696-1.c: New test.
	* gcc.target/i386/pr93696-2.c: New test.
	* gcc.target/i386/avx512bitalg-vpopcntw-1.c (TEST): Fix argument order
	of _mm*_mask_popcnt_*.
	* gcc.target/i386/avx512vpopcntdq-vpopcntq-1.c (TEST): Likewise.
	* gcc.target/i386/avx512vpopcntdq-vpopcntd-1.c (TEST): Likewise.
	* gcc.target/i386/avx512bitalg-vpopcntb-1.c (TEST): Likewise.
	* gcc.target/i386/avx512bitalg-vpopcntb.c (foo): Likewise.
	* gcc.target/i386/avx512bitalg-vpopcntbvl.c (foo): Likewise.
	* gcc.target/i386/avx512vpopcntdq-vpopcntd.c (foo): Likewise.
	* gcc.target/i386/avx512bitalg-vpopcntwvl.c (foo): Likewise.
	* gcc.target/i386/avx512bitalg-vpopcntw.c (foo): Likewise.
	* gcc.target/i386/avx512vpopcntdq-vpopcntq.c (foo): Likewise.
2020-02-13 10:43:27 +01:00
Frederik Harwath
2d9eb4e4ca Add ChangeLog entry for my last commit 2020-02-13 10:26:13 +01:00
Frederik Harwath
001ab12e62 openmp: ignore nowait if async execution is unsupported [PR93481]
An OpenMP "nowait" clause on a target construct currently leads to
a call to GOMP_OFFLOAD_async_run in the plugin that is used for
offloading at execution time. The nvptx plugin contains only a stub
of this function that always produces a fatal error if called.

This commit changes the "nowait" implementation to ignore the clause
if the executing device's plugin does not implement GOMP_OFFLOAD_async_run.
The stub in the nvptx plugin is removed which effectively means that
programs containing "nowait" can now be executed with nvptx offloading
as if the clause had not been used.
This behavior is consistent with the OpenMP specification which says that
"[...] execution of the target task *may* be deferred" (emphasis added),
cf. OpenMP 5.0, page 172.

libgomp/

	* plugin/plugin-nvptx.c: Remove GOMP_OFFLOAD_async_run stub.
	* target.c (gomp_load_plugin_for_device): Make "async_run" loading
	optional.
	(gomp_target_task_fn): Assert "devicep->async_run_func".
	(clear_unsupported_flags): New function to remove unsupported flags
	(right now only GOMP_TARGET_FLAG_NOWAIT) that can be be ignored.
	(GOMP_target_ext): Apply clear_unsupported_flags to flags.
	* testsuite/libgomp.c/target-33.c:
	Remove xfail for offload_target_nvptx.
	* testsuite/libgomp.c/target-34.c: Likewise.
2020-02-13 10:18:31 +01:00
Jakub Jelinek
8aba425f4e sccvn: Handle bitfields in vn_reference_lookup_3 [PR93582]
The following patch is first step towards fixing PR93582.
vn_reference_lookup_3 right now punts on anything that isn't byte aligned,
so to be able to lookup a constant bitfield store, one needs to use
the exact same COMPONENT_REF, otherwise it isn't found.

This patch lifts up that that restriction if the bits to be loaded are
covered by a single store of a constant (keeps the restriction so far
for the multiple store case, can tweak that incrementally, but I think
for bisection etc. it is worth to do it one step at a time).

2020-02-13  Jakub Jelinek  <jakub@redhat.com>

	PR tree-optimization/93582
	* fold-const.h (shift_bytes_in_array_left,
	shift_bytes_in_array_right): Declare.
	* fold-const.c (shift_bytes_in_array_left,
	shift_bytes_in_array_right): New function, moved from
	gimple-ssa-store-merging.c, no longer static.
	* gimple-ssa-store-merging.c (shift_bytes_in_array): Move
	to gimple-ssa-store-merging.c and rename to shift_bytes_in_array_left.
	(shift_bytes_in_array_right): Move to gimple-ssa-store-merging.c.
	(encode_tree_to_bitpos): Use shift_bytes_in_array_left instead of
	shift_bytes_in_array.
	(verify_shift_bytes_in_array): Rename to ...
	(verify_shift_bytes_in_array_left): ... this.  Use
	shift_bytes_in_array_left instead of shift_bytes_in_array.
	(store_merging_c_tests): Call verify_shift_bytes_in_array_left
	instead of verify_shift_bytes_in_array.
	* tree-ssa-sccvn.c (vn_reference_lookup_3): For native_encode_expr
	/ native_interpret_expr where the store covers all needed bits,
	punt on PDP-endian, otherwise allow all involved offsets and sizes
	not to be byte-aligned.

	* gcc.dg/tree-ssa/pr93582-1.c: New test.
	* gcc.dg/tree-ssa/pr93582-2.c: New test.
	* gcc.dg/tree-ssa/pr93582-3.c: New test.
2020-02-13 10:04:11 +01:00
Richard Biener
8ea884b85e testsuite/93717 fix up gcc.dg/optimize-bswapsi-2.c for BE
2020-02-13  Richard Biener  <rguenther@suse.de>

	PR testsuite/93717
	* gcc.dg/optimize-bswapsi-2.c: Add BE case.
2020-02-13 09:12:17 +01:00
Jakub Jelinek
dc6d0f89d4 i386: Fix k*shift* intrinsics [PR93673]
As mentioned in the PR, the intrinsics allow counts from 0 to 255, but
we actually reject values from 128 to 255.  That is because QImode
CONST_INTs can be only -128 to 127.  Fixed by using const_0_to_255_operand
and dropping the modes for the operands with those predicates
(the IL actually contains the CONST_INT which has VOIDmode).

2020-02-13  Jakub Jelinek  <jakub@redhat.com>

	PR target/93673
	* config/i386/sse.md (k<code><mode>): Drop mode from last operand and
	use const_0_to_255_operand predicate instead of immediate_operand.
	(avx512dq_fpclass<mode><mask_scalar_merge_name>,
	avx512dq_vmfpclass<mode><mask_scalar_merge_name>,
	vgf2p8affineinvqb_<mode><mask_name>,
	vgf2p8affineqb_<mode><mask_name>): Drop mode from
	const_0_to_255_operand predicated operands.

	* gcc.target/i386/avx512f-pr93673.c: New test.
	* gcc.target/i386/avx512dq-pr93673.c: New test.
	* gcc.target/i386/avx512bw-pr93673.c: New test.
2020-02-13 08:17:07 +01:00
Jakub Jelinek
74ddc9b8e5 testsuite: Fix g++.dg/analyzer/pr93212.C with check-c++-all
The test FAILs with c++11:
.../gcc/testsuite/g++.dg/analyzer/pr93212.C:4:1: error: 'lol' function uses 'auto' type specifier without trailing return type
.../gcc/testsuite/g++.dg/analyzer/pr93212.C:4:1: note: deduced return type only available with '-std=c++14' or '-std=gnu++14'

2020-02-13  Jakub Jelinek  <jakub@redhat.com>

	* g++.dg/analyzer/pr93212.C: Require c++14 rather than c++11.
2020-02-13 08:06:51 +01:00
GCC Administrator
fc7c3d13a8 Daily bump. 2020-02-13 00:16:35 +00:00
Jason Merrill
c2368db567 c++: Fix constexpr if and braced functional cast.
While partially instantiating a generic lambda, we can encounter pack
expansions or constexpr if where we can't actually do the substitution
immediately, and instead remember a partial instantiation context
in *_EXTRA_ARGS.  This includes any local_specializations used in the
pattern or condition.  In this testcase our tree walk wasn't finding the use
of i because we weren't walking into the type of a CONSTRUCTOR.  Fixed by
moving the code for doing that from find_parameter_packs_r into
cp_walk_subtrees.

2020-02-11  Jason Merrill  <jason@redhat.com>

	PR c++/92583
	PR c++/92654
	* tree.c (cp_walk_subtrees): Walk CONSTRUCTOR types here.
	* pt.c (find_parameter_packs_r): Not here.
2020-02-13 00:43:22 +01:00
Iain Sandoe
68bb7e3b9d coroutines: Update to n4849 allocation/deallocation.
This updates the coroutine frame allocation and deallocation usage to
match n4849.

[dcl.fct.def.coroutine] /9, /10, /12.

9 An implementation may need to allocate additional storage for a coroutine.
This storage is known as the coroutine state and is obtained by calling a
non-array allocation function. The allocation function’s name is looked up
in the scope of the promise type. If this lookup fails, the allocation
function’s name is looked up in the global scope. If the lookup finds an
allocation function in the scope of the promise type, overload resolution
is performed on a function call created by assembling an argument list.
The first argument is the amount of space requested, and has type
std::size_t. The lvalues p1 . . . pn are the succeeding [user's function]
arguments. If no viable function is found, overload resolution is performed
again on a function call created by passing just the amount of space required
as an argument of type std::size_t.

10 The unqualified-id get_return_object_on_allocation_failure is looked up in
the scope of the promise type by class member access lookup. If any
declarations are found, then the result of a call to an allocation function
used to obtain storage for the coroutine state is assumed to return nullptr
if it fails to obtain storage, and if a global allocation function is
selected, the ::operator new(size_t, nothrow_t) form is used. The allocation
function used in this case shall have a non-throwing noexcept-specification.
If the allocation function returns nullptr, the coroutine returns control to
the caller of the coroutine and the return value is obtained by a call to
T::get_return_object_on_allocation_failure(), where T is the promise type.

12 The deallocation function’s name is looked up in the scope of the promise
type. If this lookup fails, the deallocation function’s name is looked up in
the global scope. If deallocation function lookup finds both a usual
deallocation function with only a pointer parameter and a usual deallocation
function with both a pointer parameter and a size parameter, then the
selected deallocation function shall be the one with two parameters.
Otherwise, the selected deallocation function shall be the function with one
parameter. If no usual deallocation function is found, the program is ill-
formed. The selected deallocation function shall be called with the address
of the block of storage to be reclaimed as its first argument. If a
deallocation function with a parameter of type std::size_t is used, the size
of the block is passed as the corresponding argument.

gcc/cp/ChangeLog:

2020-02-12 Iain Sandoe <iain@sandoe.co.uk>

	* coroutines.cc (build_actor_fn): Implement deallocation function
	selection per n4849, dcl.fct.def.coroutine bullet 12.
	(morph_fn_to_coro): Implement allocation function selection per
	n4849, dcl.fct.def.coroutine bullets 9 and 10.

2020-02-12 Iain Sandoe <iain@sandoe.co.uk>

	* g++.dg/coroutines/coro1-allocators.h: New.
	* g++.dg/coroutines/coro-bad-alloc-00-bad-op-new.C: New test.
	* g++.dg/coroutines/coro-bad-alloc-01-bad-op-del.C: New test.
	* g++.dg/coroutines/coro-bad-alloc-02-no-op-new-nt.C: New test.
	* g++.dg/coroutines/torture/alloc-00-gro-on-alloc-fail.C: Use new
	coro1-allocators.h header.
	* g++.dg/coroutines/torture/alloc-01-overload-newdel.C: Likewise.
	* g++.dg/coroutines/torture/alloc-02-fail-new-grooaf-check.C: New.
	* g++.dg/coroutines/torture/alloc-03-overload-new-1.C: New test.
	* g++.dg/coroutines/torture/alloc-04-overload-del-use-two-args.C:New.
2020-02-12 23:27:26 +01:00
Jakub Jelinek
1cd9bef89e testsuite: Fix up gcc.target/powerpc/pr93122.c test
The recent renaming of PowerPC -mprefixed-addr option to -mprefixed
has not adjusted the gcc.target/powerpc/pr93122.c test, so it now
FAIL: gcc.target/powerpc/pr93122.c (test for excess errors)
Excess errors:
xgcc: error: unrecognized command-line option '-mprefixed-addr'; did you mean '-mprefixed'?

2020-02-12  Jakub Jelinek  <jakub@redhat.com>

	* gcc.target/powerpc/pr93122.c: Use -mprefixed instead of
	-mprefixed-addr in dg-options.
2020-02-12 23:21:33 +01:00
Jeff Law
bc7ac0a2da Commit correct version of last patch 2020-02-12 14:57:50 -07:00
Jeff Law
985873e508 Combine the two H8 mode shortening peepholes into a single peephole
* config/h8300/h8300.md (comparison shortening peepholes): Use
	a mode iterator to merge the HImode and SImode peepholes.
2020-02-12 14:52:24 -07:00
Patrick Palka
99bbab9f77 libstdc++: Fix LWG issues 3389 and 3390
libstdc++-v3/ChangeLog:

	LWG 3389 and LWG 3390
	* include/bits/stl_iterator.h (move_move_iterator): Use std::move when
	constructing the move_iterator with __i.
	(counted_iterator::counted_iterator): Use std::move when initializing
	M_current with __i.
	* testsuite/24_iterators/counted_iterator/lwg3389.cc: New test.
	* testsuite/24_iterators/move_iterator/lwg3390.cc: New test.
2020-02-12 16:30:19 -05:00
Sandra Loosemore
02ce382cd3 Use a non-empty test program to test ability to link.
On bare-metal targets, I/O support is typically provided by a BSP and
requires a linker script and/or hosting library to be specified on the
linker command line.  Linking an empty program with the default linker
script may succeed, however, which confuses libstdc++ configuration
when programs that probe for the presence of various I/O features fail
with link errors.

2020-02-12  Sandra Loosemore  <sandra@codesourcery.com>

	PR libstdc++/79193
	PR libstdc++/88999

	config/
	* no-executables.m4: Use a non-empty program to test for linker
	support.

	libgcc/
	* configure: Regenerated.

	libgfortran/
	* configure: Regenerated.

	libiberty/
	* configure: Regenerated.

	libitm/
	* configure: Regenerated.

	libobjc/
	* configure: Regenerated.

	libquadmath/
	* configure: Regenerated.

	libssp/
	* configure: Regenerated.

	libstdc++v-3/
	* configure: Regenerated.
2020-02-12 13:22:07 -08:00
Jakub Jelinek
3f3932a0ec real: Fix roundeven on inf/nan [PR93663]
As can be seen in the testcase, roundeven with inf or nan arguments
ICE because of those asserts where nothing prevents from is_halfway_below
being called with those arguments.

The following patch fixes that by just returning false for rvc_inf/rvc_nan
like it returns for rvc_zero, so that we handle roundeven with all those
values as round.  Inf/NaN are not halfway in between two integers...

2020-02-12  Jakub Jelinek  <jakub@redhat.com>

	PR middle-end/93663
	* real.c (is_even): Make static.  Function comment fix.
	(is_halfway_below): Make static, don't assert R is not inf/nan,
	instead return false for those.  Small formatting fixes.

	* gcc.dg/torture/builtin-round-roundeven.c (main): Add tests
	for DBL_MAX, inf, their negations and nan.
2020-02-12 22:15:40 +01:00
François Dumont
b32a3f3243 libstdc++: Add missing std:: qualification of a forward call
* include/bits/hashtable.h
	(_Hashtable<>(_Hashtable&&, std::allocator_type&)): Add
	missing std namespace qualification to forward call.
2020-02-12 22:09:41 +01:00
Martin Sebor
0a0de9636d PR middle-end/93646 - confusing -Wstringop-truncation on strncat where -Wstringop-overflow is expected
gcc/ChangeLog:

	PR middle-end/93646
	* tree-ssa-strlen.c (handle_builtin_stxncpy): Rename...
	(handle_builtin_stxncpy_strncat): ...to this.  Change first argument.
	Issue only -Wstringop-overflow strncat, never -Wstringop-truncation.
	(strlen_check_and_optimize_call): Adjust callee name.

gcc/testsuite/ChangeLog:

	PR middle-end/93646
	* gcc.dg/Wstringop-overflow-31.c: New test.
2020-02-12 13:53:49 -07:00
Jeff Law
37462a131c Drop unused comparison shortening pattern and consolidate remaining comparison shortening patterns.
* config/h8300/h8300.md (comparison shortening peepholes): Drop
	(and (xor)) variant.  Combine other two into single peephole.
2020-02-12 12:12:22 -07:00
Wilco Dijkstra
5bfc8303ff [AArch64] Set ctz rtx_cost (PR93565)
Combine sometimes behaves oddly and duplicates ctz to remove an unnecessary
sign extension.  Avoid this by setting the cost for ctz to be higher than
that of a simple ALU instruction.  Deepsjeng performance improves by ~0.6%.

gcc/
	PR rtl-optimization/93565
	* config/aarch64/aarch64.c (aarch64_rtx_costs): Add CTZ costs.

testsuite/
	PR rtl-optimization/93565
	* gcc.target/aarch64/pr93565.c: New test.
2020-02-12 18:23:21 +00:00
Wilco Dijkstra
9921bbf9b2 [AArch64] Improve popcount expansion
The popcount expansion uses umov to extend the result and move it back
to the integer register file.  If we model ADDV as a zero-extending
operation, fmov can be used to move back to the integer side. This
results in a ~0.5% speedup on deepsjeng on Cortex-A57.

A typical __builtin_popcount expansion is now:

	fmov	s0, w0
	cnt	v0.8b, v0.8b
	addv	b0, v0.8b
	fmov	w0, s0

gcc/
	* config/aarch64/aarch64-simd.md
	(aarch64_zero_extend<GPI:mode>_reduc_plus_<VDQV_E:mode>): New pattern.
	* config/aarch64/aarch64.md (popcount<mode>2): Use it instead of
	generating separate ADDV and zero_extend patterns.
	* config/aarch64/iterators.md (VDQV_E): New iterator.

testsuite/
	* gcc.target/aarch64/popcnt2.c: New test.
2020-02-12 18:19:25 +00:00