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vax.c (split_quadword_operands): Use MEM_P() instead of GET_CODE() == MEM and REG_P() instead of GET_CODE() == REG.
* config/vax/vax.c (split_quadword_operands): Use MEM_P() instead of GET_CODE() == MEM and REG_P() instead of GET_CODE() == REG. (print_operand_address): Likewise. (vax_address_cost): Likewise. (vax_rtx_costs): Likewise. (vax_notice_update_cc): Likewise. (vax_output_int_add): Likewise. (INDEX_REGISTER_P): Likewise. (BASE_REGISTER_P): Likewise. (nonindexed_address_p): Likewise. (vax_mode_dependent_address_p): Likewise. * config/vax/vax.h (EXTRA_CONSTRAINT): Likewise. (PRINT_OPERAND): Likewise. * config/vax/vax.md (ashlsi3): Likewise. (ashlsi3): Likewise. (some more unnamed insns): Likewise. From-SVN: r112090
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@ -1,3 +1,23 @@
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2006-03-15 Jan-Benedict Glaw <jbglaw@lug-owl.de>
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* config/vax/vax.c (split_quadword_operands): Use MEM_P()
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instead of GET_CODE() == MEM and REG_P() instead of
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GET_CODE() == REG.
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(print_operand_address): Likewise.
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(vax_address_cost): Likewise.
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(vax_rtx_costs): Likewise.
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(vax_notice_update_cc): Likewise.
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(vax_output_int_add): Likewise.
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(INDEX_REGISTER_P): Likewise.
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(BASE_REGISTER_P): Likewise.
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(nonindexed_address_p): Likewise.
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(vax_mode_dependent_address_p): Likewise.
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* config/vax/vax.h (EXTRA_CONSTRAINT): Likewise.
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(PRINT_OPERAND): Likewise.
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* config/vax/vax.md (ashlsi3): Likewise.
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(ashlsi3): Likewise.
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(some more unnamed insns): Likewise.
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2006-03-15 Kazu Hirata <kazu@codesourcery.com>
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2006-03-15 Kazu Hirata <kazu@codesourcery.com>
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* tree-ssa-dce.c (EXECUTE_IF_CONTROL_DEPENDENT): Make it an
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* tree-ssa-dce.c (EXECUTE_IF_CONTROL_DEPENDENT): Make it an
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@ -179,7 +179,7 @@ split_quadword_operands (rtx * operands, rtx * low, int n ATTRIBUTE_UNUSED)
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{
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{
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if (low[i])
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if (low[i])
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/* it's already been figured out */;
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/* it's already been figured out */;
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else if (GET_CODE (operands[i]) == MEM
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else if (MEM_P (operands[i])
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&& (GET_CODE (XEXP (operands[i], 0)) == POST_INC))
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&& (GET_CODE (XEXP (operands[i], 0)) == POST_INC))
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{
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{
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rtx addr = XEXP (operands[i], 0);
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rtx addr = XEXP (operands[i], 0);
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@ -237,13 +237,13 @@ print_operand_address (FILE * file, rtx addr)
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reg1 = 0; ireg = 0; breg = 0; offset = 0;
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reg1 = 0; ireg = 0; breg = 0; offset = 0;
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if (CONSTANT_ADDRESS_P (XEXP (addr, 0))
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if (CONSTANT_ADDRESS_P (XEXP (addr, 0))
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|| GET_CODE (XEXP (addr, 0)) == MEM)
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|| MEM_P (XEXP (addr, 0)))
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{
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{
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offset = XEXP (addr, 0);
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offset = XEXP (addr, 0);
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addr = XEXP (addr, 1);
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addr = XEXP (addr, 1);
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}
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}
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else if (CONSTANT_ADDRESS_P (XEXP (addr, 1))
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else if (CONSTANT_ADDRESS_P (XEXP (addr, 1))
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|| GET_CODE (XEXP (addr, 1)) == MEM)
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|| MEM_P (XEXP (addr, 1)))
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{
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{
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offset = XEXP (addr, 1);
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offset = XEXP (addr, 1);
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addr = XEXP (addr, 0);
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addr = XEXP (addr, 0);
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@ -258,12 +258,12 @@ print_operand_address (FILE * file, rtx addr)
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ireg = XEXP (addr, 0);
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ireg = XEXP (addr, 0);
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addr = XEXP (addr, 1);
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addr = XEXP (addr, 1);
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}
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}
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else if (GET_CODE (XEXP (addr, 1)) == REG)
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else if (REG_P (XEXP (addr, 1)))
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{
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{
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reg1 = XEXP (addr, 1);
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reg1 = XEXP (addr, 1);
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addr = XEXP (addr, 0);
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addr = XEXP (addr, 0);
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}
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}
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else if (GET_CODE (XEXP (addr, 0)) == REG)
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else if (REG_P (XEXP (addr, 0)))
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{
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{
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reg1 = XEXP (addr, 0);
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reg1 = XEXP (addr, 0);
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addr = XEXP (addr, 1);
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addr = XEXP (addr, 1);
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@ -271,7 +271,7 @@ print_operand_address (FILE * file, rtx addr)
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else
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else
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gcc_unreachable ();
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gcc_unreachable ();
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if (GET_CODE (addr) == REG)
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if (REG_P (addr))
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{
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{
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if (reg1)
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if (reg1)
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ireg = addr;
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ireg = addr;
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@ -284,7 +284,7 @@ print_operand_address (FILE * file, rtx addr)
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{
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{
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gcc_assert (GET_CODE (addr) == PLUS);
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gcc_assert (GET_CODE (addr) == PLUS);
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if (CONSTANT_ADDRESS_P (XEXP (addr, 0))
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if (CONSTANT_ADDRESS_P (XEXP (addr, 0))
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|| GET_CODE (XEXP (addr, 0)) == MEM)
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|| MEM_P (XEXP (addr, 0)))
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{
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{
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if (offset)
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if (offset)
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{
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{
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@ -298,7 +298,7 @@ print_operand_address (FILE * file, rtx addr)
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}
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}
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offset = XEXP (addr, 0);
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offset = XEXP (addr, 0);
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}
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}
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else if (GET_CODE (XEXP (addr, 0)) == REG)
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else if (REG_P (XEXP (addr, 0)))
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{
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{
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if (reg1)
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if (reg1)
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ireg = reg1, breg = XEXP (addr, 0), reg1 = 0;
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ireg = reg1, breg = XEXP (addr, 0), reg1 = 0;
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@ -313,7 +313,7 @@ print_operand_address (FILE * file, rtx addr)
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}
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}
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if (CONSTANT_ADDRESS_P (XEXP (addr, 1))
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if (CONSTANT_ADDRESS_P (XEXP (addr, 1))
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|| GET_CODE (XEXP (addr, 1)) == MEM)
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|| MEM_P (XEXP (addr, 1)))
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{
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{
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if (offset)
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if (offset)
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{
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{
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@ -327,7 +327,7 @@ print_operand_address (FILE * file, rtx addr)
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}
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}
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offset = XEXP (addr, 1);
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offset = XEXP (addr, 1);
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}
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}
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else if (GET_CODE (XEXP (addr, 1)) == REG)
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else if (REG_P (XEXP (addr, 1)))
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{
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{
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if (reg1)
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if (reg1)
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ireg = reg1, breg = XEXP (addr, 1), reg1 = 0;
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ireg = reg1, breg = XEXP (addr, 1), reg1 = 0;
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@ -345,7 +345,7 @@ print_operand_address (FILE * file, rtx addr)
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/* If REG1 is nonzero, figure out if it is a base or index register. */
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/* If REG1 is nonzero, figure out if it is a base or index register. */
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if (reg1)
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if (reg1)
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{
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{
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if (breg != 0 || (offset && GET_CODE (offset) == MEM))
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if (breg != 0 || (offset && MEM_P (offset)))
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{
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{
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gcc_assert (!ireg);
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gcc_assert (!ireg);
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ireg = reg1;
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ireg = reg1;
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@ -364,7 +364,7 @@ print_operand_address (FILE * file, rtx addr)
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{
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{
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if (GET_CODE (ireg) == MULT)
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if (GET_CODE (ireg) == MULT)
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ireg = XEXP (ireg, 0);
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ireg = XEXP (ireg, 0);
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gcc_assert (GET_CODE (ireg) == REG);
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gcc_assert (REG_P (ireg));
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fprintf (file, "[%s]", reg_names[REGNO (ireg)]);
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fprintf (file, "[%s]", reg_names[REGNO (ireg)]);
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}
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}
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break;
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break;
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@ -523,7 +523,7 @@ vax_address_cost_1 (rtx addr)
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static int
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static int
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vax_address_cost (rtx x)
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vax_address_cost (rtx x)
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{
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{
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return (1 + (GET_CODE (x) == REG ? 0 : vax_address_cost_1 (x)));
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return (1 + (REG_P (x) ? 0 : vax_address_cost_1 (x)));
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}
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}
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/* Cost of an expression on a VAX. This version has costs tuned for the
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/* Cost of an expression on a VAX. This version has costs tuned for the
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@ -725,7 +725,7 @@ vax_rtx_costs (rtx x, int code, int outer_code, int *total)
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else
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else
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*total = 3; /* 4 on VAX 2 */
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*total = 3; /* 4 on VAX 2 */
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x = XEXP (x, 0);
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x = XEXP (x, 0);
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if (GET_CODE (x) != REG && GET_CODE (x) != POST_INC)
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if (!REG_P (x) && GET_CODE (x) != POST_INC)
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*total += vax_address_cost_1 (x);
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*total += vax_address_cost_1 (x);
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return true;
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return true;
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@ -789,7 +789,7 @@ vax_rtx_costs (rtx x, int code, int outer_code, int *total)
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break;
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break;
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case MEM:
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case MEM:
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*total += 1; /* 2 on VAX 2 */
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*total += 1; /* 2 on VAX 2 */
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if (GET_CODE (XEXP (op, 0)) != REG)
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if (!REG_P (XEXP (op, 0)))
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*total += vax_address_cost_1 (XEXP (op, 0));
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*total += vax_address_cost_1 (XEXP (op, 0));
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break;
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break;
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case REG:
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case REG:
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@ -888,13 +888,13 @@ vax_notice_update_cc (rtx exp, rtx insn ATTRIBUTE_UNUSED)
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}
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}
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else
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else
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CC_STATUS_INIT;
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CC_STATUS_INIT;
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if (cc_status.value1 && GET_CODE (cc_status.value1) == REG
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if (cc_status.value1 && REG_P (cc_status.value1)
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&& cc_status.value2
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&& cc_status.value2
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&& reg_overlap_mentioned_p (cc_status.value1, cc_status.value2))
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&& reg_overlap_mentioned_p (cc_status.value1, cc_status.value2))
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cc_status.value2 = 0;
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cc_status.value2 = 0;
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if (cc_status.value1 && GET_CODE (cc_status.value1) == MEM
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if (cc_status.value1 && MEM_P (cc_status.value1)
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&& cc_status.value2
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&& cc_status.value2
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&& GET_CODE (cc_status.value2) == MEM)
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&& MEM_P (cc_status.value2))
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cc_status.value2 = 0;
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cc_status.value2 = 0;
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/* Actual condition, one line up, should be that value2's address
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/* Actual condition, one line up, should be that value2's address
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depends on value1, but that is too much of a pain. */
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depends on value1, but that is too much of a pain. */
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@ -999,7 +999,7 @@ vax_output_int_add (rtx insn ATTRIBUTE_UNUSED, rtx *operands,
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return "subl2 $%n2,%0";
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return "subl2 $%n2,%0";
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if (GET_CODE (operands[2]) == CONST_INT
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if (GET_CODE (operands[2]) == CONST_INT
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&& (unsigned) INTVAL (operands[2]) >= 64
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&& (unsigned) INTVAL (operands[2]) >= 64
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&& GET_CODE (operands[1]) == REG
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&& REG_P (operands[1])
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&& ((INTVAL (operands[2]) < 32767 && INTVAL (operands[2]) > -32768)
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&& ((INTVAL (operands[2]) < 32767 && INTVAL (operands[2]) > -32768)
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|| REGNO (operands[1]) > 11))
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|| REGNO (operands[1]) > 11))
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return "movab %c2(%1),%0";
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return "movab %c2(%1),%0";
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@ -1012,7 +1012,7 @@ vax_output_int_add (rtx insn ATTRIBUTE_UNUSED, rtx *operands,
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if (GET_CODE (operands[2]) == CONST_INT
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if (GET_CODE (operands[2]) == CONST_INT
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&& INTVAL (operands[2]) < 32767
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&& INTVAL (operands[2]) < 32767
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&& INTVAL (operands[2]) > -32768
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&& INTVAL (operands[2]) > -32768
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&& GET_CODE (operands[1]) == REG
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&& REG_P (operands[1])
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&& push_operand (operands[0], SImode))
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&& push_operand (operands[0], SImode))
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return "pushab %c2(%1)";
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return "pushab %c2(%1)";
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@ -1022,7 +1022,7 @@ vax_output_int_add (rtx insn ATTRIBUTE_UNUSED, rtx *operands,
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if (GET_CODE (operands[2]) == CONST_INT
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if (GET_CODE (operands[2]) == CONST_INT
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&& (unsigned) INTVAL (operands[2]) >= 64
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&& (unsigned) INTVAL (operands[2]) >= 64
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&& GET_CODE (operands[1]) == REG
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&& REG_P (operands[1])
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&& ((INTVAL (operands[2]) < 32767 && INTVAL (operands[2]) > -32768)
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&& ((INTVAL (operands[2]) < 32767 && INTVAL (operands[2]) > -32768)
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|| REGNO (operands[1]) > 11))
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|| REGNO (operands[1]) > 11))
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return "movab %c2(%1),%0";
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return "movab %c2(%1),%0";
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@ -1121,12 +1121,12 @@ legitimate_constant_p (rtx x ATTRIBUTE_UNUSED)
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/* Nonzero if X is a hard reg that can be used as an index
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/* Nonzero if X is a hard reg that can be used as an index
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or, if not strict, if it is a pseudo reg. */
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or, if not strict, if it is a pseudo reg. */
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#define INDEX_REGISTER_P(X, STRICT) \
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#define INDEX_REGISTER_P(X, STRICT) \
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(GET_CODE (X) == REG && (!(STRICT) || REGNO_OK_FOR_INDEX_P (REGNO (X))))
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(REG_P (X) && (!(STRICT) || REGNO_OK_FOR_INDEX_P (REGNO (X))))
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/* Nonzero if X is a hard reg that can be used as a base reg
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/* Nonzero if X is a hard reg that can be used as a base reg
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or, if not strict, if it is a pseudo reg. */
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or, if not strict, if it is a pseudo reg. */
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#define BASE_REGISTER_P(X, STRICT) \
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#define BASE_REGISTER_P(X, STRICT) \
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(GET_CODE (X) == REG && (!(STRICT) || REGNO_OK_FOR_BASE_P (REGNO (X))))
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(REG_P (X) && (!(STRICT) || REGNO_OK_FOR_BASE_P (REGNO (X))))
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#ifdef NO_EXTERNAL_INDIRECT_ADDRESS
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#ifdef NO_EXTERNAL_INDIRECT_ADDRESS
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@ -1179,7 +1179,7 @@ static int
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nonindexed_address_p (rtx x, int strict)
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nonindexed_address_p (rtx x, int strict)
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{
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{
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rtx xfoo0;
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rtx xfoo0;
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if (GET_CODE (x) == REG)
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if (REG_P (x))
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{
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{
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extern rtx *reg_equiv_mem;
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extern rtx *reg_equiv_mem;
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if (! reload_in_progress
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if (! reload_in_progress
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@ -1192,7 +1192,7 @@ nonindexed_address_p (rtx x, int strict)
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if (indirectable_address_p (x, strict))
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if (indirectable_address_p (x, strict))
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return 1;
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return 1;
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xfoo0 = XEXP (x, 0);
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xfoo0 = XEXP (x, 0);
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if (GET_CODE (x) == MEM && indirectable_address_p (xfoo0, strict))
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if (MEM_P (x) && indirectable_address_p (xfoo0, strict))
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return 1;
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return 1;
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if ((GET_CODE (x) == PRE_DEC || GET_CODE (x) == POST_INC)
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if ((GET_CODE (x) == PRE_DEC || GET_CODE (x) == POST_INC)
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&& BASE_REGISTER_P (xfoo0, strict))
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&& BASE_REGISTER_P (xfoo0, strict))
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@ -1314,9 +1314,9 @@ vax_mode_dependent_address_p (rtx x)
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xfoo0 = XEXP (x, 0);
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xfoo0 = XEXP (x, 0);
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xfoo1 = XEXP (x, 1);
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xfoo1 = XEXP (x, 1);
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if (CONSTANT_ADDRESS_P (xfoo0) && GET_CODE (xfoo1) == REG)
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if (CONSTANT_ADDRESS_P (xfoo0) && REG_P (xfoo1))
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return 0;
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return 0;
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if (CONSTANT_ADDRESS_P (xfoo1) && GET_CODE (xfoo0) == REG)
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if (CONSTANT_ADDRESS_P (xfoo1) && REG_P (xfoo0))
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return 0;
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return 0;
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return 1;
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return 1;
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@ -291,7 +291,7 @@ enum reg_class { NO_REGS, ALL_REGS, LIM_REG_CLASSES };
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#define EXTRA_CONSTRAINT(OP, C) \
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#define EXTRA_CONSTRAINT(OP, C) \
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((C) == 'Q' \
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((C) == 'Q' \
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? GET_CODE (OP) == MEM && ! mode_dependent_address_p (XEXP (OP, 0)) \
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? MEM_P (OP) && ! mode_dependent_address_p (XEXP (OP, 0)) \
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: 0)
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: 0)
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/* Given an rtx X being reloaded into a reg required to be
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/* Given an rtx X being reloaded into a reg required to be
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@ -891,9 +891,9 @@ VAX operand formatting codes:
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fprintf (FILE, "$%d", (int) (0xff & - INTVAL (X))); \
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fprintf (FILE, "$%d", (int) (0xff & - INTVAL (X))); \
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else if (CODE == 'M' && GET_CODE (X) == CONST_INT) \
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else if (CODE == 'M' && GET_CODE (X) == CONST_INT) \
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fprintf (FILE, "$%d", ~((1 << INTVAL (x)) - 1)); \
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fprintf (FILE, "$%d", ~((1 << INTVAL (x)) - 1)); \
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else if (GET_CODE (X) == REG) \
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else if (REG_P (X)) \
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fprintf (FILE, "%s", reg_names[REGNO (X)]); \
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fprintf (FILE, "%s", reg_names[REGNO (X)]); \
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else if (GET_CODE (X) == MEM) \
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else if (MEM_P (X)) \
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output_address (XEXP (X, 0)); \
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output_address (XEXP (X, 0)); \
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||||||
else if (GET_CODE (X) == CONST_DOUBLE && GET_MODE (X) == SFmode) \
|
else if (GET_CODE (X) == CONST_DOUBLE && GET_MODE (X) == SFmode) \
|
||||||
{ char dstr[30]; \
|
{ char dstr[30]; \
|
||||||
|
@ -648,7 +648,7 @@
|
|||||||
{
|
{
|
||||||
if (operands[2] == const1_rtx && rtx_equal_p (operands[0], operands[1]))
|
if (operands[2] == const1_rtx && rtx_equal_p (operands[0], operands[1]))
|
||||||
return \"addl2 %0,%0\";
|
return \"addl2 %0,%0\";
|
||||||
if (GET_CODE (operands[1]) == REG
|
if (REG_P (operands[1])
|
||||||
&& GET_CODE (operands[2]) == CONST_INT)
|
&& GET_CODE (operands[2]) == CONST_INT)
|
||||||
{
|
{
|
||||||
int i = INTVAL (operands[2]);
|
int i = INTVAL (operands[2]);
|
||||||
@ -761,7 +761,7 @@
|
|||||||
(match_operand:SI 3 "general_operand" "g"))]
|
(match_operand:SI 3 "general_operand" "g"))]
|
||||||
"(INTVAL (operands[1]) == 8 || INTVAL (operands[1]) == 16)
|
"(INTVAL (operands[1]) == 8 || INTVAL (operands[1]) == 16)
|
||||||
&& INTVAL (operands[2]) % INTVAL (operands[1]) == 0
|
&& INTVAL (operands[2]) % INTVAL (operands[1]) == 0
|
||||||
&& (GET_CODE (operands[0]) == REG
|
&& (REG_P (operands[0])
|
||||||
|| ! mode_dependent_address_p (XEXP (operands[0], 0)))"
|
|| ! mode_dependent_address_p (XEXP (operands[0], 0)))"
|
||||||
"*
|
"*
|
||||||
{
|
{
|
||||||
@ -789,7 +789,7 @@
|
|||||||
(match_operand:SI 3 "const_int_operand" "n")))]
|
(match_operand:SI 3 "const_int_operand" "n")))]
|
||||||
"(INTVAL (operands[2]) == 8 || INTVAL (operands[2]) == 16)
|
"(INTVAL (operands[2]) == 8 || INTVAL (operands[2]) == 16)
|
||||||
&& INTVAL (operands[3]) % INTVAL (operands[2]) == 0
|
&& INTVAL (operands[3]) % INTVAL (operands[2]) == 0
|
||||||
&& (GET_CODE (operands[1]) == REG
|
&& (REG_P (operands[1])
|
||||||
|| ! mode_dependent_address_p (XEXP (operands[1], 0)))"
|
|| ! mode_dependent_address_p (XEXP (operands[1], 0)))"
|
||||||
"*
|
"*
|
||||||
{
|
{
|
||||||
@ -816,7 +816,7 @@
|
|||||||
(match_operand:SI 3 "const_int_operand" "n")))]
|
(match_operand:SI 3 "const_int_operand" "n")))]
|
||||||
"(INTVAL (operands[2]) == 8 || INTVAL (operands[2]) == 16)
|
"(INTVAL (operands[2]) == 8 || INTVAL (operands[2]) == 16)
|
||||||
&& INTVAL (operands[3]) % INTVAL (operands[2]) == 0
|
&& INTVAL (operands[3]) % INTVAL (operands[2]) == 0
|
||||||
&& (GET_CODE (operands[1]) == REG
|
&& (REG_P (operands[1])
|
||||||
|| ! mode_dependent_address_p (XEXP (operands[1], 0)))"
|
|| ! mode_dependent_address_p (XEXP (operands[1], 0)))"
|
||||||
"*
|
"*
|
||||||
{
|
{
|
||||||
@ -872,7 +872,7 @@
|
|||||||
"*
|
"*
|
||||||
{
|
{
|
||||||
if (GET_CODE (operands[3]) != CONST_INT || GET_CODE (operands[2]) != CONST_INT
|
if (GET_CODE (operands[3]) != CONST_INT || GET_CODE (operands[2]) != CONST_INT
|
||||||
|| GET_CODE (operands[0]) != REG
|
|| !REG_P (operands[0])
|
||||||
|| (INTVAL (operands[2]) != 8 && INTVAL (operands[2]) != 16))
|
|| (INTVAL (operands[2]) != 8 && INTVAL (operands[2]) != 16))
|
||||||
return \"extv %3,%2,%1,%0\";
|
return \"extv %3,%2,%1,%0\";
|
||||||
if (INTVAL (operands[2]) == 8)
|
if (INTVAL (operands[2]) == 8)
|
||||||
@ -889,7 +889,7 @@
|
|||||||
"*
|
"*
|
||||||
{
|
{
|
||||||
if (GET_CODE (operands[3]) != CONST_INT || GET_CODE (operands[2]) != CONST_INT
|
if (GET_CODE (operands[3]) != CONST_INT || GET_CODE (operands[2]) != CONST_INT
|
||||||
|| GET_CODE (operands[0]) != REG)
|
|| !REG_P (operands[0]))
|
||||||
return \"extzv %3,%2,%1,%0\";
|
return \"extzv %3,%2,%1,%0\";
|
||||||
if (INTVAL (operands[2]) == 8)
|
if (INTVAL (operands[2]) == 8)
|
||||||
return \"rotl %R3,%1,%0\;movzbl %0,%0\";
|
return \"rotl %R3,%1,%0\;movzbl %0,%0\";
|
||||||
@ -934,12 +934,12 @@
|
|||||||
""
|
""
|
||||||
"*
|
"*
|
||||||
{
|
{
|
||||||
if (GET_CODE (operands[0]) != REG || GET_CODE (operands[2]) != CONST_INT
|
if (!REG_P (operands[0]) || GET_CODE (operands[2]) != CONST_INT
|
||||||
|| GET_CODE (operands[3]) != CONST_INT
|
|| GET_CODE (operands[3]) != CONST_INT
|
||||||
|| (INTVAL (operands[2]) != 8 && INTVAL (operands[2]) != 16)
|
|| (INTVAL (operands[2]) != 8 && INTVAL (operands[2]) != 16)
|
||||||
|| INTVAL (operands[2]) + INTVAL (operands[3]) > 32
|
|| INTVAL (operands[2]) + INTVAL (operands[3]) > 32
|
||||||
|| side_effects_p (operands[1])
|
|| side_effects_p (operands[1])
|
||||||
|| (GET_CODE (operands[1]) == MEM
|
|| (MEM_P (operands[1])
|
||||||
&& mode_dependent_address_p (XEXP (operands[1], 0))))
|
&& mode_dependent_address_p (XEXP (operands[1], 0))))
|
||||||
return \"extv %3,%2,%1,%0\";
|
return \"extv %3,%2,%1,%0\";
|
||||||
if (INTVAL (operands[2]) == 8)
|
if (INTVAL (operands[2]) == 8)
|
||||||
@ -963,11 +963,11 @@
|
|||||||
""
|
""
|
||||||
"*
|
"*
|
||||||
{
|
{
|
||||||
if (GET_CODE (operands[0]) != REG || GET_CODE (operands[2]) != CONST_INT
|
if (! REG_P (operands[0]) || GET_CODE (operands[2]) != CONST_INT
|
||||||
|| GET_CODE (operands[3]) != CONST_INT
|
|| GET_CODE (operands[3]) != CONST_INT
|
||||||
|| INTVAL (operands[2]) + INTVAL (operands[3]) > 32
|
|| INTVAL (operands[2]) + INTVAL (operands[3]) > 32
|
||||||
|| side_effects_p (operands[1])
|
|| side_effects_p (operands[1])
|
||||||
|| (GET_CODE (operands[1]) == MEM
|
|| (MEM_P (operands[1])
|
||||||
&& mode_dependent_address_p (XEXP (operands[1], 0))))
|
&& mode_dependent_address_p (XEXP (operands[1], 0))))
|
||||||
return \"extzv %3,%2,%1,%0\";
|
return \"extzv %3,%2,%1,%0\";
|
||||||
if (INTVAL (operands[2]) == 8)
|
if (INTVAL (operands[2]) == 8)
|
||||||
|
Loading…
Reference in New Issue
Block a user