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re PR target/51244 ([SH] Inefficient conditional branch and code around T bit)
gcc/ PR target/51244 * config/sh/sh_treg_combine.cc (sh_treg_combine::try_optimize_cbranch): Combine ccreg inversion and cbranch into inverted cbranch. From-SVN: r218847
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@ -1,3 +1,9 @@
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2014-12-17 Oleg Endo <olegendo@gcc.gnu.org>
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PR target/51244
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* config/sh/sh_treg_combine.cc (sh_treg_combine::try_optimize_cbranch):
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Combine ccreg inversion and cbranch into inverted cbranch.
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2014-12-17 Vladimir Makarov <vmakarov@redhat.com>
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* lra-constraints.c (process_alt_operands): Remove non
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@ -1339,9 +1339,17 @@ sh_treg_combine::try_optimize_cbranch (rtx_insn *insn)
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// for now we limit the search to the current basic block.
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trace.setcc = find_set_of_reg_bb (m_ccreg, prev_nonnote_insn_bb (insn));
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if (!is_cmp_eq_zero (trace.setcc.set_src ()))
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if (trace.setcc.set_src () == NULL_RTX)
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log_return_void ("could not find set of ccreg in current BB\n");
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if (!is_cmp_eq_zero (trace.setcc.set_src ())
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&& !is_inverted_ccreg (trace.setcc.set_src ()))
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{
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log_msg ("unsupported set of ccreg in current BB: ");
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log_rtx (trace.setcc.set_src ());
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log_return_void ("\n");
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}
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rtx trace_reg = XEXP (trace.setcc.set_src (), 0);
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log_msg ("set of ccreg:\n");
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@ -1358,6 +1366,19 @@ sh_treg_combine::try_optimize_cbranch (rtx_insn *insn)
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log_return_void ("\nbecause it's volatile\n");
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}
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// If the ccreg is inverted before cbranch try inverting the branch
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// condition.
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if (is_inverted_ccreg (trace.setcc.set_src ()))
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{
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if (!trace.can_invert_condition ())
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log_return_void ("branch condition can't be inverted - aborting\n");
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if (try_invert_branch_condition (trace))
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delete_insn (trace.setcc.insn);
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return;
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}
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// Now that we have an insn which tests some reg and sets the condition
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// reg before the conditional branch, try to figure out how that tested
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// reg was formed, i.e. find all the insns that set the tested reg in
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