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config.gcc (arm*-*-netbsdelf*): Enable configuration.
* config.gcc (arm*-*-netbsdelf*): Enable configuration. * config/arm/netbsd-elf.h: New file. From-SVN: r59359
This commit is contained in:
Jason Thorpe
Jason Thorpe
parent
57c21a4200
commit
ff3afb5623
@ -1,3 +1,8 @@
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2002-11-21 Jason Thorpe <thorpej@wasabisystems.com>
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* config.gcc (arm*-*-netbsdelf*): Enable configuration.
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* config/arm/netbsd-elf.h: New file.
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2002-11-21 Jason Thorpe <thorpej@wasabisystems.com>
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* config/arm/elf.h (SUBTARGET_EXTRA_SPECS): Add
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@ -617,7 +617,8 @@ arm*-*-freebsd*|strongarm*-*-freebsd*)
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tmake_file="${tmake_file} arm/t-strongarm-elf"
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;;
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arm*-*-netbsdelf*)
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echo "GCC does not yet support the ${machine} target"; exit 1
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tm_file="dbxelf.h elfos.h netbsd.h netbsd-elf.h arm/elf.h arm/aout.h arm/arm.h arm/netbsd-elf.h"
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tmake_file="${tmake_file} arm/t-netbsd"
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;;
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arm*-*-netbsd*)
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tm_file="arm/aout.h arm/arm.h netbsd.h netbsd-aout.h arm/netbsd.h"
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177
gcc/config/arm/netbsd-elf.h
Normal file
177
gcc/config/arm/netbsd-elf.h
Normal file
@ -0,0 +1,177 @@
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/* Definitions of target machine for GNU compiler, NetBSD/arm ELF version.
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Copyright (C) 2002 Free Software Foundation, Inc.
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Contributed by Wasabi Systems, Inc.
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This file is part of GNU CC.
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GNU CC is free software; you can redistribute it and/or modify
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it under the terms of the GNU General Public License as published by
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the Free Software Foundation; either version 2, or (at your option)
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any later version.
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GNU CC is distributed in the hope that it will be useful,
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but WITHOUT ANY WARRANTY; without even the implied warranty of
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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GNU General Public License for more details.
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You should have received a copy of the GNU General Public License
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along with GNU CC; see the file COPYING. If not, write to
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the Free Software Foundation, 59 Temple Place - Suite 330,
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Boston, MA 02111-1307, USA. */
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/* Run-time Target Specification. */
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#undef TARGET_VERSION
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#define TARGET_VERSION fputs (" (NetBSD/arm ELF)", stderr);
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/* This is used in ASM_FILE_START. */
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#undef ARM_OS_NAME
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#define ARM_OS_NAME "NetBSD"
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/* arm.h defaults to ARM6 CPU. */
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/* This defaults us to little-endian. */
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#ifndef TARGET_ENDIAN_DEFAULT
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#define TARGET_ENDIAN_DEFAULT 0
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#endif
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#undef MULTILIB_DEFAULTS
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/* Default it to use ATPCS with soft-VFP. */
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#undef TARGET_DEFAULT
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#define TARGET_DEFAULT \
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(ARM_FLAG_APCS_32 \
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| ARM_FLAG_SOFT_FLOAT \
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| ARM_FLAG_APCS_FRAME \
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| ARM_FLAG_ATPCS \
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| ARM_FLAG_VFP \
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| ARM_FLAG_MMU_TRAPS \
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| TARGET_ENDIAN_DEFAULT)
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#define TARGET_OS_CPP_BUILTINS() \
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do \
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{ \
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NETBSD_OS_CPP_BUILTINS_ELF(); \
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} \
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while (0)
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#undef SUBTARGET_CPP_SPEC
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#define SUBTARGET_CPP_SPEC NETBSD_CPP_SPEC
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#undef SUBTARGET_EXTRA_ASM_SPEC
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#define SUBTARGET_EXTRA_ASM_SPEC \
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"-matpcs %{fpic:-k} %{fPIC:-k}"
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/* Default floating point model is soft-VFP.
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FIXME: -mhard-float currently implies FPA. */
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#undef SUBTARGET_ASM_FLOAT_SPEC
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#define SUBTARGET_ASM_FLOAT_SPEC \
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"%{mhard-float:-mfpu=fpa} \
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%{msoft-float:-mfpu=softvfp} \
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%{!mhard-float: \
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%{!msoft-float:-mfpu=softvfp}}"
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#undef SUBTARGET_EXTRA_SPECS
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#define SUBTARGET_EXTRA_SPECS \
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{ "subtarget_extra_asm_spec", SUBTARGET_EXTRA_ASM_SPEC }, \
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{ "subtarget_asm_float_spec", SUBTARGET_ASM_FLOAT_SPEC }, \
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{ "netbsd_link_spec", NETBSD_LINK_SPEC_ELF }, \
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{ "netbsd_entry_point", NETBSD_ENTRY_POINT },
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#define NETBSD_ENTRY_POINT "__start"
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#undef LINK_SPEC
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#define LINK_SPEC \
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"-X %{mbig-endian:-EB} %{mlittle-endian:-EL} \
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%(netbsd_link_spec)"
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/* Make GCC agree with <machine/ansi.h>. */
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#undef SIZE_TYPE
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#define SIZE_TYPE "long unsigned int"
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#undef PTRDIFF_TYPE
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#define PTRDIFF_TYPE "long int"
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/* We don't have any limit on the length as out debugger is GDB. */
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#undef DBX_CONTIN_LENGTH
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/* NetBSD does its profiling differently to the Acorn compiler. We
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don't need a word following the mcount call; and to skip it
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requires either an assembly stub or use of fomit-frame-pointer when
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compiling the profiling functions. Since we break Acorn CC
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compatibility below a little more won't hurt. */
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#undef ARM_FUNCTION_PROFILER
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#define ARM_FUNCTION_PROFILER(STREAM,LABELNO) \
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{ \
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asm_fprintf (STREAM, "\tmov\t%Rip, %Rlr\n"); \
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asm_fprintf (STREAM, "\tbl\t__mcount%s\n", \
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NEED_PLT_RELOC ? "(PLT)" : ""); \
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}
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/* VERY BIG NOTE: Change of structure alignment for NetBSD/arm.
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There are consequences you should be aware of...
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Normally GCC/arm uses a structure alignment of 32 for compatibility
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with armcc. This means that structures are padded to a word
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boundary. However this causes problems with bugged NetBSD kernel
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code (possibly userland code as well - I have not checked every
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binary). The nature of this bugged code is to rely on sizeof()
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returning the correct size of various structures rounded to the
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nearest byte (SCSI and ether code are two examples, the vm system
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is another). This code breaks when the structure alignment is 32
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as sizeof() will report a word=rounded size. By changing the
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structure alignment to 8. GCC will conform to what is expected by
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NetBSD.
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This has several side effects that should be considered.
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1. Structures will only be aligned to the size of the largest member.
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i.e. structures containing only bytes will be byte aligned.
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structures containing shorts will be half word alinged.
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structures containing ints will be word aligned.
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This means structures should be padded to a word boundary if
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alignment of 32 is required for byte structures etc.
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2. A potential performance penalty may exist if strings are no longer
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word aligned. GCC will not be able to use word load/stores to copy
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short strings.
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This modification is not encouraged but with the present state of the
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NetBSD source tree it is currently the only solution that meets the
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requirements. */
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#undef DEFAULT_STRUCTURE_SIZE_BOUNDARY
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#define DEFAULT_STRUCTURE_SIZE_BOUNDARY 8
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/* Emit code to set up a trampoline and synchronize the caches. */
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#undef INITIALIZE_TRAMPOLINE
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#define INITIALIZE_TRAMPOLINE(TRAMP, FNADDR, CXT) \
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do \
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{ \
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emit_move_insn (gen_rtx (MEM, SImode, plus_constant ((TRAMP), 8)), \
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(CXT)); \
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emit_move_insn (gen_rtx (MEM, SImode, plus_constant ((TRAMP), 12)), \
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(FNADDR)); \
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emit_library_call (gen_rtx_SYMBOL_REF (Pmode, "__clear_cache"), \
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0, VOIDmode, 2, TRAMP, Pmode, \
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plus_constant (TRAMP, TRAMPOLINE_SIZE), Pmode); \
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} \
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while (0)
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/* Clear the instruction cache from `BEG' to `END'. This makes a
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call to the ARM_SYNC_ICACHE architecture specific syscall. */
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#define CLEAR_INSN_CACHE(BEG, END) \
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do \
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{ \
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extern int sysarch(int number, void *args); \
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struct \
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{ \
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unsigned int addr; \
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int len; \
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} s; \
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s.addr = (unsigned int)(BEG); \
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s.len = (END) - (BEG); \
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(void) sysarch (0, &s); \
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} \
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while (0)
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