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x32: Add addr32 prefix to VSIB address
32-bit indices in VSIB address are sign-extended to 64 bits. In x32, when 32-bit indices are used as addresses, like in vgatherdps %ymm7, 0(,%ymm9,1), %ymm6 32-bit indices, 0xf7fa3010, is sign-extended to 0xfffffffff7fa3010 which is invalid address. Add addr32 prefix to UNSPEC_VSIBADDR instructions for x32 if there is no base register nor symbol. This fixes 175.vpr and 254.gap in SPEC CPU 2000 on x32 with -Ofast -funroll-loops -march=haswell gcc/ PR target/89523 * config/i386/i386.c (ix86_print_operand): Handle 'M' to add addr32 prefix to VSIB address for X32. * config/i386/sse.md (*avx512pf_gatherpf<mode>sf_mask): Prepend "%M2" to opcode. (*avx512pf_gatherpf<mode>df_mask): Likewise. (*avx512pf_scatterpf<mode>sf_mask): Likewise. (*avx512pf_scatterpf<mode>df_mask): Likewise. (*avx2_gathersi<mode>): Prepend "%M3" to opcode. (*avx2_gathersi<mode>_2): Prepend "%M2" to opcode. (*avx2_gatherdi<mode>): Prepend "%M3" to opcode. (*avx2_gatherdi<mode>_2): Prepend "%M2" to opcode. (*avx2_gatherdi<mode>_3): Prepend "%M3" to opcode. (*avx2_gatherdi<mode>_4): Prepend "%M2" to opcode.` (*avx512f_gathersi<mode>): Prepend "%M4" to opcode. (*avx512f_gathersi<mode>_2): Prepend "%M3" to opcode. (*avx512f_gatherdi<mode>): Prepend "%M4" to opcode. (*avx512f_gatherdi<mode>_2): Prepend "%M3" to opcode. (*avx512f_scattersi<mode>): Prepend "%M0" to opcode. (*avx512f_scatterdi<mode>): Likewise. gcc/testsuite/ PR target/89523 * gcc.target/i386/pr89523-1a.c: New test. * gcc.target/i386/pr89523-1b.c: Likewise. * gcc.target/i386/pr89523-2.c: Likewise. * gcc.target/i386/pr89523-3.c: Likewise. * gcc.target/i386/pr89523-4.c: Likewise. * gcc.target/i386/pr89523-5.c: Likewise. * gcc.target/i386/pr89523-6.c: Likewise. * gcc.target/i386/pr89523-7.c: Likewise. * gcc.target/i386/pr89523-8.c: Likewise. * gcc.target/i386/pr89523-9.c: Likewise. From-SVN: r269673
This commit is contained in:
H.J. Lu
H.J. Lu
parent
b2725ea5df
commit
fb055f4b74
@ -1,3 +1,26 @@
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2019-03-14 H.J. Lu <hongjiu.lu@intel.com>
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PR target/89523
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* config/i386/i386.c (ix86_print_operand): Handle 'M' to add
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addr32 prefix to VSIB address for X32.
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* config/i386/sse.md (*avx512pf_gatherpf<mode>sf_mask): Prepend
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"%M2" to opcode.
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(*avx512pf_gatherpf<mode>df_mask): Likewise.
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(*avx512pf_scatterpf<mode>sf_mask): Likewise.
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(*avx512pf_scatterpf<mode>df_mask): Likewise.
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(*avx2_gathersi<mode>): Prepend "%M3" to opcode.
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(*avx2_gathersi<mode>_2): Prepend "%M2" to opcode.
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(*avx2_gatherdi<mode>): Prepend "%M3" to opcode.
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(*avx2_gatherdi<mode>_2): Prepend "%M2" to opcode.
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(*avx2_gatherdi<mode>_3): Prepend "%M3" to opcode.
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(*avx2_gatherdi<mode>_4): Prepend "%M2" to opcode.`
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(*avx512f_gathersi<mode>): Prepend "%M4" to opcode.
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(*avx512f_gathersi<mode>_2): Prepend "%M3" to opcode.
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(*avx512f_gatherdi<mode>): Prepend "%M4" to opcode.
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(*avx512f_gatherdi<mode>_2): Prepend "%M3" to opcode.
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(*avx512f_scattersi<mode>): Prepend "%M0" to opcode.
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(*avx512f_scatterdi<mode>): Likewise.
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2019-03-13 Vladimir Makarov <vmakarov@redhat.com>
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PR target/85860
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@ -17813,6 +17813,7 @@ print_reg (rtx x, int code, FILE *file)
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; -- print a semicolon (after prefixes due to bug in older gas).
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~ -- print "i" if TARGET_AVX2, "f" otherwise.
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^ -- print addr32 prefix if TARGET_64BIT and Pmode != word_mode
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M -- print addr32 prefix for TARGET_X32 with VSIB address.
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! -- print NOTRACK prefix for jxx/call/ret instructions if required.
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*/
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@ -18360,6 +18361,26 @@ ix86_print_operand (FILE *file, rtx x, int code)
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putc (TARGET_AVX2 ? 'i' : 'f', file);
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return;
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case 'M':
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if (TARGET_X32)
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{
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/* NB: 32-bit indices in VSIB address are sign-extended
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to 64 bits. In x32, if 32-bit address 0xf7fa3010 is
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sign-extended to 0xfffffffff7fa3010 which is invalid
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address. Add addr32 prefix if there is no base
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register nor symbol. */
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bool ok;
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struct ix86_address parts;
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ok = ix86_decompose_address (x, &parts);
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gcc_assert (ok && parts.index == NULL_RTX);
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if (parts.base == NULL_RTX
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&& (parts.disp == NULL_RTX
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|| !symbolic_operand (parts.disp,
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GET_MODE (parts.disp))))
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fputs ("addr32 ", file);
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}
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return;
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case '^':
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if (TARGET_64BIT && Pmode != word_mode)
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fputs ("addr32 ", file);
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@ -17486,9 +17486,9 @@
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case 3:
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/* %X5 so that we don't emit any *WORD PTR for -masm=intel, as
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gas changed what it requires incompatibly. */
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return "vgatherpf0<ssemodesuffix>ps\t{%5%{%0%}|%X5%{%0%}}";
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return "%M2vgatherpf0<ssemodesuffix>ps\t{%5%{%0%}|%X5%{%0%}}";
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case 2:
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return "vgatherpf1<ssemodesuffix>ps\t{%5%{%0%}|%X5%{%0%}}";
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return "%M2vgatherpf1<ssemodesuffix>ps\t{%5%{%0%}|%X5%{%0%}}";
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default:
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gcc_unreachable ();
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}
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@ -17533,9 +17533,9 @@
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case 3:
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/* %X5 so that we don't emit any *WORD PTR for -masm=intel, as
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gas changed what it requires incompatibly. */
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return "vgatherpf0<ssemodesuffix>pd\t{%5%{%0%}|%X5%{%0%}}";
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return "%M2vgatherpf0<ssemodesuffix>pd\t{%5%{%0%}|%X5%{%0%}}";
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case 2:
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return "vgatherpf1<ssemodesuffix>pd\t{%5%{%0%}|%X5%{%0%}}";
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return "%M2vgatherpf1<ssemodesuffix>pd\t{%5%{%0%}|%X5%{%0%}}";
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default:
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gcc_unreachable ();
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}
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@ -17581,10 +17581,10 @@
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case 7:
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/* %X5 so that we don't emit any *WORD PTR for -masm=intel, as
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gas changed what it requires incompatibly. */
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return "vscatterpf0<ssemodesuffix>ps\t{%5%{%0%}|%X5%{%0%}}";
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return "%M2vscatterpf0<ssemodesuffix>ps\t{%5%{%0%}|%X5%{%0%}}";
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case 2:
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case 6:
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return "vscatterpf1<ssemodesuffix>ps\t{%5%{%0%}|%X5%{%0%}}";
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return "%M2vscatterpf1<ssemodesuffix>ps\t{%5%{%0%}|%X5%{%0%}}";
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default:
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gcc_unreachable ();
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}
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@ -17630,10 +17630,10 @@
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case 7:
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/* %X5 so that we don't emit any *WORD PTR for -masm=intel, as
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gas changed what it requires incompatibly. */
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return "vscatterpf0<ssemodesuffix>pd\t{%5%{%0%}|%X5%{%0%}}";
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return "%M2vscatterpf0<ssemodesuffix>pd\t{%5%{%0%}|%X5%{%0%}}";
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case 2:
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case 6:
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return "vscatterpf1<ssemodesuffix>pd\t{%5%{%0%}|%X5%{%0%}}";
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return "%M2vscatterpf1<ssemodesuffix>pd\t{%5%{%0%}|%X5%{%0%}}";
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default:
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gcc_unreachable ();
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}
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@ -20377,7 +20377,7 @@
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UNSPEC_GATHER))
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(clobber (match_scratch:VEC_GATHER_MODE 1 "=&x"))]
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"TARGET_AVX2"
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"v<sseintprefix>gatherd<ssemodesuffix>\t{%1, %7, %0|%0, %7, %1}"
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"%M3v<sseintprefix>gatherd<ssemodesuffix>\t{%1, %7, %0|%0, %7, %1}"
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[(set_attr "type" "ssemov")
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(set_attr "prefix" "vex")
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(set_attr "mode" "<sseinsnmode>")])
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@ -20397,7 +20397,7 @@
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UNSPEC_GATHER))
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(clobber (match_scratch:VEC_GATHER_MODE 1 "=&x"))]
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"TARGET_AVX2"
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"v<sseintprefix>gatherd<ssemodesuffix>\t{%1, %6, %0|%0, %6, %1}"
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"%M2v<sseintprefix>gatherd<ssemodesuffix>\t{%1, %6, %0|%0, %6, %1}"
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[(set_attr "type" "ssemov")
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(set_attr "prefix" "vex")
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(set_attr "mode" "<sseinsnmode>")])
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@ -20438,7 +20438,7 @@
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UNSPEC_GATHER))
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(clobber (match_scratch:VEC_GATHER_MODE 1 "=&x"))]
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"TARGET_AVX2"
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"v<sseintprefix>gatherq<ssemodesuffix>\t{%5, %7, %2|%2, %7, %5}"
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"%M3v<sseintprefix>gatherq<ssemodesuffix>\t{%5, %7, %2|%2, %7, %5}"
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[(set_attr "type" "ssemov")
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(set_attr "prefix" "vex")
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(set_attr "mode" "<sseinsnmode>")])
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@ -20460,8 +20460,8 @@
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"TARGET_AVX2"
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{
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if (<MODE>mode != <VEC_GATHER_SRCDI>mode)
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return "v<sseintprefix>gatherq<ssemodesuffix>\t{%4, %6, %x0|%x0, %6, %4}";
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return "v<sseintprefix>gatherq<ssemodesuffix>\t{%4, %6, %0|%0, %6, %4}";
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return "%M2v<sseintprefix>gatherq<ssemodesuffix>\t{%4, %6, %x0|%x0, %6, %4}";
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return "%M2v<sseintprefix>gatherq<ssemodesuffix>\t{%4, %6, %0|%0, %6, %4}";
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}
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[(set_attr "type" "ssemov")
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(set_attr "prefix" "vex")
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@ -20485,7 +20485,7 @@
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(const_int 2) (const_int 3)])))
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(clobber (match_scratch:VI4F_256 1 "=&x"))]
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"TARGET_AVX2"
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"v<sseintprefix>gatherq<ssemodesuffix>\t{%5, %7, %0|%0, %7, %5}"
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"%M3v<sseintprefix>gatherq<ssemodesuffix>\t{%5, %7, %0|%0, %7, %5}"
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[(set_attr "type" "ssemov")
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(set_attr "prefix" "vex")
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(set_attr "mode" "<sseinsnmode>")])
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@ -20508,7 +20508,7 @@
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(const_int 2) (const_int 3)])))
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(clobber (match_scratch:VI4F_256 1 "=&x"))]
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"TARGET_AVX2"
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"v<sseintprefix>gatherq<ssemodesuffix>\t{%4, %6, %0|%0, %6, %4}"
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"%M2v<sseintprefix>gatherq<ssemodesuffix>\t{%4, %6, %0|%0, %6, %4}"
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[(set_attr "type" "ssemov")
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(set_attr "prefix" "vex")
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(set_attr "mode" "<sseinsnmode>")])
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@ -20548,7 +20548,7 @@
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"TARGET_AVX512F"
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;; %X6 so that we don't emit any *WORD PTR for -masm=intel, as
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;; gas changed what it requires incompatibly.
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"v<sseintprefix>gatherd<ssemodesuffix>\t{%6, %0%{%2%}|%0%{%2%}, %X6}"
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"%M4v<sseintprefix>gatherd<ssemodesuffix>\t{%6, %0%{%2%}|%0%{%2%}, %X6}"
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[(set_attr "type" "ssemov")
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(set_attr "prefix" "evex")
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(set_attr "mode" "<sseinsnmode>")])
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@ -20569,7 +20569,7 @@
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"TARGET_AVX512F"
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;; %X5 so that we don't emit any *WORD PTR for -masm=intel, as
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;; gas changed what it requires incompatibly.
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"v<sseintprefix>gatherd<ssemodesuffix>\t{%5, %0%{%1%}|%0%{%1%}, %X5}"
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"%M3v<sseintprefix>gatherd<ssemodesuffix>\t{%5, %0%{%1%}|%0%{%1%}, %X5}"
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[(set_attr "type" "ssemov")
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(set_attr "prefix" "evex")
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(set_attr "mode" "<sseinsnmode>")])
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@ -20610,7 +20610,7 @@
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"TARGET_AVX512F"
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;; %X6 so that we don't emit any *WORD PTR for -masm=intel, as
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;; gas changed what it requires incompatibly.
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"v<sseintprefix>gatherq<ssemodesuffix>\t{%6, %1%{%2%}|%1%{%2%}, %X6}"
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"%M4v<sseintprefix>gatherq<ssemodesuffix>\t{%6, %1%{%2%}|%1%{%2%}, %X6}"
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[(set_attr "type" "ssemov")
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(set_attr "prefix" "evex")
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(set_attr "mode" "<sseinsnmode>")])
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@ -20635,11 +20635,11 @@
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if (<MODE>mode != <VEC_GATHER_SRCDI>mode)
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{
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if (<MODE_SIZE> != 64)
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return "v<sseintprefix>gatherq<ssemodesuffix>\t{%5, %x0%{%1%}|%x0%{%1%}, %X5}";
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return "%M3v<sseintprefix>gatherq<ssemodesuffix>\t{%5, %x0%{%1%}|%x0%{%1%}, %X5}";
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else
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return "v<sseintprefix>gatherq<ssemodesuffix>\t{%5, %t0%{%1%}|%t0%{%1%}, %X5}";
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return "%M3v<sseintprefix>gatherq<ssemodesuffix>\t{%5, %t0%{%1%}|%t0%{%1%}, %X5}";
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}
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return "v<sseintprefix>gatherq<ssemodesuffix>\t{%5, %0%{%1%}|%0%{%1%}, %X5}";
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return "%M3v<sseintprefix>gatherq<ssemodesuffix>\t{%5, %0%{%1%}|%0%{%1%}, %X5}";
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}
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[(set_attr "type" "ssemov")
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(set_attr "prefix" "evex")
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@ -20678,7 +20678,7 @@
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"TARGET_AVX512F"
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;; %X5 so that we don't emit any *WORD PTR for -masm=intel, as
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;; gas changed what it requires incompatibly.
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"v<sseintprefix>scatterd<ssemodesuffix>\t{%3, %5%{%1%}|%X5%{%1%}, %3}"
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"%M0v<sseintprefix>scatterd<ssemodesuffix>\t{%3, %5%{%1%}|%X5%{%1%}, %3}"
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[(set_attr "type" "ssemov")
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(set_attr "prefix" "evex")
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(set_attr "mode" "<sseinsnmode>")])
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@ -20716,7 +20716,7 @@
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"TARGET_AVX512F"
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;; %X5 so that we don't emit any *WORD PTR for -masm=intel, as
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;; gas changed what it requires incompatibly.
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"v<sseintprefix>scatterq<ssemodesuffix>\t{%3, %5%{%1%}|%X5%{%1%}, %3}"
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"%M0v<sseintprefix>scatterq<ssemodesuffix>\t{%3, %5%{%1%}|%X5%{%1%}, %3}"
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[(set_attr "type" "ssemov")
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(set_attr "prefix" "evex")
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(set_attr "mode" "<sseinsnmode>")])
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@ -1,3 +1,17 @@
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2019-03-14 H.J. Lu <hongjiu.lu@intel.com>
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PR target/89523
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* gcc.target/i386/pr89523-1a.c: New test.
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* gcc.target/i386/pr89523-1b.c: Likewise.
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* gcc.target/i386/pr89523-2.c: Likewise.
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* gcc.target/i386/pr89523-3.c: Likewise.
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* gcc.target/i386/pr89523-4.c: Likewise.
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* gcc.target/i386/pr89523-5.c: Likewise.
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* gcc.target/i386/pr89523-6.c: Likewise.
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* gcc.target/i386/pr89523-7.c: Likewise.
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* gcc.target/i386/pr89523-8.c: Likewise.
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* gcc.target/i386/pr89523-9.c: Likewise.
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2019-03-14 Jakub Jelinek <jakub@redhat.com>
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PR c++/89512
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24
gcc/testsuite/gcc.target/i386/pr89523-1a.c
Normal file
24
gcc/testsuite/gcc.target/i386/pr89523-1a.c
Normal file
@ -0,0 +1,24 @@
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/* { dg-do compile { target { ! ia32 } } } */
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/* { dg-require-effective-target maybe_x32 } */
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/* { dg-options "-maddress-mode=short -mx32 -Ofast -funroll-loops -march=haswell" } */
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/* { dg-final { scan-assembler-not "\tvgather" } } */
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/* { dg-final { scan-assembler "addr32 vgather" } } */
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void foo (void);
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extern float *ncost;
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float
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bar (int type, int num)
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{
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int i;
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float cost;
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cost = 0;
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for (i = 0; i < num; i++)
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if (type)
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cost += ncost[i];
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else
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foo ();
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return (cost);
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}
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7
gcc/testsuite/gcc.target/i386/pr89523-1b.c
Normal file
7
gcc/testsuite/gcc.target/i386/pr89523-1b.c
Normal file
@ -0,0 +1,7 @@
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/* { dg-do compile { target { ! ia32 } } } */
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/* { dg-require-effective-target maybe_x32 } */
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/* { dg-options "-maddress-mode=long -mx32 -Ofast -funroll-loops -march=haswell" } */
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/* { dg-final { scan-assembler-not "\tvgather" } } */
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/* { dg-final { scan-assembler "addr32 vgather" } } */
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#include "pr89523-1a.c"
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37
gcc/testsuite/gcc.target/i386/pr89523-2.c
Normal file
37
gcc/testsuite/gcc.target/i386/pr89523-2.c
Normal file
@ -0,0 +1,37 @@
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/* { dg-do compile { target { ! ia32 } } } */
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/* { dg-require-effective-target maybe_x32 } */
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/* { dg-options "-mx32 -O2 -march=haswell" } */
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/* { dg-final { scan-assembler "\tvgather" } } */
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/* { dg-final { scan-assembler-not "addr32 vgather" } } */
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typedef double __v2df __attribute__ ((__vector_size__ (16)));
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typedef int __v4si __attribute__ ((__vector_size__ (16)));
|
||||
typedef long long __v2di __attribute__ ((__vector_size__ (16)));
|
||||
|
||||
typedef long long __m128i __attribute__ ((__vector_size__ (16), __may_alias__));
|
||||
typedef double __m128d __attribute__ ((__vector_size__ (16), __may_alias__));
|
||||
|
||||
extern __inline __m128d
|
||||
__attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
|
||||
_mm_i32gather_pd (double const *__base, __m128i __index, const int __scale)
|
||||
{
|
||||
__v2df __zero = { 0.0, 0.0 };
|
||||
__v2df __mask = __builtin_ia32_cmpeqpd (__zero, __zero);
|
||||
__v2df x = x;
|
||||
|
||||
return (__m128d) __builtin_ia32_gathersiv2df (x,
|
||||
__base,
|
||||
(__v4si)__index,
|
||||
__mask,
|
||||
__scale);
|
||||
}
|
||||
|
||||
__m128d x;
|
||||
double *base;
|
||||
__m128i idx;
|
||||
|
||||
void extern
|
||||
avx2_test (void)
|
||||
{
|
||||
x = _mm_i32gather_pd (base, idx, 1);
|
||||
}
|
||||
36
gcc/testsuite/gcc.target/i386/pr89523-3.c
Normal file
36
gcc/testsuite/gcc.target/i386/pr89523-3.c
Normal file
@ -0,0 +1,36 @@
|
||||
/* { dg-do compile { target { ! ia32 } } } */
|
||||
/* { dg-require-effective-target maybe_x32 } */
|
||||
/* { dg-options "-mx32 -O2 -march=haswell" } */
|
||||
/* { dg-final { scan-assembler "\tvgather" } } */
|
||||
/* { dg-final { scan-assembler-not "addr32 vgather" } } */
|
||||
|
||||
typedef double __v2df __attribute__ ((__vector_size__ (16)));
|
||||
typedef int __v4si __attribute__ ((__vector_size__ (16)));
|
||||
typedef long long __v2di __attribute__ ((__vector_size__ (16)));
|
||||
|
||||
typedef long long __m128i __attribute__ ((__vector_size__ (16), __may_alias__));
|
||||
typedef double __m128d __attribute__ ((__vector_size__ (16), __may_alias__));
|
||||
|
||||
extern __inline __m128d
|
||||
__attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
|
||||
_mm_i64gather_pd (double const *__base, __m128i __index, const int __scale)
|
||||
{
|
||||
__v2df __zero = { 0.0, 0.0 };
|
||||
__v2df __mask = __builtin_ia32_cmpeqpd (__zero, __zero);
|
||||
|
||||
return (__m128d) __builtin_ia32_gatherdiv2df (__zero,
|
||||
__base,
|
||||
(__v2di)__index,
|
||||
__mask,
|
||||
__scale);
|
||||
}
|
||||
|
||||
__m128d x;
|
||||
double *base;
|
||||
__m128i idx;
|
||||
|
||||
void extern
|
||||
avx2_test (void)
|
||||
{
|
||||
x = _mm_i64gather_pd (base, idx, 1);
|
||||
}
|
||||
36
gcc/testsuite/gcc.target/i386/pr89523-4.c
Normal file
36
gcc/testsuite/gcc.target/i386/pr89523-4.c
Normal file
@ -0,0 +1,36 @@
|
||||
/* { dg-do compile { target { ! ia32 } } } */
|
||||
/* { dg-require-effective-target maybe_x32 } */
|
||||
/* { dg-options "-mx32 -O2 -march=haswell" } */
|
||||
/* { dg-final { scan-assembler-not "\tvgather" } } */
|
||||
/* { dg-final { scan-assembler "addr32 vgather" } } */
|
||||
|
||||
typedef double __v2df __attribute__ ((__vector_size__ (16)));
|
||||
typedef int __v4si __attribute__ ((__vector_size__ (16)));
|
||||
typedef long long __v2di __attribute__ ((__vector_size__ (16)));
|
||||
|
||||
typedef long long __m128i __attribute__ ((__vector_size__ (16), __may_alias__));
|
||||
typedef double __m128d __attribute__ ((__vector_size__ (16), __may_alias__));
|
||||
|
||||
extern __inline __m128d
|
||||
__attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
|
||||
_mm_i32gather_pd (double const *__base, __m128i __index, const int __scale)
|
||||
{
|
||||
__v2df __zero = { 0.0, 0.0 };
|
||||
__v2df __mask = __builtin_ia32_cmpeqpd (__zero, __zero);
|
||||
__v2df x = x;
|
||||
|
||||
return (__m128d) __builtin_ia32_gathersiv2df (x,
|
||||
__base,
|
||||
(__v4si)__index,
|
||||
__mask,
|
||||
__scale);
|
||||
}
|
||||
|
||||
__m128d x;
|
||||
__m128i idx;
|
||||
|
||||
void extern
|
||||
avx2_test (void)
|
||||
{
|
||||
x = _mm_i32gather_pd ((void *) 0, idx, 1);
|
||||
}
|
||||
39
gcc/testsuite/gcc.target/i386/pr89523-5.c
Normal file
39
gcc/testsuite/gcc.target/i386/pr89523-5.c
Normal file
@ -0,0 +1,39 @@
|
||||
/* { dg-do compile { target { ! ia32 } } } */
|
||||
/* { dg-require-effective-target maybe_x32 } */
|
||||
/* { dg-options "-mx32 -O2 -mavx512pf" } */
|
||||
/* { dg-final { scan-assembler "\tvgather" } } */
|
||||
/* { dg-final { scan-assembler-not "addr32 vgather" } } */
|
||||
|
||||
typedef int __v8si __attribute__ ((__vector_size__ (32)));
|
||||
typedef long long __m256i __attribute__ ((__vector_size__ (32),
|
||||
__may_alias__));
|
||||
typedef unsigned char __mmask8;
|
||||
|
||||
extern __inline void
|
||||
__attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
|
||||
_mm512_prefetch_i32gather_pd (__m256i __index, void const *__addr,
|
||||
int __scale, int __hint)
|
||||
{
|
||||
__builtin_ia32_gatherpfdpd ((__mmask8) 0xFF, (__v8si) __index, __addr,
|
||||
__scale, __hint);
|
||||
}
|
||||
|
||||
extern __inline void
|
||||
__attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
|
||||
_mm512_mask_prefetch_i32gather_pd (__m256i __index, __mmask8 __mask,
|
||||
void const *__addr, int __scale, int __hint)
|
||||
{
|
||||
__builtin_ia32_gatherpfdpd (__mask, (__v8si) __index, __addr, __scale,
|
||||
__hint);
|
||||
}
|
||||
|
||||
volatile __m256i idx;
|
||||
volatile __mmask8 m8;
|
||||
void *base;
|
||||
|
||||
void extern
|
||||
avx512pf_test (void)
|
||||
{
|
||||
_mm512_prefetch_i32gather_pd (idx, base, 8, 3);
|
||||
_mm512_mask_prefetch_i32gather_pd (idx, m8, base, 8, 3);
|
||||
}
|
||||
38
gcc/testsuite/gcc.target/i386/pr89523-6.c
Normal file
38
gcc/testsuite/gcc.target/i386/pr89523-6.c
Normal file
@ -0,0 +1,38 @@
|
||||
/* { dg-do compile { target { ! ia32 } } } */
|
||||
/* { dg-require-effective-target maybe_x32 } */
|
||||
/* { dg-options "-mx32 -O2 -mavx512pf" } */
|
||||
/* { dg-final { scan-assembler-not "\tvgather" } } */
|
||||
/* { dg-final { scan-assembler "addr32 vgather" } } */
|
||||
|
||||
typedef int __v8si __attribute__ ((__vector_size__ (32)));
|
||||
typedef long long __m256i __attribute__ ((__vector_size__ (32),
|
||||
__may_alias__));
|
||||
typedef unsigned char __mmask8;
|
||||
|
||||
extern __inline void
|
||||
__attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
|
||||
_mm512_prefetch_i32gather_pd (__m256i __index, void const *__addr,
|
||||
int __scale, int __hint)
|
||||
{
|
||||
__builtin_ia32_gatherpfdpd ((__mmask8) 0xFF, (__v8si) __index, __addr,
|
||||
__scale, __hint);
|
||||
}
|
||||
|
||||
extern __inline void
|
||||
__attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
|
||||
_mm512_mask_prefetch_i32gather_pd (__m256i __index, __mmask8 __mask,
|
||||
void const *__addr, int __scale, int __hint)
|
||||
{
|
||||
__builtin_ia32_gatherpfdpd (__mask, (__v8si) __index, __addr, __scale,
|
||||
__hint);
|
||||
}
|
||||
|
||||
volatile __m256i idx;
|
||||
volatile __mmask8 m8;
|
||||
|
||||
void extern
|
||||
avx512pf_test (void)
|
||||
{
|
||||
_mm512_prefetch_i32gather_pd (idx, (void *) 0, 8, 3);
|
||||
_mm512_mask_prefetch_i32gather_pd (idx, m8, (void *) 0, 8, 3);
|
||||
}
|
||||
42
gcc/testsuite/gcc.target/i386/pr89523-7.c
Normal file
42
gcc/testsuite/gcc.target/i386/pr89523-7.c
Normal file
@ -0,0 +1,42 @@
|
||||
/* { dg-do compile { target { ! ia32 } } } */
|
||||
/* { dg-require-effective-target maybe_x32 } */
|
||||
/* { dg-options "-mx32 -O2 -mavx512f" } */
|
||||
/* { dg-final { scan-assembler "\tvscatter" } } */
|
||||
/* { dg-final { scan-assembler-not "addr32 vscatter" } } */
|
||||
|
||||
typedef int __v8si __attribute__ ((__vector_size__ (32)));
|
||||
typedef double __v8df __attribute__ ((__vector_size__ (64)));
|
||||
typedef long long __m256i __attribute__ ((__vector_size__ (32),
|
||||
__may_alias__));
|
||||
typedef double __m512d __attribute__ ((__vector_size__ (64), __may_alias__));
|
||||
typedef unsigned char __mmask8;
|
||||
|
||||
extern __inline void
|
||||
__attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
|
||||
_mm512_i32scatter_pd (void *__addr, __m256i __index, __m512d __v1,
|
||||
int __scale)
|
||||
{
|
||||
__builtin_ia32_scattersiv8df (__addr, (__mmask8) 0xFF,
|
||||
(__v8si) __index, (__v8df) __v1, __scale);
|
||||
}
|
||||
|
||||
extern __inline void
|
||||
__attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
|
||||
_mm512_mask_i32scatter_pd (void *__addr, __mmask8 __mask,
|
||||
__m256i __index, __m512d __v1, int __scale)
|
||||
{
|
||||
__builtin_ia32_scattersiv8df (__addr, __mask, (__v8si) __index,
|
||||
(__v8df) __v1, __scale);
|
||||
}
|
||||
|
||||
volatile __m512d src;
|
||||
volatile __m256i idx;
|
||||
volatile __mmask8 m8;
|
||||
double *addr;
|
||||
|
||||
void extern
|
||||
avx512f_test (void)
|
||||
{
|
||||
_mm512_i32scatter_pd (addr, idx, src, 8);
|
||||
_mm512_mask_i32scatter_pd (addr, m8, idx, src, 8);
|
||||
}
|
||||
41
gcc/testsuite/gcc.target/i386/pr89523-8.c
Normal file
41
gcc/testsuite/gcc.target/i386/pr89523-8.c
Normal file
@ -0,0 +1,41 @@
|
||||
/* { dg-do compile { target { ! ia32 } } } */
|
||||
/* { dg-require-effective-target maybe_x32 } */
|
||||
/* { dg-options "-mx32 -O2 -mavx512f" } */
|
||||
/* { dg-final { scan-assembler "\tvscatter" } } */
|
||||
/* { dg-final { scan-assembler-not "addr32 vscatter" } } */
|
||||
|
||||
typedef long long __v8di __attribute__ ((__vector_size__ (64)));
|
||||
typedef double __v8df __attribute__ ((__vector_size__ (64)));
|
||||
typedef long long __m512i __attribute__ ((__vector_size__ (64), __may_alias__));
|
||||
typedef double __m512d __attribute__ ((__vector_size__ (64), __may_alias__));
|
||||
typedef unsigned char __mmask8;
|
||||
|
||||
extern __inline void
|
||||
__attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
|
||||
_mm512_i64scatter_pd (void *__addr, __m512i __index, __m512d __v1,
|
||||
int __scale)
|
||||
{
|
||||
__builtin_ia32_scatterdiv8df (__addr, (__mmask8) 0xFF,
|
||||
(__v8di) __index, (__v8df) __v1, __scale);
|
||||
}
|
||||
|
||||
extern __inline void
|
||||
__attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
|
||||
_mm512_mask_i64scatter_pd (void *__addr, __mmask8 __mask,
|
||||
__m512i __index, __m512d __v1, int __scale)
|
||||
{
|
||||
__builtin_ia32_scatterdiv8df (__addr, __mask, (__v8di) __index,
|
||||
(__v8df) __v1, __scale);
|
||||
}
|
||||
|
||||
volatile __m512d src;
|
||||
volatile __m512i idx;
|
||||
volatile __mmask8 m8;
|
||||
double *addr;
|
||||
|
||||
void extern
|
||||
avx512f_test (void)
|
||||
{
|
||||
_mm512_i64scatter_pd (addr, idx, src, 8);
|
||||
_mm512_mask_i64scatter_pd (addr, m8, idx, src, 8);
|
||||
}
|
||||
30
gcc/testsuite/gcc.target/i386/pr89523-9.c
Normal file
30
gcc/testsuite/gcc.target/i386/pr89523-9.c
Normal file
@ -0,0 +1,30 @@
|
||||
/* { dg-do compile { target { ! ia32 } } } */
|
||||
/* { dg-require-effective-target maybe_x32 } */
|
||||
/* { dg-options "-mx32 -O2 -mavx512f" } */
|
||||
/* { dg-final { scan-assembler-not "\tvscatter" } } */
|
||||
/* { dg-final { scan-assembler "addr32 vscatter" } } */
|
||||
|
||||
typedef int __v8si __attribute__ ((__vector_size__ (32)));
|
||||
typedef double __v8df __attribute__ ((__vector_size__ (64)));
|
||||
typedef long long __m256i __attribute__ ((__vector_size__ (32),
|
||||
__may_alias__));
|
||||
typedef double __m512d __attribute__ ((__vector_size__ (64), __may_alias__));
|
||||
typedef unsigned char __mmask8;
|
||||
|
||||
extern __inline void
|
||||
__attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
|
||||
_mm512_i32scatter_pd (void *__addr, __m256i __index, __m512d __v1,
|
||||
int __scale)
|
||||
{
|
||||
__builtin_ia32_scattersiv8df (__addr, (__mmask8) 0xFF,
|
||||
(__v8si) __index, (__v8df) __v1, __scale);
|
||||
}
|
||||
|
||||
volatile __m512d src;
|
||||
volatile __m256i idx;
|
||||
|
||||
void extern
|
||||
avx512f_test (void)
|
||||
{
|
||||
_mm512_i32scatter_pd ((void *) 0, idx, src, 8);
|
||||
}
|
||||
Loading…
x
Reference in New Issue
Block a user