diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index f3b0f65a4dc..6c638398241 100644
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,6 +1,16 @@
+2001-01-15  Richard Earnshaw  <rearnsha@arm.com>
+
+	* config/arm/semi.h (SUBTARGET_EXTRA_SPECS): Define.
+	(SUBTARGET_EXTRA_ASM_SPEC): Define to empty string.
+	(ASM_SPEC): Call subtarget_extra_asm_spec.
+	* config/arm/elf.h (SUBTARGET_EXTRA_SPECS): Define.
+	(SUBTARGET_EXTRA_ASM_SPEC): Define to empty string.
+	(ASM_SPEC): Call subtarget_extra_asm_spec.
+
 2001-01-15  Andreas Jaeger  <aj@suse.de>
 
-	* config/i386/i386.c (ix86_init_builtins): Make i size_t to remove warnings.
+	* config/i386/i386.c (ix86_init_builtins): Make i size_t to remove 
+	warnings.
 	(ix86_expand_builtin): Likewise.
 
 	* gencodes.c (output_predicate_decls): Make i size_t to avoid
diff --git a/gcc/config/arm/elf.h b/gcc/config/arm/elf.h
index 355d40e784e..32770443494 100644
--- a/gcc/config/arm/elf.h
+++ b/gcc/config/arm/elf.h
@@ -1,6 +1,6 @@
 /* Definitions of target machine for GNU compiler.
    For ARM with ELF obj format.
-   Copyright (C) 1995, 1996, 1997, 1998, 1999, 2000
+   Copyright (C) 1995, 1996, 1997, 1998, 1999, 2000, 2001
    Free Software Foundation, Inc.
    Contributed by Philip Blundell <philb@gnu.org> and
    Catherine Moore <clm@cygnus.com>
@@ -37,8 +37,13 @@ Boston, MA 02111-1307, USA.  */
 #define SUBTARGET_CPP_SPEC  "-D__ELF__"
 #endif
 
+#ifndef SUBTARGET_EXTRA_SPECS
+#define SUBTARGET_EXTRA_SPECS \
+  { "subtarget_extra_asm_spec",	SUBTARGET_EXTRA_ASM_SPEC },
+#endif
+
 #ifndef SUBTARGET_EXTRA_ASM_SPEC
-#define SUBTARGET_EXTRA_ASM_SPEC
+#define SUBTARGET_EXTRA_ASM_SPEC ""
 #endif
 
 #ifndef ASM_SPEC
@@ -50,7 +55,7 @@ Boston, MA 02111-1307, USA.  */
 %{mapcs-float:-mfloat} \
 %{msoft-float:-mno-fpu} \
 %{mthumb-interwork:-mthumb-interwork} \
-" SUBTARGET_EXTRA_ASM_SPEC
+%(subtarget_extra_asm_spec)"
 #endif
 
 /* The following macro defines the format used to output the second
diff --git a/gcc/config/arm/semi.h b/gcc/config/arm/semi.h
index d258944b477..3e7d76b5761 100644
--- a/gcc/config/arm/semi.h
+++ b/gcc/config/arm/semi.h
@@ -35,8 +35,13 @@ Boston, MA 02111-1307, USA.  */
 #define TARGET_DEFAULT (ARM_FLAG_APCS_32 | ARM_FLAG_APCS_FRAME)
 #endif
 
+#ifndef SUBTARGET_EXTRA_SPECS
+#define SUBTARGET_EXTRA_SPECS \
+  { "subtarget_extra_asm_spec",	SUBTARGET_EXTRA_ASM_SPEC },
+#endif
+
 #ifndef SUBTARGET_EXTRA_ASM_SPEC
-#define SUBTARGET_EXTRA_ASM_SPEC
+#define SUBTARGET_EXTRA_ASM_SPEC ""
 #endif
 
 /* The compiler supports PIC code generation, even though the binutils
@@ -52,11 +57,10 @@ Boston, MA 02111-1307, USA.  */
 %{mbig-endian:-EB} \
 %{mcpu=*:-m%*} \
 %{march=*:-m%*} \
-%{mapcs-*:-mapcs-%*} \
 %{mapcs-float:-mfloat} \
 %{msoft-float:-mno-fpu} \
 %{mthumb-interwork:-mthumb-interwork} \
-" SUBTARGET_EXTRA_ASM_SPEC
+%(subtarget_extra_asm_spec)"
 #endif
 
 #include "arm/aout.h"