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libatomic: Improve cpuid usage in __libat_feat1_init

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Check the result of __get_cpuid and process FEAT1_REGISTER only when
__get_cpuid returns success.  Use __cpuid instead of nested __get_cpuid.

libatomic/ChangeLog:

	* config/x86/init.c (__libat_feat1_init): Check the result of
	__get_cpuid and process FEAT1_REGISTER only when __get_cpuid
	returns success.  Use __cpuid instead of nested __get_cpuid.
This commit is contained in:
Uros Bizjak 2024-07-18 16:58:09 +02:00
parent 1e60a6abfe
commit f7d01e080a
1 changed files with 15 additions and 13 deletions
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28
libatomic/config/x86/init.c
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@ -33,21 +33,23 @@ __libat_feat1_init (void)
{
unsigned int eax, ebx, ecx, edx;
FEAT1_REGISTER = 0;
__get_cpuid (1, &eax, &ebx, &ecx, &edx);
#ifdef __x86_64__
if ((FEAT1_REGISTER & (bit_AVX | bit_CMPXCHG16B))
== (bit_AVX | bit_CMPXCHG16B))
if (__get_cpuid (1, &eax, &ebx, &ecx, &edx))
{
/* Intel SDM guarantees that 16-byte VMOVDQA on 16-byte aligned address
is atomic, and AMD is going to do something similar soon.
We don't have a guarantee from vendors of other CPUs with AVX,
like Zhaoxin and VIA. */
unsigned int ecx2 = 0;
__get_cpuid (0, &eax, &ebx, &ecx2, &edx);
if (ecx2 != signature_INTEL_ecx && ecx2 != signature_AMD_ecx)
FEAT1_REGISTER &= ~bit_AVX;
}
#ifdef __x86_64__
if ((FEAT1_REGISTER & (bit_AVX | bit_CMPXCHG16B))
== (bit_AVX | bit_CMPXCHG16B))
{
/* Intel SDM guarantees that 16-byte VMOVDQA on 16-byte aligned
address is atomic, and AMD is going to do something similar soon.
We don't have a guarantee from vendors of other CPUs with AVX,
like Zhaoxin and VIA. */
unsigned int ecx2;
__cpuid (0, eax, ebx, ecx2, edx);
if (ecx2 != signature_INTEL_ecx && ecx2 != signature_AMD_ecx)
FEAT1_REGISTER &= ~bit_AVX;
}
#endif
}
/* See the load in load_feat1. */
__atomic_store_n (&__libat_feat1, FEAT1_REGISTER, __ATOMIC_RELAXED);
return FEAT1_REGISTER;