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re PR target/24861 (internal compiler error when building gcc with --with-cpu=ep9312 --with-fpu=maverick)

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PR target/24861
	* arm.md (split for movsf with immediate): Restrict split to insns
	that set a general register.

From-SVN: r107104
This commit is contained in:
Richard Earnshaw 2005-11-16 22:14:38 +00:00 committed by Richard Earnshaw
parent 60aef23e38
commit f7657ed3d6
2 changed files with 9 additions and 2 deletions
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6
gcc/ChangeLog
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@ -1,3 +1,9 @@
2005-11-16 Richard Earnshaw <richard.earnshaw@arm.com>
PR target/24861
* arm.md (split for movsf with immediate): Restrict split to insns
that set a general register.
2005-11-16 Daniel Jacobowitz <dan@codesourcery.com>
* config/ia64/unwind-ia64.c (uw_advance_context): New. Call

5
gcc/config/arm/arm.md
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@ -5137,11 +5137,12 @@
"
)
;; Transform a floating-point move of a constant into a core register into
;; an SImode operation.
(define_split
[(set (match_operand:SF 0 "nonimmediate_operand" "")
[(set (match_operand:SF 0 "arm_general_register_operand" "")
(match_operand:SF 1 "immediate_operand" ""))]
"TARGET_ARM
&& !(TARGET_HARD_FLOAT && TARGET_FPA)
&& reload_completed
&& GET_CODE (operands[1]) == CONST_DOUBLE"
[(set (match_dup 2) (match_dup 3))]