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1750a.h (datalbl, jmplbl): Declare array size explicitly.

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* 1750a.h (datalbl, jmplbl): Declare array size explicitly.
	* a29k.h (a29k_debug_reg_map): Likewise.
	* arc.h (arc_regno_reg_class): Likewise.
	* c4x-protos.h (c4x_regclass_map, c4x_caller_save_map): Likewise.
	* convex.h (regno_reg_class, reg_class_from_letter): Likewise.
	* d30v.h (regno_reg_class, reg_class_from_letter): Likewise.
	* i386.h (regclass_map): Likewise.
	* m32r.h (m32r_hard_regno_mode_ok, m32r_punct_chars): Likewise.
	* mcore.h (regno_reg_class): Likewise.
	* mips.h (mips_print_operand_punct, mips_char_to_class):
	Likewise.
	* ns32k.h (regclass_map): Likewise.
	* pj.h (pj_debugreg_renumber_vec): Likewise.
	* s390.h (regclass_map): Likewise.
	* sh.h (regno_reg_class): Likewise.
	* sparc.h (sparc_regno_reg_class): Likewise.

	* hard-reg-set.h (reg_class_contents): Likewise.
	* machmode.h (class_narrowest_mode): Likewise.

f:
	* bld.c (ffebld_arity_op_): Declare array size explicitly.
	* bld.h (ffebld_arity_op_): Likewise.

From-SVN: r48281
This commit is contained in:
Kaveh R. Ghazi 2001-12-23 04:59:13 +00:00 committed by Kaveh Ghazi
parent d5e0243aac
commit f540a7d371
21 changed files with 53 additions and 26 deletions
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22
gcc/ChangeLog
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@ -1,3 +1,25 @@
2001-12-22 Kaveh R. Ghazi <ghazi@caip.rutgers.edu>
* 1750a.h (datalbl, jmplbl): Declare array size explicitly.
* a29k.h (a29k_debug_reg_map): Likewise.
* arc.h (arc_regno_reg_class): Likewise.
* c4x-protos.h (c4x_regclass_map, c4x_caller_save_map): Likewise.
* convex.h (regno_reg_class, reg_class_from_letter): Likewise.
* d30v.h (regno_reg_class, reg_class_from_letter): Likewise.
* i386.h (regclass_map): Likewise.
* m32r.h (m32r_hard_regno_mode_ok, m32r_punct_chars): Likewise.
* mcore.h (regno_reg_class): Likewise.
* mips.h (mips_print_operand_punct, mips_char_to_class):
Likewise.
* ns32k.h (regclass_map): Likewise.
* pj.h (pj_debugreg_renumber_vec): Likewise.
* s390.h (regclass_map): Likewise.
* sh.h (regno_reg_class): Likewise.
* sparc.h (sparc_regno_reg_class): Likewise.
* hard-reg-set.h (reg_class_contents): Likewise.
* machmode.h (class_narrowest_mode): Likewise.
2001-12-22 David Edelsohn <edelsohn@gnu.org>
* loop.c (scan_loop, move_movables, count_one_set): Do not

4
gcc/config/1750a/1750a.h
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@ -62,8 +62,8 @@ enum section { Init, Normal, Konst, Static };
#define DATALBL_ARRSIZ 256
#define JMPLBL_ARRSIZ 256
#ifndef __datalbl
extern struct datalabel_array datalbl[];
extern struct jumplabel_array jmplbl[];
extern struct datalabel_array datalbl[DATALBL_ARRSIZ];
extern struct jumplabel_array jmplbl[JMPLBL_ARRSIZ];
extern int datalbl_ndx, jmplbl_ndx, label_pending, program_counter;
extern enum section current_section;
extern const char *const sectname[4];

2
gcc/config/a29k/a29k.h
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@ -1416,7 +1416,7 @@ literal_section () \
/* How to renumber registers for dbx and gdb. */
extern int a29k_debug_reg_map[];
extern int a29k_debug_reg_map[FIRST_PSEUDO_REGISTER];
#define DBX_REGISTER_NUMBER(REGNO) a29k_debug_reg_map[REGNO]
/* Switch into a generic section. */

4
gcc/config/arc/arc.h
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@ -464,7 +464,7 @@ enum reg_class {
Return the class number of the smallest class containing
reg number REGNO. This could be a conditional expression
or could index an array. */
extern enum reg_class arc_regno_reg_class[];
extern enum reg_class arc_regno_reg_class[FIRST_PSEUDO_REGISTER];
#define REGNO_REG_CLASS(REGNO) \
(arc_regno_reg_class[REGNO])
@ -1332,7 +1332,7 @@ arc_final_prescan_insn (INSN, OPVEC, NOPERANDS)
/* A C expression which evaluates to true if CODE is a valid
punctuation character for use in the `PRINT_OPERAND' macro. */
extern char arc_punct_chars[];
extern char arc_punct_chars[256];
#define PRINT_OPERAND_PUNCT_VALID_P(CHAR) \
arc_punct_chars[(unsigned char) (CHAR)]

4
gcc/config/c4x/c4x-protos.h
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@ -287,8 +287,8 @@ extern struct rtx_def *c4x_compare_op1; /* Operand 1 for comparisons. */
#endif /* RTX_CODE */
/* Smallest class containing REGNO. */
extern enum reg_class c4x_regclass_map[];
extern enum machine_mode c4x_caller_save_map[];
extern enum reg_class c4x_regclass_map[FIRST_PSEUDO_REGISTER];
extern enum machine_mode c4x_caller_save_map[FIRST_PSEUDO_REGISTER];
extern int c4x_rpts_cycles; /* Max cycles for RPTS. */
extern int c4x_cpu_version; /* Cpu version C30/31/32/40/44. */

4
gcc/config/convex/convex.h
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@ -1365,8 +1365,8 @@ enum reg_class {
extern int target_cpu;
extern int current_section_is_text;
extern enum reg_class regno_reg_class[];
extern enum reg_class reg_class_from_letter[];
extern enum reg_class regno_reg_class[FIRST_PSEUDO_REGISTER];
extern enum reg_class reg_class_from_letter[256];
extern char regno_ok_for_index_p_base[];
#define regno_ok_for_index_p (regno_ok_for_index_p_base + 1)

4
gcc/config/d30v/d30v.h
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@ -1503,7 +1503,7 @@ enum reg_class
REGNO. In general there is more than one such class; choose a class which
is "minimal", meaning that no smaller class also contains the register. */
extern enum reg_class regno_reg_class[];
extern enum reg_class regno_reg_class[FIRST_PSEUDO_REGISTER];
#define REGNO_REG_CLASS(REGNO) regno_reg_class[ (REGNO) ]
/* A macro whose definition is the name of the class to which a valid base
@ -1533,7 +1533,7 @@ extern enum reg_class regno_reg_class[];
'V', 'X'
'g', 'i', 'm', 'n', 'o', 'p', 'r', 's' */
extern enum reg_class reg_class_from_letter[];
extern enum reg_class reg_class_from_letter[256];
#define REG_CLASS_FROM_LETTER(CHAR) reg_class_from_letter[(unsigned char)(CHAR)]
/* A C expression which is nonzero if register number NUM is suitable for use

2
gcc/config/i386/i386.h
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@ -3136,7 +3136,7 @@ extern const char *ix86_branch_cost_string; /* values 1-5: see jump.c */
extern int ix86_regparm; /* ix86_regparm_string as a number */
extern int ix86_preferred_stack_boundary; /* preferred stack boundary alignment in bits */
extern int ix86_branch_cost; /* values 1-5: see jump.c */
extern enum reg_class const regclass_map[]; /* smalled class containing REGNO */
extern enum reg_class const regclass_map[FIRST_PSEUDO_REGISTER]; /* smalled class containing REGNO */
extern struct rtx_def *ix86_compare_op0; /* operand 0 for comparisons */
extern struct rtx_def *ix86_compare_op1; /* operand 1 for comparisons */

4
gcc/config/m32r/m32r.h
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@ -651,7 +651,7 @@ extern enum m32r_sdata m32r_sdata;
((GET_MODE_SIZE (MODE) + UNITS_PER_WORD - 1) / UNITS_PER_WORD)
/* Value is 1 if hard register REGNO can hold a value of machine-mode MODE. */
extern unsigned int m32r_hard_regno_mode_ok[];
extern unsigned int m32r_hard_regno_mode_ok[FIRST_PSEUDO_REGISTER];
extern unsigned int m32r_mode_class[];
#define HARD_REGNO_MODE_OK(REGNO, MODE) \
((m32r_hard_regno_mode_ok[REGNO] & m32r_mode_class[MODE]) != 0)
@ -1823,7 +1823,7 @@ do { \
/* A C expression which evaluates to true if CODE is a valid
punctuation character for use in the `PRINT_OPERAND' macro. */
extern char m32r_punct_chars[];
extern char m32r_punct_chars[256];
#define PRINT_OPERAND_PUNCT_VALID_P(CHAR) \
m32r_punct_chars[(unsigned char) (CHAR)]

2
gcc/config/mcore/mcore.h
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@ -530,7 +530,7 @@ enum reg_class
reg number REGNO. This could be a conditional expression
or could index an array. */
extern int regno_reg_class[];
extern int regno_reg_class[FIRST_PSEUDO_REGISTER];
#define REGNO_REG_CLASS(REGNO) regno_reg_class[REGNO]
/* When defined, the compiler allows registers explicitly used in the

4
gcc/config/mips/mips.h
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@ -119,7 +119,7 @@ enum block_move_type {
};
extern char mips_reg_names[][8]; /* register names (a0 vs. $4). */
extern char mips_print_operand_punct[]; /* print_operand punctuation chars */
extern char mips_print_operand_punct[256]; /* print_operand punctuation chars */
extern const char *current_function_file; /* filename current function is in */
extern int num_source_filenames; /* current .file # */
extern int inside_function; /* != 0 if inside of a function */
@ -2083,7 +2083,7 @@ extern const enum reg_class mips_regno_to_class[];
'z' FP Status register
'b' All registers */
extern enum reg_class mips_char_to_class[];
extern enum reg_class mips_char_to_class[256];
#define REG_CLASS_FROM_LETTER(C) mips_char_to_class[(unsigned char)(C)]

2
gcc/config/ns32k/ns32k.h
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@ -1407,7 +1407,7 @@ do { \
#define PRINT_OPERAND_ADDRESS(FILE, ADDR) print_operand_address(FILE, ADDR)
extern unsigned int ns32k_reg_class_contents[N_REG_CLASSES][1];
extern enum reg_class regclass_map[]; /* smallest class containing REGNO */
extern enum reg_class regclass_map[FIRST_PSEUDO_REGISTER]; /* smallest class containing REGNO */
/*
Local variables:

2
gcc/config/pj/pj.h
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@ -1253,7 +1253,7 @@ do { fputs (current_function_varargs || current_function_stdarg \
#define CAN_DEBUG_WITHOUT_FP
/* How to renumber registers for dbx and gdb. */
extern short pj_debugreg_renumber_vec[];
extern short pj_debugreg_renumber_vec[FIRST_PSEUDO_REGISTER];
#define DBX_REGISTER_NUMBER(REG) (pj_debugreg_renumber_vec[REG])

2
gcc/config/s390/s390.h
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@ -524,7 +524,7 @@ enum reg_class
#define REGNO_REG_CLASS(REGNO) (regclass_map[REGNO])
extern enum reg_class regclass_map[]; /* smalled class containing REGNO */
extern enum reg_class regclass_map[FIRST_PSEUDO_REGISTER]; /* smalled class containing REGNO */
/* The class value for index registers, and the one for base regs. */

2
gcc/config/sh/sh.h
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@ -804,7 +804,7 @@ enum reg_class
reg number REGNO. This could be a conditional expression
or could index an array. */
extern int regno_reg_class[];
extern int regno_reg_class[FIRST_PSEUDO_REGISTER];
#define REGNO_REG_CLASS(REGNO) regno_reg_class[(REGNO)]
/* When defined, the compiler allows registers explicitly used in the

2
gcc/config/sparc/sparc.h
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@ -1302,7 +1302,7 @@ enum reg_class { NO_REGS, FPCC_REGS, I64_REGS, GENERAL_REGS, FP_REGS,
reg number REGNO. This could be a conditional expression
or could index an array. */
extern enum reg_class sparc_regno_reg_class[];
extern enum reg_class sparc_regno_reg_class[FIRST_PSEUDO_REGISTER];
#define REGNO_REG_CLASS(REGNO) sparc_regno_reg_class[(REGNO)]

5
gcc/f/ChangeLog
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@ -1,3 +1,8 @@
Sat Dec 22 16:01:51 2001 Kaveh R. Ghazi <ghazi@caip.rutgers.edu>
* bld.c (ffebld_arity_op_): Declare array size explicitly.
* bld.h (ffebld_arity_op_): Likewise.
2001-12-20 Joseph S. Myers <jsm28@cam.ac.uk>
* config-lang.in (diff_excludes): Remove.

2
gcc/f/bld.c
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@ -46,7 +46,7 @@ the Free Software Foundation, 59 Temple Place - Suite 330, Boston, MA
/* Externals defined here. */
const ffebldArity ffebld_arity_op_[]
const ffebldArity ffebld_arity_op_[(int) FFEBLD_op]
=
{
#define FFEBLD_OP(KWD,NAME,ARITY) ARITY,

2
gcc/f/bld.h
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@ -474,7 +474,7 @@ struct _ffebld_pool_stack_
/* Global objects accessed by users of this module. */
extern const ffebldArity ffebld_arity_op_[];
extern const ffebldArity ffebld_arity_op_[(int) FFEBLD_op];
extern struct _ffebld_pool_stack_ ffebld_pool_stack_;
/* Declare functions with prototypes. */

2
gcc/hard-reg-set.h
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@ -452,7 +452,7 @@ extern int inv_reg_alloc_order[FIRST_PSEUDO_REGISTER];
/* For each reg class, a HARD_REG_SET saying which registers are in it. */
extern HARD_REG_SET reg_class_contents[];
extern HARD_REG_SET reg_class_contents[N_REG_CLASSES];
/* For each reg class, number of regs it contains. */

2
gcc/machmode.h
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@ -148,7 +148,7 @@ extern unsigned get_mode_alignment PARAMS ((enum machine_mode));
/* For each class, get the narrowest mode in that class. */
extern const enum machine_mode class_narrowest_mode[];
extern const enum machine_mode class_narrowest_mode[(int) MAX_MODE_CLASS];
#define GET_CLASS_NARROWEST_MODE(CLASS) class_narrowest_mode[(int) (CLASS)]
/* Define the integer modes whose sizes are BITS_PER_UNIT and BITS_PER_WORD