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[ARM/AArch64][testsuite] Add vsubhn, vraddhn and vrsubhn tests. Split vaddhn.c into vXXXhn.inc and vaddhn.c to share code with other new tests.
2015-01-26 Christophe Lyon <christophe.lyon@linaro.org> * gcc.target/aarch64/advsimd-intrinsics/vXXXhn.inc: New file. * gcc.target/aarch64/advsimd-intrinsics/vraddhn.c: New file. * gcc.target/aarch64/advsimd-intrinsics/vrsubhn.c: New file. * gcc.target/aarch64/advsimd-intrinsics/vsubhn.c: New file. * gcc.target/aarch64/advsimd-intrinsics/vaddhn.c: Use code from vXXXhn.inc. From-SVN: r220117
This commit is contained in:
Christophe Lyon
Christophe Lyon
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0699caae0f
commit
f4d988f497
@ -1,3 +1,12 @@
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2015-01-26 Christophe Lyon <christophe.lyon@linaro.org>
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* gcc.target/aarch64/advsimd-intrinsics/vXXXhn.inc: New file.
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* gcc.target/aarch64/advsimd-intrinsics/vraddhn.c: New file.
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* gcc.target/aarch64/advsimd-intrinsics/vrsubhn.c: New file.
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* gcc.target/aarch64/advsimd-intrinsics/vsubhn.c: New file.
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* gcc.target/aarch64/advsimd-intrinsics/vaddhn.c: Use code from
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vXXXhn.inc.
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2015-01-26 Richard Biener <rguenther@suse.de>
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PR middle-end/64764
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#define FNNAME1(NAME) exec_ ## NAME
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#define FNNAME(NAME) FNNAME1(NAME)
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void FNNAME (INSN_NAME) (void)
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{
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/* Basic test: vec64=vXXXhn(vec128_a, vec128_b), then store the result. */
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#define TEST_VXXXHN1(INSN, T1, T2, W, W2, N) \
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VECT_VAR(vector64, T1, W2, N) = INSN##_##T2##W(VECT_VAR(vector1, T1, W, N), \
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VECT_VAR(vector2, T1, W, N)); \
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vst1_##T2##W2(VECT_VAR(result, T1, W2, N), VECT_VAR(vector64, T1, W2, N))
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#define TEST_VXXXHN(INSN, T1, T2, W, W2, N) \
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TEST_VXXXHN1(INSN, T1, T2, W, W2, N)
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DECL_VARIABLE_64BITS_VARIANTS(vector64);
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DECL_VARIABLE_128BITS_VARIANTS(vector1);
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DECL_VARIABLE_128BITS_VARIANTS(vector2);
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clean_results ();
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/* Fill input vector1 and vector2 with arbitrary values */
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VDUP(vector1, q, int, s, 16, 8, 50*(UINT8_MAX+1));
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VDUP(vector1, q, int, s, 32, 4, 50*(UINT16_MAX+1));
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VDUP(vector1, q, int, s, 64, 2, 24*((uint64_t)UINT32_MAX+1));
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VDUP(vector1, q, uint, u, 16, 8, 3*(UINT8_MAX+1));
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VDUP(vector1, q, uint, u, 32, 4, 55*(UINT16_MAX+1));
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VDUP(vector1, q, uint, u, 64, 2, 3*((uint64_t)UINT32_MAX+1));
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VDUP(vector2, q, int, s, 16, 8, (uint16_t)UINT8_MAX);
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VDUP(vector2, q, int, s, 32, 4, (uint32_t)UINT16_MAX);
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VDUP(vector2, q, int, s, 64, 2, (uint64_t)UINT32_MAX);
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VDUP(vector2, q, uint, u, 16, 8, (uint16_t)UINT8_MAX);
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VDUP(vector2, q, uint, u, 32, 4, (uint32_t)UINT16_MAX);
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VDUP(vector2, q, uint, u, 64, 2, (uint64_t)UINT32_MAX);
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TEST_VXXXHN(INSN_NAME, int, s, 16, 8, 8);
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TEST_VXXXHN(INSN_NAME, int, s, 32, 16, 4);
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TEST_VXXXHN(INSN_NAME, int, s, 64, 32, 2);
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TEST_VXXXHN(INSN_NAME, uint, u, 16, 8, 8);
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TEST_VXXXHN(INSN_NAME, uint, u, 32, 16, 4);
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TEST_VXXXHN(INSN_NAME, uint, u, 64, 32, 2);
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CHECK(TEST_MSG, int, 8, 8, PRIx8, expected, "");
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CHECK(TEST_MSG, int, 16, 4, PRIx16, expected, "");
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CHECK(TEST_MSG, int, 32, 2, PRIx32, expected, "");
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CHECK(TEST_MSG, uint, 8, 8, PRIx8, expected, "");
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CHECK(TEST_MSG, uint, 16, 4, PRIx16, expected, "");
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CHECK(TEST_MSG, uint, 32, 2, PRIx32, expected, "");
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}
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int main (void)
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{
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FNNAME (INSN_NAME) ();
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return 0;
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}
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@ -8,100 +8,17 @@
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#include <stdint.h>
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#endif
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#define INSN_NAME vaddhn
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#define TEST_MSG "VADDHN"
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/* Expected results. */
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VECT_VAR_DECL(expected,int,8,8) [] = { 0x32, 0x32, 0x32, 0x32,
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0x32, 0x32, 0x32, 0x32 };
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VECT_VAR_DECL(expected,int,16,4) [] = { 0x32, 0x32, 0x32, 0x32 };
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VECT_VAR_DECL(expected,int,32,2) [] = { 0x18, 0x18 };
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VECT_VAR_DECL(expected,int,64,1) [] = { 0x3333333333333333 };
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VECT_VAR_DECL(expected,uint,8,8) [] = { 0x3, 0x3, 0x3, 0x3,
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0x3, 0x3, 0x3, 0x3 };
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VECT_VAR_DECL(expected,uint,16,4) [] = { 0x37, 0x37, 0x37, 0x37 };
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VECT_VAR_DECL(expected,uint,32,2) [] = { 0x3, 0x3 };
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VECT_VAR_DECL(expected,uint,64,1) [] = { 0x3333333333333333 };
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VECT_VAR_DECL(expected,poly,8,8) [] = { 0x33, 0x33, 0x33, 0x33,
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0x33, 0x33, 0x33, 0x33 };
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VECT_VAR_DECL(expected,poly,16,4) [] = { 0x3333, 0x3333, 0x3333, 0x3333 };
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VECT_VAR_DECL(expected,hfloat,32,2) [] = { 0x33333333, 0x33333333 };
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VECT_VAR_DECL(expected,int,8,16) [] = { 0x33, 0x33, 0x33, 0x33,
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0x33, 0x33, 0x33, 0x33,
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0x33, 0x33, 0x33, 0x33,
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0x33, 0x33, 0x33, 0x33 };
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VECT_VAR_DECL(expected,int,16,8) [] = { 0x3333, 0x3333, 0x3333, 0x3333,
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0x3333, 0x3333, 0x3333, 0x3333 };
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VECT_VAR_DECL(expected,int,32,4) [] = { 0x33333333, 0x33333333,
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0x33333333, 0x33333333 };
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VECT_VAR_DECL(expected,int,64,2) [] = { 0x3333333333333333,
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0x3333333333333333 };
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VECT_VAR_DECL(expected,uint,8,16) [] = { 0x33, 0x33, 0x33, 0x33,
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0x33, 0x33, 0x33, 0x33,
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0x33, 0x33, 0x33, 0x33,
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0x33, 0x33, 0x33, 0x33 };
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VECT_VAR_DECL(expected,uint,16,8) [] = { 0x3333, 0x3333, 0x3333, 0x3333,
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0x3333, 0x3333, 0x3333, 0x3333 };
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VECT_VAR_DECL(expected,uint,32,4) [] = { 0x33333333, 0x33333333,
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0x33333333, 0x33333333 };
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VECT_VAR_DECL(expected,uint,64,2) [] = { 0x3333333333333333,
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0x3333333333333333 };
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VECT_VAR_DECL(expected,poly,8,16) [] = { 0x33, 0x33, 0x33, 0x33,
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0x33, 0x33, 0x33, 0x33,
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0x33, 0x33, 0x33, 0x33,
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0x33, 0x33, 0x33, 0x33 };
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VECT_VAR_DECL(expected,poly,16,8) [] = { 0x3333, 0x3333, 0x3333, 0x3333,
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0x3333, 0x3333, 0x3333, 0x3333 };
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VECT_VAR_DECL(expected,hfloat,32,4) [] = { 0x33333333, 0x33333333,
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0x33333333, 0x33333333 };
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#define INSN_NAME vaddhn
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#define TEST_MSG "VADDHN"
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#define FNNAME1(NAME) exec_ ## NAME
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#define FNNAME(NAME) FNNAME1(NAME)
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void FNNAME (INSN_NAME) (void)
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{
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/* Basic test: vec64=vaddhn(vec128_a, vec128_b), then store the result. */
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#define TEST_VADDHN1(INSN, T1, T2, W, W2, N) \
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VECT_VAR(vector64, T1, W2, N) = INSN##_##T2##W(VECT_VAR(vector1, T1, W, N), \
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VECT_VAR(vector2, T1, W, N)); \
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vst1_##T2##W2(VECT_VAR(result, T1, W2, N), VECT_VAR(vector64, T1, W2, N))
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#define TEST_VADDHN(INSN, T1, T2, W, W2, N) \
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TEST_VADDHN1(INSN, T1, T2, W, W2, N)
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DECL_VARIABLE_64BITS_VARIANTS(vector64);
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DECL_VARIABLE_128BITS_VARIANTS(vector1);
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DECL_VARIABLE_128BITS_VARIANTS(vector2);
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clean_results ();
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/* Fill input vector1 and vector2 with arbitrary values */
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VDUP(vector1, q, int, s, 16, 8, 50*(UINT8_MAX+1));
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VDUP(vector1, q, int, s, 32, 4, 50*(UINT16_MAX+1));
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VDUP(vector1, q, int, s, 64, 2, 24*((uint64_t)UINT32_MAX+1));
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VDUP(vector1, q, uint, u, 16, 8, 3*(UINT8_MAX+1));
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VDUP(vector1, q, uint, u, 32, 4, 55*(UINT16_MAX+1));
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VDUP(vector1, q, uint, u, 64, 2, 3*((uint64_t)UINT32_MAX+1));
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VDUP(vector2, q, int, s, 16, 8, (uint16_t)UINT8_MAX);
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VDUP(vector2, q, int, s, 32, 4, (uint32_t)UINT16_MAX);
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VDUP(vector2, q, int, s, 64, 2, (uint64_t)UINT32_MAX);
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VDUP(vector2, q, uint, u, 16, 8, (uint16_t)UINT8_MAX);
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VDUP(vector2, q, uint, u, 32, 4, (uint32_t)UINT16_MAX);
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VDUP(vector2, q, uint, u, 64, 2, (uint64_t)UINT32_MAX);
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TEST_VADDHN(INSN_NAME, int, s, 16, 8, 8);
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TEST_VADDHN(INSN_NAME, int, s, 32, 16, 4);
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TEST_VADDHN(INSN_NAME, int, s, 64, 32, 2);
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TEST_VADDHN(INSN_NAME, uint, u, 16, 8, 8);
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TEST_VADDHN(INSN_NAME, uint, u, 32, 16, 4);
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TEST_VADDHN(INSN_NAME, uint, u, 64, 32, 2);
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CHECK_RESULTS (TEST_MSG, "");
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}
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int main (void)
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{
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FNNAME (INSN_NAME) ();
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return 0;
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}
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#include "vXXXhn.inc"
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@ -0,0 +1,24 @@
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#include <arm_neon.h>
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#include "arm-neon-ref.h"
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#include "compute-ref-data.h"
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#if defined(__cplusplus)
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#include <cstdint>
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#else
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#include <stdint.h>
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#endif
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#define INSN_NAME vraddhn
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#define TEST_MSG "VRADDHN"
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/* Expected results. */
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VECT_VAR_DECL(expected,int,8,8) [] = { 0x33, 0x33, 0x33, 0x33,
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0x33, 0x33, 0x33, 0x33 };
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VECT_VAR_DECL(expected,int,16,4) [] = { 0x33, 0x33, 0x33, 0x33 };
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VECT_VAR_DECL(expected,int,32,2) [] = { 0x19, 0x19 };
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VECT_VAR_DECL(expected,uint,8,8) [] = { 0x4, 0x4, 0x4, 0x4,
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0x4, 0x4, 0x4, 0x4 };
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VECT_VAR_DECL(expected,uint,16,4) [] = { 0x38, 0x38, 0x38, 0x38 };
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VECT_VAR_DECL(expected,uint,32,2) [] = { 0x4, 0x4 };
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#include "vXXXhn.inc"
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#include <arm_neon.h>
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#include "arm-neon-ref.h"
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#include "compute-ref-data.h"
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#if defined(__cplusplus)
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#include <cstdint>
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#else
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#include <stdint.h>
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#endif
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#define INSN_NAME vrsubhn
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#define TEST_MSG "VRSUBHN"
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/* Expected results. */
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VECT_VAR_DECL(expected,int,8,8) [] = { 0x31, 0x31, 0x31, 0x31,
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0x31, 0x31, 0x31, 0x31 };
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VECT_VAR_DECL(expected,int,16,4) [] = { 0x31, 0x31, 0x31, 0x31 };
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VECT_VAR_DECL(expected,int,32,2) [] = { 0x17, 0x17 };
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VECT_VAR_DECL(expected,uint,8,8) [] = { 0x2, 0x2, 0x2, 0x2,
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0x2, 0x2, 0x2, 0x2 };
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VECT_VAR_DECL(expected,uint,16,4) [] = { 0x36, 0x36, 0x36, 0x36 };
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VECT_VAR_DECL(expected,uint,32,2) [] = { 0x2, 0x2 };
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#include "vXXXhn.inc"
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24
gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vsubhn.c
Normal file
24
gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vsubhn.c
Normal file
@ -0,0 +1,24 @@
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#include <arm_neon.h>
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#include "arm-neon-ref.h"
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#include "compute-ref-data.h"
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#if defined(__cplusplus)
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#include <cstdint>
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#else
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#include <stdint.h>
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#endif
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#define INSN_NAME vsubhn
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#define TEST_MSG "VSUBHN"
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/* Expected results. */
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VECT_VAR_DECL(expected,int,8,8) [] = { 0x31, 0x31, 0x31, 0x31,
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0x31, 0x31, 0x31, 0x31 };
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VECT_VAR_DECL(expected,int,16,4) [] = { 0x31, 0x31, 0x31, 0x31 };
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VECT_VAR_DECL(expected,int,32,2) [] = { 0x17, 0x17 };
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VECT_VAR_DECL(expected,uint,8,8) [] = { 0x2, 0x2, 0x2, 0x2,
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0x2, 0x2, 0x2, 0x2 };
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VECT_VAR_DECL(expected,uint,16,4) [] = { 0x36, 0x36, 0x36, 0x36 };
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VECT_VAR_DECL(expected,uint,32,2) [] = { 0x2, 0x2 };
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#include "vXXXhn.inc"
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