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cppopts.texi: Fix use of @item vs.
* doc/cppopts.texi: Fix use of @item vs. @itemx inside @table. * doc/extend.texi: Likewise. * doc/generic.texi: Likewise. * doc/invoke.texi: Likewise. * doc/md.texi: Likewise. * doc/sourcebuild.texi: Likewise. From-SVN: r192887
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@ -1,5 +1,12 @@
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2012-10-28 Andreas Schwab <schwab@linux-m68k.org>
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* doc/cppopts.texi: Fix use of @item vs. @itemx inside @table.
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* doc/extend.texi: Likewise.
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* doc/generic.texi: Likewise.
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* doc/invoke.texi: Likewise.
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* doc/md.texi: Likewise.
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* doc/sourcebuild.texi: Likewise.
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* doc/tm.texi.in (Misc): Add newline before @end.
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* doc/tm.texi: Update.
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@ -1,5 +1,5 @@
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@c Copyright (c) 1999, 2000, 2001, 2002, 2003, 2004, 2005, 2006, 2007, 2008,
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@c 2010, Free Software Foundation, Inc.
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@c 2010, 2012, Free Software Foundation, Inc.
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@c This is part of the CPP and GCC manuals.
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@c For copying conditions, see the file gcc.texi.
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@ -805,7 +805,7 @@ Replacement: [ ] @{ @} # \ ^ | ~
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Enable special code to work around file systems which only permit very
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short file names, such as MS-DOS@.
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@itemx --help
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@item --help
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@itemx --target-help
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@opindex help
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@opindex target-help
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@ -1251,10 +1251,10 @@ The @code{__flash} qualifier will locate data in the
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instruction. Pointers to this address space are 16 bits wide.
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@item __flash1
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@item __flash2
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@item __flash3
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@item __flash4
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@item __flash5
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@itemx __flash2
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@itemx __flash3
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@itemx __flash4
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@itemx __flash5
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@cindex @code{__flash1} AVR Named Address Spaces
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@cindex @code{__flash2} AVR Named Address Spaces
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@cindex @code{__flash3} AVR Named Address Spaces
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@ -1,4 +1,4 @@
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@c Copyright (c) 2004, 2005, 2007, 2008, 2010 Free Software Foundation, Inc.
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@c Copyright (c) 2004, 2005, 2007, 2008, 2010, 2012 Free Software Foundation, Inc.
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@c Free Software Foundation, Inc.
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@c This is part of the GCC manual.
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@c For copying conditions, see the file gcc.texi.
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@ -1417,13 +1417,13 @@ generate these expressions anyhow, if it can tell that strictness does
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not matter. The type of the operands and that of the result are
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always of @code{BOOLEAN_TYPE} or @code{INTEGER_TYPE}.
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@itemx POINTER_PLUS_EXPR
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@item POINTER_PLUS_EXPR
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This node represents pointer arithmetic. The first operand is always
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a pointer/reference type. The second operand is always an unsigned
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integer type compatible with sizetype. This is the only binary
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arithmetic operand that can operate on pointer types.
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@itemx PLUS_EXPR
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@item PLUS_EXPR
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@itemx MINUS_EXPR
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@itemx MULT_EXPR
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These nodes represent various binary arithmetic operations.
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@ -1617,7 +1617,7 @@ GNU dialect of ISO C99. When ISO C99 is fully implemented in GCC,
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this will become the default. The name @samp{gnu9x} is deprecated.
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@item gnu11
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@item gnu1x
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@itemx gnu1x
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GNU dialect of ISO C11. Support is incomplete and experimental. The
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name @samp{gnu1x} is deprecated.
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@ -5310,7 +5310,7 @@ is set by this option.
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For example, with @option{-fdbg-cnt=dce:10,tail_call:0},
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@code{dbg_cnt(dce)} returns true only for first 10 invocations.
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@itemx -fenable-@var{kind}-@var{pass}
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@item -fenable-@var{kind}-@var{pass}
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@itemx -fdisable-@var{kind}-@var{pass}=@var{range-list}
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@opindex fdisable-
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@opindex fenable-
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@ -5464,11 +5464,11 @@ Dump after duplicating the computed gotos.
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@option{-fdump-rtl-ce3} enable dumping after the three
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if conversion passes.
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@itemx -fdump-rtl-cprop_hardreg
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@item -fdump-rtl-cprop_hardreg
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@opindex fdump-rtl-cprop_hardreg
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Dump after hard register copy propagation.
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@itemx -fdump-rtl-csa
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@item -fdump-rtl-csa
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@opindex fdump-rtl-csa
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Dump after combining stack adjustments.
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@ -5479,11 +5479,11 @@ Dump after combining stack adjustments.
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@option{-fdump-rtl-cse1} and @option{-fdump-rtl-cse2} enable dumping after
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the two common subexpression elimination passes.
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@itemx -fdump-rtl-dce
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@item -fdump-rtl-dce
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@opindex fdump-rtl-dce
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Dump after the standalone dead code elimination passes.
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@itemx -fdump-rtl-dbr
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@item -fdump-rtl-dbr
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@opindex fdump-rtl-dbr
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Dump after delayed branch scheduling.
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@ -5528,7 +5528,7 @@ Dump after the initialization of the registers.
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@opindex fdump-rtl-initvals
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Dump after the computation of the initial value sets.
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@itemx -fdump-rtl-into_cfglayout
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@item -fdump-rtl-into_cfglayout
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@opindex fdump-rtl-into_cfglayout
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Dump after converting to cfglayout mode.
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@ -5558,7 +5558,7 @@ Dump after removing redundant mode switches.
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@opindex fdump-rtl-rnreg
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Dump after register renumbering.
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@itemx -fdump-rtl-outof_cfglayout
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@item -fdump-rtl-outof_cfglayout
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@opindex fdump-rtl-outof_cfglayout
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Dump after converting from cfglayout mode.
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@ -10815,10 +10815,10 @@ integer multiply, or integer multiply-and-accumulate.
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The default is @option{-mfp-mode=caller}
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@item -mnosplit-lohi
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@itemx -mno-postinc
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@itemx -mno-postmodify
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@opindex mnosplit-lohi
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@item -mno-postinc
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@opindex mno-postinc
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@item -mno-postmodify
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@opindex mno-postmodify
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Code generation tweaks that disable, respectively, splitting of 32-bit
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loads, generation of post-increment addresses, and generation of
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@ -10901,7 +10901,7 @@ statically linked only.
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Do not assume that unaligned memory references will be handled by the system.
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@item -momit-leaf-frame-pointer
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@item -mno-omit-leaf-frame-pointer
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@itemx -mno-omit-leaf-frame-pointer
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@opindex momit-leaf-frame-pointer
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@opindex mno-omit-leaf-frame-pointer
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Omit or keep the frame pointer in leaf functions. The former behaviour is the
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@ -11739,7 +11739,7 @@ This is the case for devices with at least 16@tie{}KiB of program
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memory.
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@item __AVR_HAVE_EIJMP_EICALL__
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@item __AVR_3_BYTE_PC__
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@itemx __AVR_3_BYTE_PC__
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The device has the @code{EIJMP} and @code{EICALL} instructions.
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This is the case for devices with more than 128@tie{}KiB of program memory.
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This also means that the program counter
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@ -11750,13 +11750,13 @@ The program counter (PC) is 2@tie{}bytes wide. This is the case for devices
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with up to 128@tie{}KiB of program memory.
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@item __AVR_HAVE_8BIT_SP__
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@item __AVR_HAVE_16BIT_SP__
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@itemx __AVR_HAVE_16BIT_SP__
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The stack pointer (SP) register is treated as 8-bit respectively
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16-bit register by the compiler.
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The definition of these macros is affected by @code{-mtiny-stack}.
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@item __AVR_HAVE_SPH__
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@item __AVR_SP8__
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@itemx __AVR_SP8__
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The device has the SPH (high part of stack pointer) special function
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register or has an 8-bit stack pointer, respectively.
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The definition of these macros is affected by @code{-mmcu=} and
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@ -11764,9 +11764,9 @@ in the cases of @code{-mmcu=avr2} and @code{-mmcu=avr25} also
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by @code{-msp8}.
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@item __AVR_HAVE_RAMPD__
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@item __AVR_HAVE_RAMPX__
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@item __AVR_HAVE_RAMPY__
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@item __AVR_HAVE_RAMPZ__
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@itemx __AVR_HAVE_RAMPX__
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@itemx __AVR_HAVE_RAMPY__
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@itemx __AVR_HAVE_RAMPZ__
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The device has the @code{RAMPD}, @code{RAMPX}, @code{RAMPY},
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@code{RAMPZ} special function register, respectively.
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@ -11774,7 +11774,7 @@ The device has the @code{RAMPD}, @code{RAMPX}, @code{RAMPY},
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This macro reflects the @code{-mno-interrupts} command line option.
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@item __AVR_ERRATA_SKIP__
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@item __AVR_ERRATA_SKIP_JMP_CALL__
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@itemx __AVR_ERRATA_SKIP_JMP_CALL__
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Some AVR devices (AT90S8515, ATmega103) must not skip 32-bit
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instructions because of a hardware erratum. Skip instructions are
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@code{SBRS}, @code{SBRC}, @code{SBIS}, @code{SBIC} and @code{CPSE}.
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@ -18457,7 +18457,7 @@ Mark the @code{MAC} register as call-clobbered, even if
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@option{-mhitachi} is given.
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@item -mieee
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@item -mno-ieee
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@itemx -mno-ieee
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@opindex mieee
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@opindex mnoieee
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Control the IEEE compliance of floating-point comparisons, which affects the
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@ -4483,8 +4483,8 @@ means of constraints requiring operands 1 and 0 to be the same location.
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@cindex @code{ior@var{m}3} instruction pattern
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@cindex @code{xor@var{m}3} instruction pattern
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@item @samp{ssadd@var{m}3}, @samp{usadd@var{m}3}
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@item @samp{sub@var{m}3}, @samp{sssub@var{m}3}, @samp{ussub@var{m}3}
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@item @samp{mul@var{m}3}, @samp{ssmul@var{m}3}, @samp{usmul@var{m}3}
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@itemx @samp{sub@var{m}3}, @samp{sssub@var{m}3}, @samp{ussub@var{m}3}
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@itemx @samp{mul@var{m}3}, @samp{ssmul@var{m}3}, @samp{usmul@var{m}3}
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@itemx @samp{div@var{m}3}, @samp{ssdiv@var{m}3}
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@itemx @samp{udiv@var{m}3}, @samp{usdiv@var{m}3}
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@itemx @samp{mod@var{m}3}, @samp{umod@var{m}3}
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@ -691,7 +691,7 @@ standard rule in @file{gcc/Makefile.in} to the variable
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@code{lang_checks}.
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@table @code
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@itemx all.cross
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@item all.cross
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@itemx start.encap
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@itemx rest.encap
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FIXME: exactly what goes in each of these targets?
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