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mn10300.md: Use nonimmediate_operand instead of general_operand on output operands.
* mn10300.md: Use nonimmediate_operand instead of general_operand on output operands. From-SVN: r35551
This commit is contained in:
parent
a7fef47884
commit
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@ -1,5 +1,8 @@
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2000-08-07 Graham Stott <grahams@cygnus.co.uk>
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2000-08-07 Graham Stott <grahams@cygnus.co.uk>
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* mn10300.md: Use nonimmediate_operand instead of general_operand
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on output operands.
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* mn10300.h (PREFERRED_RELOAD_CLASS): Limit memory reloads.
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* mn10300.h (PREFERRED_RELOAD_CLASS): Limit memory reloads.
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2000-08-07 Alexandre Oliva <aoliva@redhat.com>
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2000-08-07 Alexandre Oliva <aoliva@redhat.com>
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@ -56,7 +56,7 @@
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}")
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}")
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(define_insn ""
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(define_insn ""
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[(set (match_operand:QI 0 "general_operand" "=d*x*a,d*x,d*x*a,d*x*a,m")
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[(set (match_operand:QI 0 "nonimmediate_operand" "=d*x*a,d*x,d*x*a,d*x*a,m")
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(match_operand:QI 1 "general_operand" "0,I,d*xai,m,d*xa"))]
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(match_operand:QI 1 "general_operand" "0,I,d*xai,m,d*xa"))]
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"TARGET_AM33
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"TARGET_AM33
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&& (register_operand (operands[0], QImode)
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&& (register_operand (operands[0], QImode)
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@ -99,7 +99,7 @@
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[(set_attr "cc" "none,clobber,none_0hit,none_0hit,none_0hit")])
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[(set_attr "cc" "none,clobber,none_0hit,none_0hit,none_0hit")])
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(define_insn ""
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(define_insn ""
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[(set (match_operand:QI 0 "general_operand" "=d*a,d,d*a,d,m")
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[(set (match_operand:QI 0 "nonimmediate_operand" "=d*a,d,d*a,d,m")
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(match_operand:QI 1 "general_operand" "0,I,dai,m,d"))]
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(match_operand:QI 1 "general_operand" "0,I,dai,m,d"))]
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"register_operand (operands[0], QImode)
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"register_operand (operands[0], QImode)
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|| register_operand (operands[1], QImode)"
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|| register_operand (operands[1], QImode)"
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@ -146,7 +146,7 @@
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}")
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}")
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(define_insn ""
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(define_insn ""
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[(set (match_operand:HI 0 "general_operand" "=d*x*a,d*x,d*x*a,d*x*a,m")
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[(set (match_operand:HI 0 "nonimmediate_operand" "=d*x*a,d*x,d*x*a,d*x*a,m")
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(match_operand:HI 1 "general_operand" "0,I,d*x*ai,m,d*x*a"))]
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(match_operand:HI 1 "general_operand" "0,I,d*x*ai,m,d*x*a"))]
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"TARGET_AM33
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"TARGET_AM33
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&& (register_operand (operands[0], HImode)
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&& (register_operand (operands[0], HImode)
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@ -189,7 +189,7 @@
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[(set_attr "cc" "none,clobber,none_0hit,none_0hit,none_0hit")])
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[(set_attr "cc" "none,clobber,none_0hit,none_0hit,none_0hit")])
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(define_insn ""
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(define_insn ""
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[(set (match_operand:HI 0 "general_operand" "=d*a,d,d*a,d,m")
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[(set (match_operand:HI 0 "nonimmediate_operand" "=d*a,d,d*a,d,m")
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(match_operand:HI 1 "general_operand" "0,I,dai,m,d"))]
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(match_operand:HI 1 "general_operand" "0,I,dai,m,d"))]
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"register_operand (operands[0], HImode)
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"register_operand (operands[0], HImode)
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|| register_operand (operands[1], HImode)"
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|| register_operand (operands[1], HImode)"
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@ -275,7 +275,7 @@
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}")
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}")
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(define_insn ""
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(define_insn ""
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[(set (match_operand:SI 0 "general_operand"
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[(set (match_operand:SI 0 "nonimmediate_operand"
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"=dx,ax,dx,a,dxm,dxm,axm,axm,dx,dx,ax,ax,axR,!*y")
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"=dx,ax,dx,a,dxm,dxm,axm,axm,dx,dx,ax,ax,axR,!*y")
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(match_operand:SI 1 "general_operand"
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(match_operand:SI 1 "general_operand"
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"0,0,I,I,dx,ax,dx,ax,dixm,aixm,dixm,aixm,!*y,axR"))]
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"0,0,I,I,dx,ax,dx,ax,dixm,aixm,dixm,aixm,!*y,axR"))]
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@ -339,7 +339,7 @@
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}")
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}")
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(define_insn ""
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(define_insn ""
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[(set (match_operand:SF 0 "general_operand" "=dx,ax,dx,a,daxm,dax")
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[(set (match_operand:SF 0 "nonimmediate_operand" "=dx,ax,dx,a,daxm,dax")
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(match_operand:SF 1 "general_operand" "0,0,G,G,dax,daxFm"))]
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(match_operand:SF 1 "general_operand" "0,0,G,G,dax,daxFm"))]
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"register_operand (operands[0], SFmode)
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"register_operand (operands[0], SFmode)
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|| register_operand (operands[1], SFmode)"
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|| register_operand (operands[1], SFmode)"
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@ -384,7 +384,7 @@
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}")
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}")
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(define_insn ""
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(define_insn ""
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[(set (match_operand:DI 0 "general_operand"
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[(set (match_operand:DI 0 "nonimmediate_operand"
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"=dx,ax,dx,a,dxm,dxm,axm,axm,dx,dx,ax,ax")
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"=dx,ax,dx,a,dxm,dxm,axm,axm,dx,dx,ax,ax")
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(match_operand:DI 1 "general_operand"
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(match_operand:DI 1 "general_operand"
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"0,0,I,I,dx,ax,dx,ax,dxim,axim,dxim,axim"))]
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"0,0,I,I,dx,ax,dx,ax,dxim,axim,dxim,axim"))]
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@ -534,7 +534,7 @@
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}")
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}")
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(define_insn ""
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(define_insn ""
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[(set (match_operand:DF 0 "general_operand"
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[(set (match_operand:DF 0 "nonimmediate_operand"
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"=dx,ax,dx,a,dxm,dxm,axm,axm,dx,dx,ax,ax")
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"=dx,ax,dx,a,dxm,dxm,axm,axm,dx,dx,ax,ax")
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(match_operand:DF 1 "general_operand"
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(match_operand:DF 1 "general_operand"
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"0,0,G,G,dx,ax,dx,ax,dxFm,axFm,dxFm,axFm"))]
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"0,0,G,G,dx,ax,dx,ax,dxFm,axFm,dxFm,axFm"))]
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@ -970,10 +970,10 @@
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[(set_attr "cc" "set_zn")])
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[(set_attr "cc" "set_zn")])
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(define_insn "udivmodsi4"
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(define_insn "udivmodsi4"
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[(set (match_operand:SI 0 "general_operand" "=dx")
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[(set (match_operand:SI 0 "nonimmediate_operand" "=dx")
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(udiv:SI (match_operand:SI 1 "general_operand" "0")
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(udiv:SI (match_operand:SI 1 "general_operand" "0")
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(match_operand:SI 2 "general_operand" "dx")))
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(match_operand:SI 2 "general_operand" "dx")))
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(set (match_operand:SI 3 "general_operand" "=&d")
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(set (match_operand:SI 3 "nonimmediate_operand" "=&d")
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(umod:SI (match_dup 1) (match_dup 2)))]
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(umod:SI (match_dup 1) (match_dup 2)))]
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""
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""
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"*
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"*
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@ -988,10 +988,10 @@
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[(set_attr "cc" "set_zn")])
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[(set_attr "cc" "set_zn")])
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(define_insn "divmodsi4"
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(define_insn "divmodsi4"
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[(set (match_operand:SI 0 "general_operand" "=dx")
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[(set (match_operand:SI 0 "nonimmediate_operand" "=dx")
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(div:SI (match_operand:SI 1 "general_operand" "0")
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(div:SI (match_operand:SI 1 "general_operand" "0")
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(match_operand:SI 2 "general_operand" "dx")))
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(match_operand:SI 2 "general_operand" "dx")))
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(set (match_operand:SI 3 "general_operand" "=d")
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(set (match_operand:SI 3 "nonimmediate_operand" "=d")
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(mod:SI (match_dup 1) (match_dup 2)))]
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(mod:SI (match_dup 1) (match_dup 2)))]
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""
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""
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"*
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"*
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@ -1214,7 +1214,7 @@
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;; and storing the register, but they don't need a scratch register
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;; and storing the register, but they don't need a scratch register
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;; which may allow for better code generation.
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;; which may allow for better code generation.
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(define_insn ""
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(define_insn ""
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[(set (match_operand:QI 0 "general_operand" "=R,d") (const_int 0))]
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[(set (match_operand:QI 0 "nonimmediate_operand" "=R,d") (const_int 0))]
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""
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""
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"@
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"@
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bclr 255,%A0
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bclr 255,%A0
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@ -1222,7 +1222,7 @@
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[(set_attr "cc" "clobber")])
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[(set_attr "cc" "clobber")])
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(define_insn ""
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(define_insn ""
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[(set (match_operand:QI 0 "general_operand" "=R,d") (const_int -1))]
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[(set (match_operand:QI 0 "nonimmediate_operand" "=R,d") (const_int -1))]
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""
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""
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"@
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"@
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bset 255,%A0
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bset 255,%A0
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@ -1230,7 +1230,7 @@
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[(set_attr "cc" "clobber,none_0hit")])
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[(set_attr "cc" "clobber,none_0hit")])
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(define_insn ""
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(define_insn ""
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[(set (match_operand:QI 0 "general_operand" "+R,d")
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[(set (match_operand:QI 0 "nonimmediate_operand" "+R,d")
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(subreg:QI
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(subreg:QI
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(and:SI (subreg:SI (match_dup 0) 0)
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(and:SI (subreg:SI (match_dup 0) 0)
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(match_operand:SI 1 "const_int_operand" "i,i")) 0))]
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(match_operand:SI 1 "const_int_operand" "i,i")) 0))]
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@ -1241,7 +1241,7 @@
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[(set_attr "cc" "clobber,set_znv")])
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[(set_attr "cc" "clobber,set_znv")])
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(define_insn ""
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(define_insn ""
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[(set (match_operand:QI 0 "general_operand" "+R,d")
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[(set (match_operand:QI 0 "nonimmediate_operand" "+R,d")
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(subreg:QI
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(subreg:QI
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(ior:SI (subreg:SI (match_dup 0) 0)
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(ior:SI (subreg:SI (match_dup 0) 0)
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(match_operand:SI 1 "const_int_operand" "i,i")) 0))]
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(match_operand:SI 1 "const_int_operand" "i,i")) 0))]
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@ -1595,7 +1595,7 @@
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"")
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"")
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(define_insn ""
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(define_insn ""
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[(set (match_operand:SI 0 "general_operand" "=dx,dx,dx,!dax,!dax,!dax")
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[(set (match_operand:SI 0 "nonimmediate_operand" "=dx,dx,dx,!dax,!dax,!dax")
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(zero_extend:SI
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(zero_extend:SI
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(match_operand:QI 1 "general_operand" "0,dax,m,0,dax,m")))]
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(match_operand:QI 1 "general_operand" "0,dax,m,0,dax,m")))]
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"TARGET_AM33"
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"TARGET_AM33"
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@ -1609,7 +1609,7 @@
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[(set_attr "cc" "none_0hit")])
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[(set_attr "cc" "none_0hit")])
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(define_insn ""
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(define_insn ""
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[(set (match_operand:SI 0 "general_operand" "=dx,dx,dx")
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[(set (match_operand:SI 0 "nonimmediate_operand" "=dx,dx,dx")
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(zero_extend:SI
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(zero_extend:SI
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(match_operand:QI 1 "general_operand" "0,d,m")))]
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(match_operand:QI 1 "general_operand" "0,d,m")))]
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""
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""
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"")
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"")
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(define_insn ""
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(define_insn ""
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[(set (match_operand:SI 0 "general_operand" "=dx,dx,dx,!dax,!dax,!dax")
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[(set (match_operand:SI 0 "nonimmediate_operand" "=dx,dx,dx,!dax,!dax,!dax")
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(zero_extend:SI
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(zero_extend:SI
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(match_operand:HI 1 "general_operand" "0,dax,m,0,dax,m")))]
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(match_operand:HI 1 "general_operand" "0,dax,m,0,dax,m")))]
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"TARGET_AM33"
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"TARGET_AM33"
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@ -1641,7 +1641,7 @@
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[(set_attr "cc" "none_0hit")])
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[(set_attr "cc" "none_0hit")])
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(define_insn ""
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(define_insn ""
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[(set (match_operand:SI 0 "general_operand" "=dx,dx,dx")
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[(set (match_operand:SI 0 "nonimmediate_operand" "=dx,dx,dx")
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(zero_extend:SI
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(zero_extend:SI
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(match_operand:HI 1 "general_operand" "0,dx,m")))]
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(match_operand:HI 1 "general_operand" "0,dx,m")))]
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""
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""
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"")
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"")
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(define_insn ""
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(define_insn ""
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[(set (match_operand:SI 0 "general_operand" "=dx,dx,!dax,!dax")
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[(set (match_operand:SI 0 "nonimmediate_operand" "=dx,dx,!dax,!dax")
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(sign_extend:SI
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(sign_extend:SI
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(match_operand:QI 1 "general_operand" "0,dx,0,dax")))]
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(match_operand:QI 1 "general_operand" "0,dx,0,dax")))]
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"TARGET_AM33"
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"TARGET_AM33"
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[(set_attr "cc" "none_0hit")])
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[(set_attr "cc" "none_0hit")])
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(define_insn ""
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(define_insn ""
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[(set (match_operand:SI 0 "general_operand" "=dx,dx")
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[(set (match_operand:SI 0 "nonimmediate_operand" "=dx,dx")
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(sign_extend:SI
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(sign_extend:SI
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(match_operand:QI 1 "general_operand" "0,dx")))]
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(match_operand:QI 1 "general_operand" "0,dx")))]
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""
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""
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"")
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"")
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(define_insn ""
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(define_insn ""
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[(set (match_operand:SI 0 "general_operand" "=dx,dx,!dax,!dax")
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[(set (match_operand:SI 0 "nonimmediate_operand" "=dx,dx,!dax,!dax")
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(sign_extend:SI
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(sign_extend:SI
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(match_operand:HI 1 "general_operand" "0,dax,0,dax")))]
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(match_operand:HI 1 "general_operand" "0,dax,0,dax")))]
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"TARGET_AM33"
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"TARGET_AM33"
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[(set_attr "cc" "none_0hit")])
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[(set_attr "cc" "none_0hit")])
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(define_insn ""
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(define_insn ""
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[(set (match_operand:SI 0 "general_operand" "=dx,dx")
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[(set (match_operand:SI 0 "nonimmediate_operand" "=dx,dx")
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(sign_extend:SI
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(sign_extend:SI
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(match_operand:HI 1 "general_operand" "0,dx")))]
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(match_operand:HI 1 "general_operand" "0,dx")))]
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""
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""
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