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invoke.texi (-mfix-r10000): Document.
gcc/ 2008-11-15 Joshua Kinard <kumba@gentoo.org> * doc/invoke.texi (-mfix-r10000): Document. * config/mips/mips.opt (mfix-r10000): New option. * config/mips/mips-protos.h (mips_output_sync_loop): Declare. * config/mips/mips.h (MIPS_COMPARE_AND_SWAP): Use %?. (MIPS_COMPARE_AND_SWAP_12): Likewise. (MIPS_SYNC_OP): Likewise. (MIPS_SYNC_OP_12): Likewise. (MIPS_SYNC_OLD_OP_12): Likewise. (MIPS_SYNC_NEW_OP_12): Likewise. (MIPS_SYNC_OLD_OP): Likewise. (MIPS_SYNC_NAND): Likewise. (MIPS_SYNC_OLD_NAND): Likewise. (MIPS_SYNC_EXCHANGE): Likewise. (MIPS_SYNC_EXCHANGE_12): Likewise. (MIPS_SYNC_NEW_OP): Likewise, using %~ to fill branch-likely delay slots. (MIPS_SYNC_NEW_NAND): Likewise. * config/mips/mips.c (mips_print_operand_punctuation): Handle '~'. (mips_init_print_operand_punct): Treat '~' as a punctuation character. (mips_output_sync_loop): New function. (mips_override_options): Make -march=r10000 imply -mfix-r10000. Make -mfix-r10000 require branch-likely instructions. * config/mips/sync.md (sync_compare_and_swap<mode>): Use mips_output_sync_loop. (compare_and_swap_12): Likewise. (sync_add<mode>): Likewise. (sync_<optab>_12): Likewise. (sync_old_<optab>_12): Likewise. (sync_new_<optab>_12): Likewise. (sync_nand_12): Likewise. (sync_old_nand_12): Likewise. (sync_new_nand_12): Likewise. (sync_sub<mode>): Likewise. (sync_old_add<mode>): Likewise. (sync_old_sub<mode>): Likewise. (sync_new_add<mode>): Likewise. (sync_new_sub<mode>): Likewise. (sync_<optab><mode>): Likewise. (sync_old_<optab><mode>): Likewise. (sync_new_<optab><mode>): Likewise. (sync_nand<mode>): Likewise. (sync_old_nand<mode>): Likewise. (sync_new_nand<mode>): Likewise. (sync_lock_test_and_set<mode>): Likewise. (test_and_set_12): Likewise. gcc/testsuite/ 2008-11-15 Joshua Kinard <kumba@gentoo.org> Richard Sandiford <rdsandiford@goolemail.com> * gcc.target/mips/fix-r10000-1.c: New test. * gcc.target/mips/fix-r10000-2.c: Likewise. * gcc.target/mips/fix-r10000-3.c: Likewise. * gcc.target/mips/fix-r10000-4.c: Likewise. * gcc.target/mips/fix-r10000-5.c: Likewise. * gcc.target/mips/fix-r10000-6.c: Likewise. * gcc.target/mips/fix-r10000-7.c: Likewise. * gcc.target/mips/fix-r10000-8.c: Likewise. * gcc.target/mips/fix-r10000-9.c: Likewise. * gcc.target/mips/fix-r10000-10.c: Likewise. * gcc.target/mips/fix-r10000-11.c: Likewise. * gcc.target/mips/fix-r10000-12.c: Likewise. * gcc.target/mips/fix-r10000-13.c: Likewise. * gcc.target/mips/fix-r10000-14.c: Likewise. * gcc.target/mips/fix-r10000-15.c: Likewise. Co-Authored-By: Richard Sandiford <rdsandiford@googlemail.com> From-SVN: r141886
This commit is contained in:
Joshua Kinard
Richard Sandiford
parent
7348f18cb1
commit
ee9a72e50c
@ -1,3 +1,51 @@
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2008-11-15 Joshua Kinard <kumba@gentoo.org>
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* doc/invoke.texi (-mfix-r10000): Document.
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* config/mips/mips.opt (mfix-r10000): New option.
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* config/mips/mips-protos.h (mips_output_sync_loop): Declare.
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* config/mips/mips.h (MIPS_COMPARE_AND_SWAP): Use %?.
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(MIPS_COMPARE_AND_SWAP_12): Likewise.
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(MIPS_SYNC_OP): Likewise.
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(MIPS_SYNC_OP_12): Likewise.
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(MIPS_SYNC_OLD_OP_12): Likewise.
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(MIPS_SYNC_NEW_OP_12): Likewise.
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(MIPS_SYNC_OLD_OP): Likewise.
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(MIPS_SYNC_NAND): Likewise.
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(MIPS_SYNC_OLD_NAND): Likewise.
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(MIPS_SYNC_EXCHANGE): Likewise.
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(MIPS_SYNC_EXCHANGE_12): Likewise.
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(MIPS_SYNC_NEW_OP): Likewise, using %~ to fill branch-likely
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delay slots.
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(MIPS_SYNC_NEW_NAND): Likewise.
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* config/mips/mips.c (mips_print_operand_punctuation): Handle '~'.
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(mips_init_print_operand_punct): Treat '~' as a punctuation character.
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(mips_output_sync_loop): New function.
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(mips_override_options): Make -march=r10000 imply -mfix-r10000.
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Make -mfix-r10000 require branch-likely instructions.
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* config/mips/sync.md (sync_compare_and_swap<mode>): Use
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mips_output_sync_loop.
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(compare_and_swap_12): Likewise.
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(sync_add<mode>): Likewise.
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(sync_<optab>_12): Likewise.
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(sync_old_<optab>_12): Likewise.
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(sync_new_<optab>_12): Likewise.
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(sync_nand_12): Likewise.
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(sync_old_nand_12): Likewise.
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(sync_new_nand_12): Likewise.
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(sync_sub<mode>): Likewise.
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(sync_old_add<mode>): Likewise.
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(sync_old_sub<mode>): Likewise.
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(sync_new_add<mode>): Likewise.
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(sync_new_sub<mode>): Likewise.
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(sync_<optab><mode>): Likewise.
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(sync_old_<optab><mode>): Likewise.
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(sync_new_<optab><mode>): Likewise.
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(sync_nand<mode>): Likewise.
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(sync_old_nand<mode>): Likewise.
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(sync_new_nand<mode>): Likewise.
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(sync_lock_test_and_set<mode>): Likewise.
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(test_and_set_12): Likewise.
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2008-11-15 Eric Botcazou <ebotcazou@adacore.com>
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* gcc.c (cc1_options): Fix comment.
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@ -300,6 +300,7 @@ extern const char *mips_output_load_label (void);
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extern const char *mips_output_conditional_branch (rtx, rtx *, const char *,
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const char *);
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extern const char *mips_output_order_conditional_branch (rtx, rtx *, bool);
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extern const char *mips_output_sync_loop (const char *);
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extern const char *mips_output_division (const char *, rtx *);
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extern unsigned int mips_hard_regno_nregs (int, enum machine_mode);
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extern bool mips_linked_madd_p (rtx, rtx);
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@ -6909,6 +6909,7 @@ mips_print_operand_reloc (FILE *file, rtx op, enum mips_symbol_context context,
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'#' Print a nop if in a ".set noreorder" block.
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'/' Like '#', but do nothing within a delayed-branch sequence.
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'?' Print "l" if mips_branch_likely is true
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'~' Print a nop if mips_branch_likely is true
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'.' Print the name of the register with a hard-wired zero (zero or $0).
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'@' Print the name of the assembler temporary register (at or $1).
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'^' Print the name of the pic call-through register (t9 or $25).
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@ -6983,6 +6984,11 @@ mips_print_operand_punctuation (FILE *file, int ch)
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putc ('l', file);
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break;
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case '~':
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if (mips_branch_likely)
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fputs ("\n\tnop", file);
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break;
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case '.':
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fputs (reg_names[GP_REG_FIRST + 0], file);
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break;
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@ -7026,7 +7032,7 @@ mips_init_print_operand_punct (void)
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{
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const char *p;
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for (p = "()[]<>*#/?.@^+$|-"; *p; p++)
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for (p = "()[]<>*#/?~.@^+$|-"; *p; p++)
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mips_print_operand_punct[(unsigned char) *p] = true;
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}
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@ -10250,6 +10256,17 @@ mips_output_order_conditional_branch (rtx insn, rtx *operands, bool inverted_p)
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return mips_output_conditional_branch (insn, operands, branch[1], branch[0]);
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}
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/* Return the assembly code for __sync_*() loop LOOP. The loop should support
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both normal and likely branches, using %? and %~ where appropriate. */
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const char *
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mips_output_sync_loop (const char *loop)
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{
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/* Use branch-likely instructions to work around the LL/SC R10000 errata. */
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mips_branch_likely = TARGET_FIX_R10000;
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return loop;
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}
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/* Return the assembly code for DIV or DDIV instruction DIVISION, which has
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the operands given by OPERANDS. Add in a divide-by-zero check if needed.
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@ -13971,6 +13988,24 @@ mips_override_options (void)
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&& mips_matching_cpu_name_p (mips_arch_info->name, "r4400"))
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target_flags |= MASK_FIX_R4400;
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/* Default to working around R10000 errata only if the processor
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was selected explicitly. */
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if ((target_flags_explicit & MASK_FIX_R10000) == 0
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&& mips_matching_cpu_name_p (mips_arch_info->name, "r10000"))
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target_flags |= MASK_FIX_R10000;
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/* Make sure that branch-likely instructions available when using
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-mfix-r10000. The instructions are not available if either:
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1. -mno-branch-likely was passed.
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2. The selected ISA does not support branch-likely and
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the command line does not include -mbranch-likely. */
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if (TARGET_FIX_R10000
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&& ((target_flags_explicit & MASK_BRANCHLIKELY) == 0
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? !ISA_HAS_BRANCHLIKELY
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: !TARGET_BRANCHLIKELY))
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sorry ("%qs requires branch-likely instructions", "-mfix-r10000");
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/* Save base state of options. */
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mips_base_target_flags = target_flags;
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mips_base_delayed_branch = flag_delayed_branch;
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@ -3090,7 +3090,7 @@ while (0)
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"\tbne\t%0,%z2,2f\n" \
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"\t" OP "\t%@,%3\n" \
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"\tsc" SUFFIX "\t%@,%1\n" \
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"\tbeq\t%@,%.,1b\n" \
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"\tbeq%?\t%@,%.,1b\n" \
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"\tnop\n" \
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"\tsync%-%]%>%)\n" \
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"2:\n"
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@ -3115,7 +3115,7 @@ while (0)
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"\tand\t%@,%0,%3\n" \
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OPS \
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"\tsc\t%@,%1\n" \
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"\tbeq\t%@,%.,1b\n" \
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"\tbeq%?\t%@,%.,1b\n" \
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"\tnop\n" \
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"\tsync%-%]%>%)\n" \
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"2:\n"
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@ -3135,7 +3135,7 @@ while (0)
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"1:\tll" SUFFIX "\t%@,%0\n" \
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"\t" INSN "\t%@,%@,%1\n" \
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"\tsc" SUFFIX "\t%@,%0\n" \
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"\tbeq\t%@,%.,1b\n" \
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"\tbeq%?\t%@,%.,1b\n" \
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"\tnop\n" \
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"\tsync%-%]%>%)"
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@ -3160,7 +3160,7 @@ while (0)
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"\tand\t%4,%4,%1\n" \
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"\tor\t%@,%@,%4\n" \
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"\tsc\t%@,%0\n" \
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"\tbeq\t%@,%.,1b\n" \
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"\tbeq%?\t%@,%.,1b\n" \
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"\tnop\n" \
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"\tsync%-%]%>%)"
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@ -3193,7 +3193,7 @@ while (0)
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"\tand\t%5,%5,%2\n" \
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"\tor\t%@,%@,%5\n" \
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"\tsc\t%@,%1\n" \
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"\tbeq\t%@,%.,1b\n" \
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"\tbeq%?\t%@,%.,1b\n" \
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"\tnop\n" \
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"\tsync%-%]%>%)"
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@ -3223,7 +3223,7 @@ while (0)
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"\tand\t%0,%0,%2\n" \
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"\tor\t%@,%@,%0\n" \
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"\tsc\t%@,%1\n" \
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"\tbeq\t%@,%.,1b\n" \
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"\tbeq%?\t%@,%.,1b\n" \
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"\tnop\n" \
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"\tsync%-%]%>%)"
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@ -3243,7 +3243,7 @@ while (0)
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"1:\tll" SUFFIX "\t%0,%1\n" \
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"\t" INSN "\t%@,%0,%2\n" \
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"\tsc" SUFFIX "\t%@,%1\n" \
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"\tbeq\t%@,%.,1b\n" \
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"\tbeq%?\t%@,%.,1b\n" \
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"\tnop\n" \
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"\tsync%-%]%>%)"
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@ -3260,7 +3260,7 @@ while (0)
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"1:\tll" SUFFIX "\t%0,%1\n" \
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"\t" INSN "\t%@,%0,%2\n" \
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"\tsc" SUFFIX "\t%@,%1\n" \
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"\tbeq\t%@,%.,1b\n" \
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"\tbeq%?\t%@,%.,1b%~\n" \
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"\t" INSN "\t%0,%0,%2\n" \
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"\tsync%-%]%>%)"
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@ -3277,7 +3277,7 @@ while (0)
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"\tnor\t%@,%@,%.\n" \
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"\t" INSN "\t%@,%@,%1\n" \
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"\tsc" SUFFIX "\t%@,%0\n" \
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"\tbeq\t%@,%.,1b\n" \
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"\tbeq%?\t%@,%.,1b\n" \
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"\tnop\n" \
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"\tsync%-%]%>%)"
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@ -3296,7 +3296,7 @@ while (0)
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"\tnor\t%@,%0,%.\n" \
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"\t" INSN "\t%@,%@,%2\n" \
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"\tsc" SUFFIX "\t%@,%1\n" \
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"\tbeq\t%@,%.,1b\n" \
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"\tbeq%?\t%@,%.,1b\n" \
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"\tnop\n" \
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"\tsync%-%]%>%)"
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@ -3315,7 +3315,7 @@ while (0)
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"\tnor\t%0,%0,%.\n" \
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"\t" INSN "\t%@,%0,%2\n" \
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"\tsc" SUFFIX "\t%@,%1\n" \
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"\tbeq\t%@,%.,1b\n" \
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"\tbeq%?\t%@,%.,1b%~\n" \
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"\t" INSN "\t%0,%0,%2\n" \
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"\tsync%-%]%>%)"
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@ -3333,7 +3333,7 @@ while (0)
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"1:\tll" SUFFIX "\t%0,%1\n" \
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"\t" OP "\t%@,%2\n" \
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"\tsc" SUFFIX "\t%@,%1\n" \
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"\tbeq\t%@,%.,1b\n" \
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"\tbeq%?\t%@,%.,1b\n" \
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"\tnop\n" \
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"\tsync%-%]%>%)"
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@ -3357,7 +3357,7 @@ while (0)
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"\tand\t%@,%0,%3\n" \
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OPS \
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"\tsc\t%@,%1\n" \
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"\tbeq\t%@,%.,1b\n" \
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"\tbeq%?\t%@,%.,1b\n" \
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"\tnop\n" \
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"\tsync%-%]%>%)"
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@ -112,6 +112,10 @@ mfix-r4400
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Target Report Mask(FIX_R4400)
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Work around certain R4400 errata
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mfix-r10000
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Target Report Mask(FIX_R10000)
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Work around certain R10000 errata
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mfix-sb1
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Target Report Var(TARGET_FIX_SB1)
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Work around errata for early SB-1 revision 2 cores
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@ -43,9 +43,9 @@
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"GENERATE_LL_SC"
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{
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if (which_alternative == 0)
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return MIPS_COMPARE_AND_SWAP ("<d>", "li");
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return mips_output_sync_loop (MIPS_COMPARE_AND_SWAP ("<d>", "li"));
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else
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return MIPS_COMPARE_AND_SWAP ("<d>", "move");
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return mips_output_sync_loop (MIPS_COMPARE_AND_SWAP ("<d>", "move"));
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}
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[(set_attr "length" "32")])
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@ -76,9 +76,11 @@
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"GENERATE_LL_SC"
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{
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if (which_alternative == 0)
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return MIPS_COMPARE_AND_SWAP_12 (MIPS_COMPARE_AND_SWAP_12_NONZERO_OP);
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return (mips_output_sync_loop
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(MIPS_COMPARE_AND_SWAP_12 (MIPS_COMPARE_AND_SWAP_12_NONZERO_OP)));
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else
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return MIPS_COMPARE_AND_SWAP_12 (MIPS_COMPARE_AND_SWAP_12_ZERO_OP);
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return (mips_output_sync_loop
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(MIPS_COMPARE_AND_SWAP_12 (MIPS_COMPARE_AND_SWAP_12_ZERO_OP)));
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}
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[(set_attr "length" "40,36")])
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@ -91,9 +93,9 @@
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"GENERATE_LL_SC"
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{
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if (which_alternative == 0)
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return MIPS_SYNC_OP ("<d>", "<d>addiu");
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return mips_output_sync_loop (MIPS_SYNC_OP ("<d>", "<d>addiu"));
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else
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return MIPS_SYNC_OP ("<d>", "<d>addu");
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return mips_output_sync_loop (MIPS_SYNC_OP ("<d>", "<d>addu"));
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}
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[(set_attr "length" "28")])
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@ -124,7 +126,8 @@
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(clobber (match_scratch:SI 4 "=&d"))]
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"GENERATE_LL_SC"
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{
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return MIPS_SYNC_OP_12 ("<insn>", MIPS_SYNC_OP_12_NOT_NOP);
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return (mips_output_sync_loop
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(MIPS_SYNC_OP_12 ("<insn>", MIPS_SYNC_OP_12_NOT_NOP)));
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}
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[(set_attr "length" "40")])
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@ -160,8 +163,9 @@
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(clobber (match_scratch:SI 5 "=&d"))]
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"GENERATE_LL_SC"
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{
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return MIPS_SYNC_OLD_OP_12 ("<insn>", MIPS_SYNC_OLD_OP_12_NOT_NOP,
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MIPS_SYNC_OLD_OP_12_NOT_NOP_REG);
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return (mips_output_sync_loop
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(MIPS_SYNC_OLD_OP_12 ("<insn>", MIPS_SYNC_OLD_OP_12_NOT_NOP,
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MIPS_SYNC_OLD_OP_12_NOT_NOP_REG)));
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}
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[(set_attr "length" "40")])
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@ -202,7 +206,8 @@
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(match_dup 4)] UNSPEC_SYNC_NEW_OP_12))]
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"GENERATE_LL_SC"
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{
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return MIPS_SYNC_NEW_OP_12 ("<insn>", MIPS_SYNC_NEW_OP_12_NOT_NOP);
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return (mips_output_sync_loop
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(MIPS_SYNC_NEW_OP_12 ("<insn>", MIPS_SYNC_NEW_OP_12_NOT_NOP)));
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}
|
||||
[(set_attr "length" "40")])
|
||||
|
||||
@ -233,7 +238,8 @@
|
||||
(clobber (match_scratch:SI 4 "=&d"))]
|
||||
"GENERATE_LL_SC"
|
||||
{
|
||||
return MIPS_SYNC_OP_12 ("and", MIPS_SYNC_OP_12_NOT_NOT);
|
||||
return (mips_output_sync_loop
|
||||
(MIPS_SYNC_OP_12 ("and", MIPS_SYNC_OP_12_NOT_NOT)));
|
||||
}
|
||||
[(set_attr "length" "44")])
|
||||
|
||||
@ -267,8 +273,9 @@
|
||||
(clobber (match_scratch:SI 5 "=&d"))]
|
||||
"GENERATE_LL_SC"
|
||||
{
|
||||
return MIPS_SYNC_OLD_OP_12 ("and", MIPS_SYNC_OLD_OP_12_NOT_NOT,
|
||||
MIPS_SYNC_OLD_OP_12_NOT_NOT_REG);
|
||||
return (mips_output_sync_loop
|
||||
(MIPS_SYNC_OLD_OP_12 ("and", MIPS_SYNC_OLD_OP_12_NOT_NOT,
|
||||
MIPS_SYNC_OLD_OP_12_NOT_NOT_REG)));
|
||||
}
|
||||
[(set_attr "length" "44")])
|
||||
|
||||
@ -307,7 +314,8 @@
|
||||
(match_dup 4)] UNSPEC_SYNC_NEW_OP_12))]
|
||||
"GENERATE_LL_SC"
|
||||
{
|
||||
return MIPS_SYNC_NEW_OP_12 ("and", MIPS_SYNC_NEW_OP_12_NOT_NOT);
|
||||
return (mips_output_sync_loop
|
||||
(MIPS_SYNC_NEW_OP_12 ("and", MIPS_SYNC_NEW_OP_12_NOT_NOT)));
|
||||
}
|
||||
[(set_attr "length" "40")])
|
||||
|
||||
@ -319,7 +327,7 @@
|
||||
UNSPEC_SYNC_OLD_OP))]
|
||||
"GENERATE_LL_SC"
|
||||
{
|
||||
return MIPS_SYNC_OP ("<d>", "<d>subu");
|
||||
return mips_output_sync_loop (MIPS_SYNC_OP ("<d>", "<d>subu"));
|
||||
}
|
||||
[(set_attr "length" "28")])
|
||||
|
||||
@ -334,9 +342,9 @@
|
||||
"GENERATE_LL_SC"
|
||||
{
|
||||
if (which_alternative == 0)
|
||||
return MIPS_SYNC_OLD_OP ("<d>", "<d>addiu");
|
||||
return mips_output_sync_loop (MIPS_SYNC_OLD_OP ("<d>", "<d>addiu"));
|
||||
else
|
||||
return MIPS_SYNC_OLD_OP ("<d>", "<d>addu");
|
||||
return mips_output_sync_loop (MIPS_SYNC_OLD_OP ("<d>", "<d>addu"));
|
||||
}
|
||||
[(set_attr "length" "28")])
|
||||
|
||||
@ -350,7 +358,7 @@
|
||||
UNSPEC_SYNC_OLD_OP))]
|
||||
"GENERATE_LL_SC"
|
||||
{
|
||||
return MIPS_SYNC_OLD_OP ("<d>", "<d>subu");
|
||||
return mips_output_sync_loop (MIPS_SYNC_OLD_OP ("<d>", "<d>subu"));
|
||||
}
|
||||
[(set_attr "length" "28")])
|
||||
|
||||
@ -365,9 +373,9 @@
|
||||
"GENERATE_LL_SC"
|
||||
{
|
||||
if (which_alternative == 0)
|
||||
return MIPS_SYNC_NEW_OP ("<d>", "<d>addiu");
|
||||
return mips_output_sync_loop (MIPS_SYNC_NEW_OP ("<d>", "<d>addiu"));
|
||||
else
|
||||
return MIPS_SYNC_NEW_OP ("<d>", "<d>addu");
|
||||
return mips_output_sync_loop (MIPS_SYNC_NEW_OP ("<d>", "<d>addu"));
|
||||
}
|
||||
[(set_attr "length" "28")])
|
||||
|
||||
@ -381,7 +389,7 @@
|
||||
UNSPEC_SYNC_NEW_OP))]
|
||||
"GENERATE_LL_SC"
|
||||
{
|
||||
return MIPS_SYNC_NEW_OP ("<d>", "<d>subu");
|
||||
return mips_output_sync_loop (MIPS_SYNC_NEW_OP ("<d>", "<d>subu"));
|
||||
}
|
||||
[(set_attr "length" "28")])
|
||||
|
||||
@ -394,9 +402,9 @@
|
||||
"GENERATE_LL_SC"
|
||||
{
|
||||
if (which_alternative == 0)
|
||||
return MIPS_SYNC_OP ("<d>", "<immediate_insn>");
|
||||
return mips_output_sync_loop (MIPS_SYNC_OP ("<d>", "<immediate_insn>"));
|
||||
else
|
||||
return MIPS_SYNC_OP ("<d>", "<insn>");
|
||||
return mips_output_sync_loop (MIPS_SYNC_OP ("<d>", "<insn>"));
|
||||
}
|
||||
[(set_attr "length" "28")])
|
||||
|
||||
@ -411,9 +419,10 @@
|
||||
"GENERATE_LL_SC"
|
||||
{
|
||||
if (which_alternative == 0)
|
||||
return MIPS_SYNC_OLD_OP ("<d>", "<immediate_insn>");
|
||||
return (mips_output_sync_loop
|
||||
(MIPS_SYNC_OLD_OP ("<d>", "<immediate_insn>")));
|
||||
else
|
||||
return MIPS_SYNC_OLD_OP ("<d>", "<insn>");
|
||||
return mips_output_sync_loop (MIPS_SYNC_OLD_OP ("<d>", "<insn>"));
|
||||
}
|
||||
[(set_attr "length" "28")])
|
||||
|
||||
@ -428,9 +437,10 @@
|
||||
"GENERATE_LL_SC"
|
||||
{
|
||||
if (which_alternative == 0)
|
||||
return MIPS_SYNC_NEW_OP ("<d>", "<immediate_insn>");
|
||||
return (mips_output_sync_loop
|
||||
(MIPS_SYNC_NEW_OP ("<d>", "<immediate_insn>")));
|
||||
else
|
||||
return MIPS_SYNC_NEW_OP ("<d>", "<insn>");
|
||||
return mips_output_sync_loop (MIPS_SYNC_NEW_OP ("<d>", "<insn>"));
|
||||
}
|
||||
[(set_attr "length" "28")])
|
||||
|
||||
@ -441,9 +451,9 @@
|
||||
"GENERATE_LL_SC"
|
||||
{
|
||||
if (which_alternative == 0)
|
||||
return MIPS_SYNC_NAND ("<d>", "andi");
|
||||
return mips_output_sync_loop (MIPS_SYNC_NAND ("<d>", "andi"));
|
||||
else
|
||||
return MIPS_SYNC_NAND ("<d>", "and");
|
||||
return mips_output_sync_loop (MIPS_SYNC_NAND ("<d>", "and"));
|
||||
}
|
||||
[(set_attr "length" "32")])
|
||||
|
||||
@ -456,9 +466,9 @@
|
||||
"GENERATE_LL_SC"
|
||||
{
|
||||
if (which_alternative == 0)
|
||||
return MIPS_SYNC_OLD_NAND ("<d>", "andi");
|
||||
return mips_output_sync_loop (MIPS_SYNC_OLD_NAND ("<d>", "andi"));
|
||||
else
|
||||
return MIPS_SYNC_OLD_NAND ("<d>", "and");
|
||||
return mips_output_sync_loop (MIPS_SYNC_OLD_NAND ("<d>", "and"));
|
||||
}
|
||||
[(set_attr "length" "32")])
|
||||
|
||||
@ -471,9 +481,9 @@
|
||||
"GENERATE_LL_SC"
|
||||
{
|
||||
if (which_alternative == 0)
|
||||
return MIPS_SYNC_NEW_NAND ("<d>", "andi");
|
||||
return mips_output_sync_loop (MIPS_SYNC_NEW_NAND ("<d>", "andi"));
|
||||
else
|
||||
return MIPS_SYNC_NEW_NAND ("<d>", "and");
|
||||
return mips_output_sync_loop (MIPS_SYNC_NEW_NAND ("<d>", "and"));
|
||||
}
|
||||
[(set_attr "length" "32")])
|
||||
|
||||
@ -486,9 +496,9 @@
|
||||
"GENERATE_LL_SC"
|
||||
{
|
||||
if (which_alternative == 0)
|
||||
return MIPS_SYNC_EXCHANGE ("<d>", "li");
|
||||
return mips_output_sync_loop (MIPS_SYNC_EXCHANGE ("<d>", "li"));
|
||||
else
|
||||
return MIPS_SYNC_EXCHANGE ("<d>", "move");
|
||||
return mips_output_sync_loop (MIPS_SYNC_EXCHANGE ("<d>", "move"));
|
||||
}
|
||||
[(set_attr "length" "24")])
|
||||
|
||||
@ -516,8 +526,10 @@
|
||||
"GENERATE_LL_SC"
|
||||
{
|
||||
if (which_alternative == 0)
|
||||
return MIPS_SYNC_EXCHANGE_12 (MIPS_SYNC_EXCHANGE_12_NONZERO_OP);
|
||||
return (mips_output_sync_loop
|
||||
(MIPS_SYNC_EXCHANGE_12 (MIPS_SYNC_EXCHANGE_12_NONZERO_OP)));
|
||||
else
|
||||
return MIPS_SYNC_EXCHANGE_12 (MIPS_SYNC_EXCHANGE_12_ZERO_OP);
|
||||
return (mips_output_sync_loop
|
||||
(MIPS_SYNC_EXCHANGE_12 (MIPS_SYNC_EXCHANGE_12_ZERO_OP)));
|
||||
}
|
||||
[(set_attr "length" "28,24")])
|
||||
|
||||
@ -668,8 +668,8 @@ Objective-C and Objective-C++ Dialects}.
|
||||
-mmemcpy -mno-memcpy -mlong-calls -mno-long-calls @gol
|
||||
-mmad -mno-mad -mfused-madd -mno-fused-madd -nocpp @gol
|
||||
-mfix-r4000 -mno-fix-r4000 -mfix-r4400 -mno-fix-r4400 @gol
|
||||
-mfix-vr4120 -mno-fix-vr4120 -mfix-vr4130 -mno-fix-vr4130 @gol
|
||||
-mfix-sb1 -mno-fix-sb1 @gol
|
||||
-mfix-r10000 -mno-fix-r10000 -mfix-vr4120 -mno-fix-vr4120 @gol
|
||||
-mfix-vr4130 -mno-fix-vr4130 -mfix-sb1 -mno-fix-sb1 @gol
|
||||
-mflush-func=@var{func} -mno-flush-func @gol
|
||||
-mbranch-cost=@var{num} -mbranch-likely -mno-branch-likely @gol
|
||||
-mfp-exceptions -mno-fp-exceptions @gol
|
||||
@ -12833,6 +12833,22 @@ A double-word or a variable shift may give an incorrect result if executed
|
||||
immediately after starting an integer division.
|
||||
@end itemize
|
||||
|
||||
@item -mfix-r10000
|
||||
@itemx -mno-fix-r10000
|
||||
@opindex mfix-r10000
|
||||
@opindex mno-fix-r10000
|
||||
Work around certain R10000 errata:
|
||||
@itemize @minus
|
||||
@item
|
||||
@code{ll}/@code{sc} sequences may not behave atomically on revisions
|
||||
prior to 3.0. They may deadlock on revisions 2.6 and earlier.
|
||||
@end itemize
|
||||
|
||||
This option can only be used if the target architecture supports
|
||||
branch-likely instructions. @option{-mfix-r10000} is the default when
|
||||
@option{-march=r10000} is used; @option{-mno-fix-r10000} is the default
|
||||
otherwise.
|
||||
|
||||
@item -mfix-vr4120
|
||||
@itemx -mno-fix-vr4120
|
||||
@opindex mfix-vr4120
|
||||
|
||||
@ -1,3 +1,22 @@
|
||||
2008-11-15 Joshua Kinard <kumba@gentoo.org>
|
||||
Richard Sandiford <rdsandiford@goolemail.com>
|
||||
|
||||
* gcc.target/mips/fix-r10000-1.c: New test.
|
||||
* gcc.target/mips/fix-r10000-2.c: Likewise.
|
||||
* gcc.target/mips/fix-r10000-3.c: Likewise.
|
||||
* gcc.target/mips/fix-r10000-4.c: Likewise.
|
||||
* gcc.target/mips/fix-r10000-5.c: Likewise.
|
||||
* gcc.target/mips/fix-r10000-6.c: Likewise.
|
||||
* gcc.target/mips/fix-r10000-7.c: Likewise.
|
||||
* gcc.target/mips/fix-r10000-8.c: Likewise.
|
||||
* gcc.target/mips/fix-r10000-9.c: Likewise.
|
||||
* gcc.target/mips/fix-r10000-10.c: Likewise.
|
||||
* gcc.target/mips/fix-r10000-11.c: Likewise.
|
||||
* gcc.target/mips/fix-r10000-12.c: Likewise.
|
||||
* gcc.target/mips/fix-r10000-13.c: Likewise.
|
||||
* gcc.target/mips/fix-r10000-14.c: Likewise.
|
||||
* gcc.target/mips/fix-r10000-15.c: Likewise.
|
||||
|
||||
2008-11-15 Jakub Jelinek <jakub@redhat.com>
|
||||
|
||||
PR c++/37561
|
||||
|
||||
21
gcc/testsuite/gcc.target/mips/fix-r10000-1.c
Normal file
21
gcc/testsuite/gcc.target/mips/fix-r10000-1.c
Normal file
@ -0,0 +1,21 @@
|
||||
/* { dg-do compile } */
|
||||
/* { dg-mips-options "-O2 -march=mips4 -mfix-r10000" } */
|
||||
/* { dg-final { scan-assembler-times "\tbeql\t" 3 } } */
|
||||
|
||||
NOMIPS16 int
|
||||
f1 (int *z)
|
||||
{
|
||||
return __sync_fetch_and_add (z, 42);
|
||||
}
|
||||
|
||||
NOMIPS16 short
|
||||
f2 (short *z)
|
||||
{
|
||||
return __sync_fetch_and_add (z, 42);
|
||||
}
|
||||
|
||||
NOMIPS16 char
|
||||
f3 (char *z)
|
||||
{
|
||||
return __sync_fetch_and_add (z, 42);
|
||||
}
|
||||
21
gcc/testsuite/gcc.target/mips/fix-r10000-10.c
Normal file
21
gcc/testsuite/gcc.target/mips/fix-r10000-10.c
Normal file
@ -0,0 +1,21 @@
|
||||
/* { dg-do compile } */
|
||||
/* { dg-mips-options "-O2 -march=mips4 -mfix-r10000" } */
|
||||
/* { dg-final { scan-assembler-times "\tbeql\t" 3 } } */
|
||||
|
||||
NOMIPS16 int
|
||||
f1 (int *z)
|
||||
{
|
||||
return __sync_and_and_fetch (z, 42);
|
||||
}
|
||||
|
||||
NOMIPS16 short
|
||||
f2 (short *z)
|
||||
{
|
||||
return __sync_and_and_fetch (z, 42);
|
||||
}
|
||||
|
||||
NOMIPS16 char
|
||||
f3 (char *z)
|
||||
{
|
||||
return __sync_and_and_fetch (z, 42);
|
||||
}
|
||||
21
gcc/testsuite/gcc.target/mips/fix-r10000-11.c
Normal file
21
gcc/testsuite/gcc.target/mips/fix-r10000-11.c
Normal file
@ -0,0 +1,21 @@
|
||||
/* { dg-do compile } */
|
||||
/* { dg-mips-options "-O2 -march=mips4 -mfix-r10000" } */
|
||||
/* { dg-final { scan-assembler-times "\tbeql\t" 3 } } */
|
||||
|
||||
NOMIPS16 int
|
||||
f1 (int *z)
|
||||
{
|
||||
return __sync_xor_and_fetch (z, 42);
|
||||
}
|
||||
|
||||
NOMIPS16 short
|
||||
f2 (short *z)
|
||||
{
|
||||
return __sync_xor_and_fetch (z, 42);
|
||||
}
|
||||
|
||||
NOMIPS16 char
|
||||
f3 (char *z)
|
||||
{
|
||||
return __sync_xor_and_fetch (z, 42);
|
||||
}
|
||||
21
gcc/testsuite/gcc.target/mips/fix-r10000-12.c
Normal file
21
gcc/testsuite/gcc.target/mips/fix-r10000-12.c
Normal file
@ -0,0 +1,21 @@
|
||||
/* { dg-do compile } */
|
||||
/* { dg-mips-options "-O2 -march=mips4 -mfix-r10000" } */
|
||||
/* { dg-final { scan-assembler-times "\tbeql\t" 3 } } */
|
||||
|
||||
NOMIPS16 int
|
||||
f1 (int *z)
|
||||
{
|
||||
return __sync_nand_and_fetch (z, 42);
|
||||
}
|
||||
|
||||
NOMIPS16 short
|
||||
f2 (short *z)
|
||||
{
|
||||
return __sync_nand_and_fetch (z, 42);
|
||||
}
|
||||
|
||||
NOMIPS16 char
|
||||
f3 (char *z)
|
||||
{
|
||||
return __sync_nand_and_fetch (z, 42);
|
||||
}
|
||||
21
gcc/testsuite/gcc.target/mips/fix-r10000-13.c
Normal file
21
gcc/testsuite/gcc.target/mips/fix-r10000-13.c
Normal file
@ -0,0 +1,21 @@
|
||||
/* { dg-do compile } */
|
||||
/* { dg-mips-options "-O2 -march=mips4 -mfix-r10000" } */
|
||||
/* { dg-final { scan-assembler-times "\tbeql\t" 3 } } */
|
||||
|
||||
NOMIPS16 int
|
||||
f1 (int *z)
|
||||
{
|
||||
return __sync_bool_compare_and_swap (z, 0, 42);
|
||||
}
|
||||
|
||||
NOMIPS16 short
|
||||
f2 (short *z)
|
||||
{
|
||||
return __sync_bool_compare_and_swap (z, 0, 42);
|
||||
}
|
||||
|
||||
NOMIPS16 char
|
||||
f3 (char *z)
|
||||
{
|
||||
return __sync_bool_compare_and_swap (z, 0, 42);
|
||||
}
|
||||
21
gcc/testsuite/gcc.target/mips/fix-r10000-14.c
Normal file
21
gcc/testsuite/gcc.target/mips/fix-r10000-14.c
Normal file
@ -0,0 +1,21 @@
|
||||
/* { dg-do compile } */
|
||||
/* { dg-mips-options "-O2 -march=mips4 -mfix-r10000" } */
|
||||
/* { dg-final { scan-assembler-times "\tbeql\t" 3 } } */
|
||||
|
||||
NOMIPS16 int
|
||||
f1 (int *z)
|
||||
{
|
||||
return __sync_val_compare_and_swap (z, 0, 42);
|
||||
}
|
||||
|
||||
NOMIPS16 short
|
||||
f2 (short *z)
|
||||
{
|
||||
return __sync_val_compare_and_swap (z, 0, 42);
|
||||
}
|
||||
|
||||
NOMIPS16 char
|
||||
f3 (char *z)
|
||||
{
|
||||
return __sync_val_compare_and_swap (z, 0, 42);
|
||||
}
|
||||
33
gcc/testsuite/gcc.target/mips/fix-r10000-15.c
Normal file
33
gcc/testsuite/gcc.target/mips/fix-r10000-15.c
Normal file
@ -0,0 +1,33 @@
|
||||
/* { dg-do compile } */
|
||||
/* { dg-mips-options "-O2 -march=mips4 -mfix-r10000" } */
|
||||
/* { dg-final { scan-assembler-times "\tbeql\t" 3 } } */
|
||||
|
||||
NOMIPS16 int
|
||||
f1 (int *z)
|
||||
{
|
||||
int result;
|
||||
|
||||
result = __sync_lock_test_and_set (z, 42);
|
||||
__sync_lock_release (z);
|
||||
return result;
|
||||
}
|
||||
|
||||
NOMIPS16 short
|
||||
f2 (short *z)
|
||||
{
|
||||
short result;
|
||||
|
||||
result = __sync_lock_test_and_set (z, 42);
|
||||
__sync_lock_release (z);
|
||||
return result;
|
||||
}
|
||||
|
||||
NOMIPS16 char
|
||||
f3 (char *z)
|
||||
{
|
||||
char result;
|
||||
|
||||
result = __sync_lock_test_and_set (z, 42);
|
||||
__sync_lock_release (z);
|
||||
return result;
|
||||
}
|
||||
21
gcc/testsuite/gcc.target/mips/fix-r10000-2.c
Normal file
21
gcc/testsuite/gcc.target/mips/fix-r10000-2.c
Normal file
@ -0,0 +1,21 @@
|
||||
/* { dg-do compile } */
|
||||
/* { dg-mips-options "-O2 -march=mips4 -mfix-r10000" } */
|
||||
/* { dg-final { scan-assembler-times "\tbeql\t" 3 } } */
|
||||
|
||||
NOMIPS16 int
|
||||
f1 (int *z, int amt)
|
||||
{
|
||||
return __sync_fetch_and_sub (z, amt);
|
||||
}
|
||||
|
||||
NOMIPS16 short
|
||||
f2 (short *z, short amt)
|
||||
{
|
||||
return __sync_fetch_and_sub (z, amt);
|
||||
}
|
||||
|
||||
NOMIPS16 char
|
||||
f3 (char *z, char amt)
|
||||
{
|
||||
return __sync_fetch_and_sub (z, amt);
|
||||
}
|
||||
21
gcc/testsuite/gcc.target/mips/fix-r10000-3.c
Normal file
21
gcc/testsuite/gcc.target/mips/fix-r10000-3.c
Normal file
@ -0,0 +1,21 @@
|
||||
/* { dg-do compile } */
|
||||
/* { dg-mips-options "-O2 -march=mips4 -mfix-r10000" } */
|
||||
/* { dg-final { scan-assembler-times "\tbeql\t" 3 } } */
|
||||
|
||||
NOMIPS16 int
|
||||
f1 (int *z)
|
||||
{
|
||||
return __sync_fetch_and_or (z, 42);
|
||||
}
|
||||
|
||||
NOMIPS16 short
|
||||
f2 (short *z)
|
||||
{
|
||||
return __sync_fetch_and_or (z, 42);
|
||||
}
|
||||
|
||||
NOMIPS16 char
|
||||
f3 (char *z)
|
||||
{
|
||||
return __sync_fetch_and_or (z, 42);
|
||||
}
|
||||
21
gcc/testsuite/gcc.target/mips/fix-r10000-4.c
Normal file
21
gcc/testsuite/gcc.target/mips/fix-r10000-4.c
Normal file
@ -0,0 +1,21 @@
|
||||
/* { dg-do compile } */
|
||||
/* { dg-mips-options "-O2 -march=mips4 -mfix-r10000" } */
|
||||
/* { dg-final { scan-assembler-times "\tbeql\t" 3 } } */
|
||||
|
||||
NOMIPS16 int
|
||||
f1 (int *z)
|
||||
{
|
||||
return __sync_fetch_and_and (z, 42);
|
||||
}
|
||||
|
||||
NOMIPS16 short
|
||||
f2 (short *z)
|
||||
{
|
||||
return __sync_fetch_and_and (z, 42);
|
||||
}
|
||||
|
||||
NOMIPS16 char
|
||||
f3 (char *z)
|
||||
{
|
||||
return __sync_fetch_and_and (z, 42);
|
||||
}
|
||||
21
gcc/testsuite/gcc.target/mips/fix-r10000-5.c
Normal file
21
gcc/testsuite/gcc.target/mips/fix-r10000-5.c
Normal file
@ -0,0 +1,21 @@
|
||||
/* { dg-do compile } */
|
||||
/* { dg-mips-options "-O2 -march=mips4 -mfix-r10000" } */
|
||||
/* { dg-final { scan-assembler-times "\tbeql\t" 3 } } */
|
||||
|
||||
NOMIPS16 int
|
||||
f1 (int *z)
|
||||
{
|
||||
return __sync_fetch_and_xor (z, 42);
|
||||
}
|
||||
|
||||
NOMIPS16 short
|
||||
f2 (short *z)
|
||||
{
|
||||
return __sync_fetch_and_xor (z, 42);
|
||||
}
|
||||
|
||||
NOMIPS16 char
|
||||
f3 (char *z)
|
||||
{
|
||||
return __sync_fetch_and_xor (z, 42);
|
||||
}
|
||||
21
gcc/testsuite/gcc.target/mips/fix-r10000-6.c
Normal file
21
gcc/testsuite/gcc.target/mips/fix-r10000-6.c
Normal file
@ -0,0 +1,21 @@
|
||||
/* { dg-do compile } */
|
||||
/* { dg-mips-options "-O2 -march=mips4 -mfix-r10000" } */
|
||||
/* { dg-final { scan-assembler-times "\tbeql\t" 3 } } */
|
||||
|
||||
NOMIPS16 int
|
||||
f1 (int *z)
|
||||
{
|
||||
return __sync_fetch_and_nand (z, 42);
|
||||
}
|
||||
|
||||
NOMIPS16 short
|
||||
f2 (short *z)
|
||||
{
|
||||
return __sync_fetch_and_nand (z, 42);
|
||||
}
|
||||
|
||||
NOMIPS16 char
|
||||
f3 (char *z)
|
||||
{
|
||||
return __sync_fetch_and_nand (z, 42);
|
||||
}
|
||||
21
gcc/testsuite/gcc.target/mips/fix-r10000-7.c
Normal file
21
gcc/testsuite/gcc.target/mips/fix-r10000-7.c
Normal file
@ -0,0 +1,21 @@
|
||||
/* { dg-do compile } */
|
||||
/* { dg-mips-options "-O2 -march=mips4 -mfix-r10000" } */
|
||||
/* { dg-final { scan-assembler-times "\tbeql\t" 3 } } */
|
||||
|
||||
NOMIPS16 int
|
||||
f1 (int *z)
|
||||
{
|
||||
return __sync_add_and_fetch (z, 42);
|
||||
}
|
||||
|
||||
NOMIPS16 short
|
||||
f2 (short *z)
|
||||
{
|
||||
return __sync_add_and_fetch (z, 42);
|
||||
}
|
||||
|
||||
NOMIPS16 char
|
||||
f3 (char *z)
|
||||
{
|
||||
return __sync_add_and_fetch (z, 42);
|
||||
}
|
||||
21
gcc/testsuite/gcc.target/mips/fix-r10000-8.c
Normal file
21
gcc/testsuite/gcc.target/mips/fix-r10000-8.c
Normal file
@ -0,0 +1,21 @@
|
||||
/* { dg-do compile } */
|
||||
/* { dg-mips-options "-O2 -march=mips4 -mfix-r10000" } */
|
||||
/* { dg-final { scan-assembler-times "\tbeql\t" 3 } } */
|
||||
|
||||
NOMIPS16 int
|
||||
f1 (int *z, int amt)
|
||||
{
|
||||
return __sync_sub_and_fetch (z, amt);
|
||||
}
|
||||
|
||||
NOMIPS16 short
|
||||
f2 (short *z, short amt)
|
||||
{
|
||||
return __sync_sub_and_fetch (z, amt);
|
||||
}
|
||||
|
||||
NOMIPS16 char
|
||||
f3 (char *z, char amt)
|
||||
{
|
||||
return __sync_sub_and_fetch (z, amt);
|
||||
}
|
||||
21
gcc/testsuite/gcc.target/mips/fix-r10000-9.c
Normal file
21
gcc/testsuite/gcc.target/mips/fix-r10000-9.c
Normal file
@ -0,0 +1,21 @@
|
||||
/* { dg-do compile } */
|
||||
/* { dg-mips-options "-O2 -march=mips4 -mfix-r10000" } */
|
||||
/* { dg-final { scan-assembler-times "\tbeql\t" 3 } } */
|
||||
|
||||
NOMIPS16 int
|
||||
f1 (int *z)
|
||||
{
|
||||
return __sync_or_and_fetch (z, 42);
|
||||
}
|
||||
|
||||
NOMIPS16 short
|
||||
f2 (short *z)
|
||||
{
|
||||
return __sync_or_and_fetch (z, 42);
|
||||
}
|
||||
|
||||
NOMIPS16 char
|
||||
f3 (char *z)
|
||||
{
|
||||
return __sync_or_and_fetch (z, 42);
|
||||
}
|
||||
Loading…
x
Reference in New Issue
Block a user