mirror/gcc
2
0
Fork 0
mirror of git://gcc.gnu.org/git/gcc.git synced 2025-04-23 01:30:29 +08:00
Code Issues Packages Projects Releases Wiki Activity

[MIPS] Fix register renaming in the interrupt handlers.

Browse Source 
gcc/
	* config/mips/mips-protos.h (mips_hard_regno_rename_ok): New prototype.
	* config/mips/mips.c (mips_hard_regno_rename_ok): New function.
	(mips_hard_regno_scratch_ok): Likewise.
	(TARGET_HARD_REGNO_SCRATCH_OK): Define macro.
	* config/mips/mips.h (HARD_REGNO_RENAME_OK): New.

gcc/testsuite/
	* gcc.target/mips/interrupt_handler-bug-1.c: New test.

From-SVN: r226968
This commit is contained in:
Robert Suchanek 2015-08-18 12:42:12 +00:00 committed by Robert Suchanek
parent 7b008bbc0c
commit ec8a2131b6
6 changed files with 57 additions and 0 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

8
gcc/ChangeLog
View File

@ -1,3 +1,11 @@
2015-08-18 Robert Suchanek <robert.suchanek@imgtec.com>
* config/mips/mips-protos.h (mips_hard_regno_rename_ok): New prototype.
* config/mips/mips.c (mips_hard_regno_rename_ok): New function.
(mips_hard_regno_scratch_ok): Likewise.
(TARGET_HARD_REGNO_SCRATCH_OK): Define macro.
* config/mips/mips.h (HARD_REGNO_RENAME_OK): New.
2015-08-18 Bin Cheng <bin.cheng@arm.com>
* tree-ssa-loop-niter.c (refine_value_range_using_guard): New.

1
gcc/config/mips/mips-protos.h
View File

@ -303,6 +303,7 @@ extern const char *mips_output_sync_loop (rtx_insn *, rtx *);
extern unsigned int mips_sync_loop_insns (rtx_insn *, rtx *);
extern const char *mips_output_division (const char *, rtx *);
extern const char *mips_output_probe_stack_range (rtx, rtx);
extern bool mips_hard_regno_rename_ok (unsigned int, unsigned int);
extern unsigned int mips_hard_regno_nregs (int, machine_mode);
extern bool mips_linked_madd_p (rtx_insn *, rtx_insn *);
extern bool mips_store_data_bypass_p (rtx_insn *, rtx_insn *);

30
gcc/config/mips/mips.c
View File

@ -12281,6 +12281,33 @@ mips_hard_regno_mode_ok_p (unsigned int regno, machine_mode mode)
return false;
}
/* Return nonzero if register OLD_REG can be renamed to register NEW_REG. */
bool
mips_hard_regno_rename_ok (unsigned int old_reg ATTRIBUTE_UNUSED,
unsigned int new_reg)
{
/* Interrupt functions can only use registers that have already been
saved by the prologue, even if they would normally be call-clobbered. */
if (cfun->machine->interrupt_handler_p && !df_regs_ever_live_p (new_reg))
return false;
return true;
}
/* Return nonzero if register REGNO can be used as a scratch register
in peephole2. */
bool
mips_hard_regno_scratch_ok (unsigned int regno)
{
/* See mips_hard_regno_rename_ok. */
if (cfun->machine->interrupt_handler_p && !df_regs_ever_live_p (regno))
return false;
return true;
}
/* Implement HARD_REGNO_NREGS. */
unsigned int
@ -19827,6 +19854,9 @@ mips_ira_change_pseudo_allocno_class (int regno, reg_class_t allocno_class)
#undef TARGET_IRA_CHANGE_PSEUDO_ALLOCNO_CLASS
#define TARGET_IRA_CHANGE_PSEUDO_ALLOCNO_CLASS mips_ira_change_pseudo_allocno_class
#undef TARGET_HARD_REGNO_SCRATCH_OK
#define TARGET_HARD_REGNO_SCRATCH_OK mips_hard_regno_scratch_ok
struct gcc_target targetm = TARGET_INITIALIZER;
#include "gt-mips.h"

3
gcc/config/mips/mips.h
View File

@ -1876,6 +1876,9 @@ FP_ASM_SPEC "\
#define HARD_REGNO_MODE_OK(REGNO, MODE) \
mips_hard_regno_mode_ok[ (int)(MODE) ][ (REGNO) ]
#define HARD_REGNO_RENAME_OK(OLD_REG, NEW_REG) \
mips_hard_regno_rename_ok (OLD_REG, NEW_REG)
/* Select a register mode required for caller save of hard regno REGNO. */
#define HARD_REGNO_CALLER_SAVE_MODE(REGNO, NREGS, MODE) \
mips_hard_regno_caller_save_mode (REGNO, NREGS, MODE)

4
gcc/testsuite/ChangeLog
View File

@ -1,3 +1,7 @@
2015-08-18 Robert Suchanek <robert.suchanek@imgtec.com>
* gcc.target/mips/interrupt_handler-bug-1.c: New test.
2015-08-18 Bin Cheng <bin.cheng@arm.com>
* gcc.dg/tree-ssa/loop-bound-1.c: New test.

11
gcc/testsuite/gcc.target/mips/interrupt_handler-bug-1.c Normal file
View File

@ -0,0 +1,11 @@
/* { dg-options "-funroll-loops" } */
int foo;
int bar;
void __attribute__ ((interrupt))
isr (void)
{
if (!foo)
while (bar & 0xFF30);
}
/* { dg-final { scan-assembler-not "^isr:.*\\\$8.*isr" } } */