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mips.md (*divsf3): Move description of SB-1 F2 erratum from here to...
2003-10-05 Chris Demetriou <cgd@broadcom.com> * config/mips/mips.md (*divsf3): Move description of SB-1 F2 erratum from here to... (divsf3): Here. Disable if TARGET_FIX_SB1 is set and flag_unsafe_math_optimizations is not. From-SVN: r72123
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@ -1,3 +1,10 @@
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2003-10-05 Chris Demetriou <cgd@broadcom.com>
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* config/mips/mips.md (*divsf3): Move description of
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SB-1 F2 erratum from here to...
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(divsf3): Here. Disable if TARGET_FIX_SB1 is set and
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flag_unsafe_math_optimizations is not.
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2003-10-05 Aldy Hernandez <aldyh@redhat.com>
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* config/rs6000/linuxspe.h: Define TARGET_SPE_ABI, TARGET_SPE,
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@ -2407,11 +2407,19 @@
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(const_int 4)))])
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;; This pattern works around the early SB-1 rev2 core "F2" erratum:
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;;
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;; In certain cases, div.s and div.ps may have a rounding error
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;; and/or wrong inexact flag.
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;;
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;; Therefore, we only allow div.s if not working around SB-1 rev2
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;; errata, or if working around those errata and a slight loss of
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;; precision is OK (i.e., flag_unsafe_math_optimizations is set).
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(define_expand "divsf3"
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[(set (match_operand:SF 0 "register_operand" "")
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(div:SF (match_operand:SF 1 "reg_or_const_float_1_operand" "")
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(match_operand:SF 2 "register_operand" "")))]
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"TARGET_HARD_FLOAT"
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"TARGET_HARD_FLOAT && (!TARGET_FIX_SB1 || flag_unsafe_math_optimizations)"
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{
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if (const_float_1_operand (operands[1], SFmode))
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if (!(ISA_HAS_FP4 && flag_unsafe_math_optimizations))
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@ -2421,14 +2429,8 @@
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;; This pattern works around the early SB-1 rev2 core "F1" erratum (see
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;; "divdf3" comment for details).
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;;
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;; This pattern works around the early SB-1 rev2 core "F2" erratum:
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;;
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;; In certain cases, div.s and div.ps may have a rounding error
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;; and/or wrong inexact flag.
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;;
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;; Therefore, we only allow div.s if not working around SB-1 rev2
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;; errata, or if working around those errata and a slight loss of
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;; precision is OK (i.e., flag_unsafe_math_optimizations is set).
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;; This pattern works around the early SB-1 rev2 core "F2" erratum (see
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;; "divsf3" comment for details).
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(define_insn "*divsf3"
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[(set (match_operand:SF 0 "register_operand" "=f")
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(div:SF (match_operand:SF 1 "register_operand" "f")
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