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[MCORE] Hookize GO_IF_LEGITIMATE_ADDRESS
From-SVN: r229561
This commit is contained in:
Anatoly Sokolov
Anatoly Sokolov
parent
334b4842a2
commit
e7c6980e55
@ -1,3 +1,13 @@
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2015-08-29 Anatoly Sokolov <aesok@post.ru>
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* config/mcore/mcore.h (REG_OK_FOR_BASE_P, REG_OK_FOR_INDEX_P,
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BASE_REGISTER_RTX_P, INDEX_REGISTER_RTX_P,
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GO_IF_LEGITIMATE_ADDRESS): Remove macros.
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* config/mcore/mcore.c (mcore_reg_ok_for_base_p,
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mcore_base_register_rtx_p, mcore_legitimate_index_p,
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mcore_legitimate_address_p): New functions.
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(TARGET_ADDR_SPACE_LEGITIMATE_ADDRESS_P): Define.
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2015-10-29 Jeff Law <law@redhat.com>
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* tree-ssa-scopedtables.h (const_and_copies): Remove invalidate
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@ -139,6 +139,8 @@ static void mcore_trampoline_init (rtx, tree, rtx);
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static bool mcore_warn_func_return (tree);
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static void mcore_option_override (void);
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static bool mcore_legitimate_constant_p (machine_mode, rtx);
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static bool mcore_legitimate_address_p (machine_mode, rtx, bool,
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addr_space_t);
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/* MCore specific attributes. */
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@ -226,6 +228,8 @@ static const struct attribute_spec mcore_attribute_table[] =
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#undef TARGET_LEGITIMATE_CONSTANT_P
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#define TARGET_LEGITIMATE_CONSTANT_P mcore_legitimate_constant_p
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#undef TARGET_ADDR_SPACE_LEGITIMATE_ADDRESS_P
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#define TARGET_ADDR_SPACE_LEGITIMATE_ADDRESS_P mcore_legitimate_address_p
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#undef TARGET_WARN_FUNC_RETURN
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#define TARGET_WARN_FUNC_RETURN mcore_warn_func_return
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@ -3179,3 +3183,74 @@ mcore_legitimate_constant_p (machine_mode mode ATTRIBUTE_UNUSED, rtx x)
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{
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return GET_CODE (x) != CONST_DOUBLE;
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}
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/* Helper function for `mcore_legitimate_address_p'. */
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static bool
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mcore_reg_ok_for_base_p (const_rtx reg, bool strict_p)
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{
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if (strict_p)
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return REGNO_OK_FOR_BASE_P (REGNO (reg));
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else
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return (REGNO (reg) <= 16 || !HARD_REGISTER_P (reg));
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}
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static bool
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mcore_base_register_rtx_p (const_rtx x, bool strict_p)
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{
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return REG_P(x) && mcore_reg_ok_for_base_p (x, strict_p);
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}
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/* A legitimate index for a QI is 0..15, for HI is 0..30, for SI is 0..60,
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and for DI is 0..56 because we use two SI loads, etc. */
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static bool
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mcore_legitimate_index_p (machine_mode mode, const_rtx op)
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{
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if (CONST_INT_P (op))
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{
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if (GET_MODE_SIZE (mode) >= 4
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&& (((unsigned HOST_WIDE_INT) INTVAL (op)) % 4) == 0
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&& ((unsigned HOST_WIDE_INT) INTVAL (op))
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<= (unsigned HOST_WIDE_INT) 64 - GET_MODE_SIZE (mode))
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return true;
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if (GET_MODE_SIZE (mode) == 2
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&& (((unsigned HOST_WIDE_INT) INTVAL (op)) % 2) == 0
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&& ((unsigned HOST_WIDE_INT) INTVAL (op)) <= 30)
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return true;
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if (GET_MODE_SIZE (mode) == 1
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&& ((unsigned HOST_WIDE_INT) INTVAL (op)) <= 15)
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return true;
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}
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return false;
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}
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/* Worker function for TARGET_ADDR_SPACE_LEGITIMATE_ADDRESS_P.
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Allow REG
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REG + disp */
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static bool
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mcore_legitimate_address_p (machine_mode mode, rtx x, bool strict_p,
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addr_space_t as)
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{
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gcc_assert (ADDR_SPACE_GENERIC_P (as));
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if (mcore_base_register_rtx_p (x, strict_p))
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return true;
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else if (GET_CODE (x) == PLUS || GET_CODE (x) == LO_SUM)
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{
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rtx xop0 = XEXP (x, 0);
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rtx xop1 = XEXP (x, 1);
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if (mcore_base_register_rtx_p (xop0, strict_p)
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&& mcore_legitimate_index_p (mode, xop1))
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return true;
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if (mcore_base_register_rtx_p (xop1, strict_p)
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&& mcore_legitimate_index_p (mode, xop0))
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return true;
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}
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return false;
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}
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@ -529,91 +529,6 @@ extern const enum reg_class regno_reg_class[FIRST_PSEUDO_REGISTER];
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/* Recognize any constant value that is a valid address. */
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#define CONSTANT_ADDRESS_P(X) (GET_CODE (X) == LABEL_REF)
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/* The macros REG_OK_FOR..._P assume that the arg is a REG rtx
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and check its validity for a certain class.
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We have two alternate definitions for each of them.
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The usual definition accepts all pseudo regs; the other rejects
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them unless they have been allocated suitable hard regs.
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The symbol REG_OK_STRICT causes the latter definition to be used. */
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#ifndef REG_OK_STRICT
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/* Nonzero if X is a hard reg that can be used as a base reg
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or if it is a pseudo reg. */
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#define REG_OK_FOR_BASE_P(X) \
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(REGNO (X) <= 16 || REGNO (X) >= FIRST_PSEUDO_REGISTER)
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/* Nonzero if X is a hard reg that can be used as an index
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or if it is a pseudo reg. */
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#define REG_OK_FOR_INDEX_P(X) 0
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#else
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/* Nonzero if X is a hard reg that can be used as a base reg. */
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#define REG_OK_FOR_BASE_P(X) \
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REGNO_OK_FOR_BASE_P (REGNO (X))
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/* Nonzero if X is a hard reg that can be used as an index. */
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#define REG_OK_FOR_INDEX_P(X) 0
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#endif
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/* GO_IF_LEGITIMATE_ADDRESS recognizes an RTL expression
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that is a valid memory address for an instruction.
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The MODE argument is the machine mode for the MEM expression
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that wants to use this address.
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The other macros defined here are used only in GO_IF_LEGITIMATE_ADDRESS. */
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#define BASE_REGISTER_RTX_P(X) \
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(GET_CODE (X) == REG && REG_OK_FOR_BASE_P (X))
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#define INDEX_REGISTER_RTX_P(X) \
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(GET_CODE (X) == REG && REG_OK_FOR_INDEX_P (X))
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/* Jump to LABEL if X is a valid address RTX. This must also take
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REG_OK_STRICT into account when deciding about valid registers, but it uses
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the above macros so we are in luck.
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Allow REG
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REG+disp
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A legitimate index for a QI is 0..15, for HI is 0..30, for SI is 0..60,
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and for DI is 0..56 because we use two SI loads, etc. */
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#define GO_IF_LEGITIMATE_INDEX(MODE, REGNO, OP, LABEL) \
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do \
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{ \
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if (GET_CODE (OP) == CONST_INT) \
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{ \
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if (GET_MODE_SIZE (MODE) >= 4 \
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&& (((unsigned HOST_WIDE_INT) INTVAL (OP)) % 4) == 0 \
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&& ((unsigned HOST_WIDE_INT) INTVAL (OP)) \
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<= (unsigned HOST_WIDE_INT) 64 - GET_MODE_SIZE (MODE)) \
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goto LABEL; \
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if (GET_MODE_SIZE (MODE) == 2 \
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&& (((unsigned HOST_WIDE_INT) INTVAL (OP)) % 2) == 0 \
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&& ((unsigned HOST_WIDE_INT) INTVAL (OP)) <= 30) \
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goto LABEL; \
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if (GET_MODE_SIZE (MODE) == 1 \
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&& ((unsigned HOST_WIDE_INT) INTVAL (OP)) <= 15) \
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goto LABEL; \
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} \
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} \
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while (0)
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#define GO_IF_LEGITIMATE_ADDRESS(MODE, X, LABEL) \
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{ \
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if (BASE_REGISTER_RTX_P (X)) \
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goto LABEL; \
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else if (GET_CODE (X) == PLUS || GET_CODE (X) == LO_SUM) \
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{ \
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rtx xop0 = XEXP (X,0); \
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rtx xop1 = XEXP (X,1); \
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if (BASE_REGISTER_RTX_P (xop0)) \
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GO_IF_LEGITIMATE_INDEX (MODE, REGNO (xop0), xop1, LABEL); \
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if (BASE_REGISTER_RTX_P (xop1)) \
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GO_IF_LEGITIMATE_INDEX (MODE, REGNO (xop1), xop0, LABEL); \
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} \
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}
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/* Specify the machine mode that this machine uses
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for the index in the tablejump instruction. */
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#define CASE_VECTOR_MODE SImode
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