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sh.c (dump_table): handle SFmode and DFmode.
* sh.c (dump_table): handle SFmode and DFmode. (broken_move): handle simple PARALLEL. (machine_dependent_reorg, pc-relative move generation): Likewise. From-SVN: r13021
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@ -1694,6 +1694,7 @@ dump_table (scan)
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case HImode:
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case HImode:
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break;
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break;
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case SImode:
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case SImode:
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case SFmode:
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if (need_align)
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if (need_align)
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{
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{
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need_align = 0;
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need_align = 0;
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@ -1703,6 +1704,7 @@ dump_table (scan)
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scan = emit_label_after (p->label, scan);
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scan = emit_label_after (p->label, scan);
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scan = emit_insn_after (gen_consttable_4 (p->value), scan);
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scan = emit_insn_after (gen_consttable_4 (p->value), scan);
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break;
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break;
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case DFmode:
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case DImode:
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case DImode:
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if (need_align)
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if (need_align)
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{
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{
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@ -1746,21 +1748,26 @@ static int
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broken_move (insn)
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broken_move (insn)
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rtx insn;
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rtx insn;
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{
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{
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if (GET_CODE (insn) == INSN
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if (GET_CODE (insn) == INSN)
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&& GET_CODE (PATTERN (insn)) == SET
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{
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/* We can load any 8 bit value if we don't care what the high
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rtx pat = PATTERN (insn);
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order bits end up as. */
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if (GET_CODE (pat) == PARALLEL)
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&& GET_MODE (SET_DEST (PATTERN (insn))) != QImode
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pat = XVECEXP (pat, 0, 0);
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&& CONSTANT_P (SET_SRC (PATTERN (insn)))
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if (GET_CODE (pat) == SET
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&& ! (GET_CODE (SET_SRC (PATTERN (insn))) == CONST_DOUBLE
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/* We can load any 8 bit value if we don't care what the high
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&& (fp_zero_operand (SET_SRC (PATTERN (insn)))
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order bits end up as. */
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|| fp_one_operand (SET_SRC (PATTERN (insn))))
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&& GET_MODE (SET_DEST (pat)) != QImode
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&& GET_CODE (SET_DEST (PATTERN (insn))) == REG
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&& CONSTANT_P (SET_SRC (pat))
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&& REGNO (SET_DEST (PATTERN (insn))) >= FIRST_FP_REG
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&& ! (GET_CODE (SET_SRC (pat)) == CONST_DOUBLE
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&& REGNO (SET_DEST (PATTERN (insn))) <= LAST_FP_REG)
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&& (fp_zero_operand (SET_SRC (pat))
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&& (GET_CODE (SET_SRC (PATTERN (insn))) != CONST_INT
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|| fp_one_operand (SET_SRC (pat)))
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|| ! CONST_OK_FOR_I (INTVAL (SET_SRC (PATTERN (insn))))))
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&& GET_CODE (SET_DEST (pat)) == REG
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return 1;
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&& REGNO (SET_DEST (pat)) >= FIRST_FP_REG
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&& REGNO (SET_DEST (pat)) <= LAST_FP_REG)
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&& (GET_CODE (SET_SRC (pat)) != CONST_INT
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|| ! CONST_OK_FOR_I (INTVAL (SET_SRC (pat)))))
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return 1;
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}
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return 0;
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return 0;
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}
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}
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@ -2306,13 +2313,18 @@ machine_dependent_reorg (first)
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{
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{
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if (broken_move (scan))
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if (broken_move (scan))
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{
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{
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rtx pat = PATTERN (scan);
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rtx *patp = &PATTERN (scan), pat = *patp;
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rtx src = SET_SRC (pat);
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rtx src, dst;
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rtx dst = SET_DEST (pat);
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enum machine_mode mode = GET_MODE (dst);
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rtx lab;
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rtx lab;
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rtx newinsn;
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rtx newinsn;
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rtx newsrc;
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rtx newsrc;
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enum machine_mode mode;
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if (GET_CODE (pat) == PARALLEL)
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patp = &XVECEXP (pat, 0, 0), pat = *patp;
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src = SET_SRC (pat);
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dst = SET_DEST (pat);
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mode = GET_MODE (dst);
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if (mode == SImode && hi_const (src))
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if (mode == SImode && hi_const (src))
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{
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{
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@ -2331,22 +2343,8 @@ machine_dependent_reorg (first)
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newsrc = gen_rtx (MEM, mode,
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newsrc = gen_rtx (MEM, mode,
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gen_rtx (LABEL_REF, VOIDmode, lab));
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gen_rtx (LABEL_REF, VOIDmode, lab));
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RTX_UNCHANGING_P (newsrc) = 1;
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RTX_UNCHANGING_P (newsrc) = 1;
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newinsn = emit_insn_after (gen_rtx (SET, VOIDmode,
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*patp = gen_rtx (SET, VOIDmode, dst, newsrc);
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dst, newsrc), scan);
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INSN_CODE (scan) = -1;
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REG_NOTES (newinsn) = REG_NOTES (scan);
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REG_NOTES (scan) = NULL_RTX;
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/* If not optimizing, then delete_insn doesn't remove the
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insn from the chain, and hence is not useful. We
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convert the instruction to a NOTE in that case. */
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if (optimize)
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delete_insn (scan);
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else
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{
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PUT_CODE (scan, NOTE);
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NOTE_LINE_NUMBER (scan) = NOTE_INSN_DELETED;
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NOTE_SOURCE_FILE (insn) = 0;
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}
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scan = newinsn;
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}
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}
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}
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}
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dump_table (barrier);
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dump_table (barrier);
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