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invoke.texi: Clean up "n-bit/byte/word" modifiers.
2012-02-15 Sandra Loosemore <sandra@codesourcery.com> gcc/ * doc/invoke.texi: Clean up "n-bit/byte/word" modifiers. From-SVN: r184291
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@ -1,3 +1,7 @@
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2012-02-15 Sandra Loosemore <sandra@codesourcery.com>
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* doc/invoke.texi: Clean up "n-bit/byte/word" modifiers.
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2012-02-15 Michael Meissner <meissner@linux.vnet.ibm.com>
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PR target/52199
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@ -10440,7 +10440,7 @@ for direct calls. The default is @option{-mlong-calls}.
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@item -msmall16
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@opindex msmall16
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Assume addresses can be loaded as 16 bit unsigned values. This does not
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Assume addresses can be loaded as 16-bit unsigned values. This does not
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apply to function addresses for which @option{-mlong-calls} semantics
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are in effect.
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@ -10487,8 +10487,8 @@ The default is @option{-mfp-mode=caller}
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@opindex mno-postinc
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@item -mno-postmodify
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@opindex mno-postmodify
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Code generation tweaks that disable, respectively, splitting of 32
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bit loads, generation of post-increment addresses, and generation of
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Code generation tweaks that disable, respectively, splitting of 32-bit
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loads, generation of post-increment addresses, and generation of
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post-modify addresses. The defaults are @option{msplit-lohi},
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@option{-mpost-inc}, and @option{-mpost-modify}.
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@ -10903,7 +10903,7 @@ this option and always use the original scheme.
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@item -mword-relocations
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@opindex mword-relocations
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Only generate absolute relocations on word sized values (i.e. R_ARM_ABS32).
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Only generate absolute relocations on word-sized values (i.e. R_ARM_ABS32).
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This is enabled by default on targets (uClinux, SymbianOS) where the runtime
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loader imposes this restriction, and when @option{-fpic} or @option{-fPIC}
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is specified.
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@ -11021,7 +11021,7 @@ subroutines. Code size will be smaller.
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@item -mint8
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@opindex mint8
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Assume int to be 8 bit integer. This affects the sizes of all types: A
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Assume int to be 8-bit integer. This affects the sizes of all types: a
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char will be 1 byte, an int will be 1 byte, a long will be 2 bytes
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and long long will be 4 bytes. Please note that this option does not
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comply to the C standards, but it will provide you with smaller code
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@ -11251,7 +11251,7 @@ with up to 128@tie{}KiB of program memory.
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@item __AVR_HAVE_8BIT_SP__
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@item __AVR_HAVE_16BIT_SP__
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The stack pointer (SP) is 8@tie{}bits resp. 16@tie{}bits wide.
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The stack pointer (SP) is respectively 8 or 16 bits wide.
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The definition of these macros is affected by @code{-mtiny-stack}.
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@item __NO_INTERRUPTS__
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@ -11410,7 +11410,7 @@ This is the default.
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Tells the compiler to perform function calls by first loading the
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address of the function into a register and then performing a subroutine
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call on this register. This switch is needed if the target function
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will lie outside of the 24 bit addressing range of the offset based
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lies outside of the 24-bit addressing range of the offset-based
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version of subroutine call instruction.
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This feature is not enabled by default. Specifying
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@ -12312,7 +12312,7 @@ routine for the debugger.
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@item -mmalloc64
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@opindex mmalloc64
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Default to 64bit memory allocation routines.
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Default to 64-bit memory allocation routines.
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@end table
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@node FR30 Options
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@ -12730,9 +12730,9 @@ Make @code{int} data 32 bits by default.
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@item -malign-300
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@opindex malign-300
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On the H8/300H and H8S, use the same alignment rules as for the H8/300.
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The default for the H8/300H and H8S is to align longs and floats on 4
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byte boundaries.
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@option{-malign-300} causes them to be aligned on 2 byte boundaries.
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The default for the H8/300H and H8S is to align longs and floats on
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4-byte boundaries.
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@option{-malign-300} causes them to be aligned on 2-byte boundaries.
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This option has no effect on the H8/300.
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@end table
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@ -12869,7 +12869,7 @@ are passed to that ld. The ld that is called is determined by the
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@option{--with-ld} configure option, GCC's program search path, and
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finally by the user's @env{PATH}. The linker used by GCC can be printed
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using @samp{which `gcc -print-prog-name=ld`}. This option is only available
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on the 64 bit HP-UX GCC, i.e.@: configured with @samp{hppa*64*-*-hpux*}.
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on the 64-bit HP-UX GCC, i.e.@: configured with @samp{hppa*64*-*-hpux*}.
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@item -mhp-ld
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@opindex mhp-ld
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@ -12881,7 +12881,7 @@ which ld is called, it only changes what parameters are passed to that
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ld. The ld that is called is determined by the @option{--with-ld}
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configure option, GCC's program search path, and finally by the user's
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@env{PATH}. The linker used by GCC can be printed using @samp{which
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`gcc -print-prog-name=ld`}. This option is only available on the 64 bit
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`gcc -print-prog-name=ld`}. This option is only available on the 64-bit
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HP-UX GCC, i.e.@: configured with @samp{hppa*64*-*-hpux*}.
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@item -mlong-calls
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@ -13140,7 +13140,7 @@ effective. For the x86-64 compiler, these extensions are enabled by default.
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The resulting code should be considerably faster in the majority of cases and avoid
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the numerical instability problems of 387 code, but may break some existing
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code that expects temporaries to be 80bit.
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code that expects temporaries to be 80 bits.
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This is the default choice for the x86-64 compiler.
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@ -13209,9 +13209,9 @@ instructions are not generated unless you also use the
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@opindex malign-double
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@opindex mno-align-double
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Control whether GCC aligns @code{double}, @code{long double}, and
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@code{long long} variables on a two word boundary or a one word
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boundary. Aligning @code{double} variables on a two word boundary will
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produce code that runs somewhat faster on a @samp{Pentium} at the
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@code{long long} variables on a two-word boundary or a one-word
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boundary. Aligning @code{double} variables on a two-word boundary
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produces code that runs somewhat faster on a @samp{Pentium} at the
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expense of more memory.
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On x86-64, @option{-malign-double} is enabled by default.
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@ -13228,17 +13228,17 @@ without that switch.
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@opindex m128bit-long-double
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These switches control the size of @code{long double} type. The i386
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application binary interface specifies the size to be 96 bits,
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so @option{-m96bit-long-double} is the default in 32 bit mode.
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so @option{-m96bit-long-double} is the default in 32-bit mode.
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Modern architectures (Pentium and newer) would prefer @code{long double}
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to be aligned to an 8 or 16 byte boundary. In arrays or structures
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conforming to the ABI, this would not be possible. So specifying a
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@option{-m128bit-long-double} will align @code{long double}
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to a 16 byte boundary by padding the @code{long double} with an additional
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32 bit zero.
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Modern architectures (Pentium and newer) prefer @code{long double}
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to be aligned to an 8- or 16-byte boundary. In arrays or structures
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conforming to the ABI, this is not possible. So specifying
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@option{-m128bit-long-double} aligns @code{long double}
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to a 16-byte boundary by padding the @code{long double} with an additional
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32-bit zero.
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In the x86-64 compiler, @option{-m128bit-long-double} is the default choice as
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its ABI specifies that @code{long double} is to be aligned on 16 byte boundary.
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its ABI specifies that @code{long double} is to be aligned on 16-byte boundary.
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Notice that neither of these options enable any extra precision over the x87
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standard of 80 bits for a @code{long double}.
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@ -13361,10 +13361,10 @@ boundary. If @option{-mincoming-stack-boundary} is not specified,
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the one specified by @option{-mpreferred-stack-boundary} will be used.
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On Pentium and PentiumPro, @code{double} and @code{long double} values
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should be aligned to an 8 byte boundary (see @option{-malign-double}) or
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should be aligned to an 8-byte boundary (see @option{-malign-double}) or
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suffer significant run time performance penalties. On Pentium III, the
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Streaming SIMD Extension (SSE) data type @code{__m128} may not work
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properly if it is not 16 byte aligned.
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properly if it is not 16-byte aligned.
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To ensure proper alignment of this values on the stack, the stack boundary
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must be as aligned as that required by any value stored on the stack.
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@ -13625,8 +13625,9 @@ but GCC doesn't know about it.
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@item -minline-all-stringops
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@opindex minline-all-stringops
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By default GCC inlines string operations only when destination is known to be
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aligned at least to 4 byte boundary. This enables more inlining, increase code
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By default GCC inlines string operations only when the destination is
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known to be aligned to least a 4-byte boundary.
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This enables more inlining, increase code
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size, but may improve performance of code that depends on fast memcpy, strlen
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and memset for short lengths.
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@ -14118,7 +14119,7 @@ routine for the debugger.
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@item -mmalloc64
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@opindex mmalloc64
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Default to 64bit memory allocation routines.
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Default to 64-bit memory allocation routines.
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@end table
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@node LM32 Options
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@ -14727,7 +14728,7 @@ Always treat bit-fields as int-sized.
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@itemx -mno-4byte-functions
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@opindex m4byte-functions
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@opindex mno-4byte-functions
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Force all functions to be aligned to a four byte boundary.
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Force all functions to be aligned to a 4-byte boundary.
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@item -mcallgraph-data
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@itemx -mno-callgraph-data
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@ -14795,7 +14796,7 @@ registers.
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@opindex mbased=
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Variables of size @var{n} bytes or smaller will be placed in the
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@code{.based} section by default. Based variables use the @code{$tp}
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register as a base register, and there is a 128 byte limit to the
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register as a base register, and there is a 128-byte limit to the
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@code{.based} section.
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@item -mbitops
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@ -14895,7 +14896,7 @@ low-overhead looping.
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@item -ms
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@opindex ms
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Causes all variables to default to the @code{.tiny} section. Note
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that there is a 65536 byte limit to this section. Accesses to these
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that there is a 65536-byte limit to this section. Accesses to these
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variables use the @code{%gp} base register.
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@item -msatur
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@ -14927,7 +14928,7 @@ this option, functions default to the @code{.near} section.
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Variables that are @var{n} bytes or smaller will be allocated to the
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@code{.tiny} section. These variables use the @code{$gp} base
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register. The default for this option is 4, but note that there's a
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65536 byte limit to the @code{.tiny} section.
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65536-byte limit to the @code{.tiny} section.
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@end table
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@ -16748,9 +16749,9 @@ and unions that contain bit-fields to be aligned to the base type of the
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bit-field.
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For example, by default a structure containing nothing but 8
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@code{unsigned} bit-fields of length 1 would be aligned to a 4 byte
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boundary and have a size of 4 bytes. By using @option{-mno-bit-align},
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the structure would be aligned to a 1 byte boundary and be one byte in
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@code{unsigned} bit-fields of length 1 is aligned to a 4-byte
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boundary and has a size of 4 bytes. By using @option{-mno-bit-align},
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the structure is aligned to a 1-byte boundary and is 1 byte in
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size.
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@item -mno-strict-align
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@ -16771,7 +16772,7 @@ PowerPC system loader should relocate the entire contents of
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a table of 32-bit addresses generated by this option. For this to
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work, all objects linked together must be compiled with
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@option{-mrelocatable} or @option{-mrelocatable-lib}.
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@option{-mrelocatable} code aligns the stack to an 8 byte boundary.
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@option{-mrelocatable} code aligns the stack to an 8-byte boundary.
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@item -mrelocatable-lib
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@itemx -mno-relocatable-lib
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@ -16987,11 +16988,11 @@ header to indicate that @samp{eabi} extended relocations are used.
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On System V.4 and embedded PowerPC systems do (do not) adhere to the
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Embedded Applications Binary Interface (eabi) which is a set of
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modifications to the System V.4 specifications. Selecting @option{-meabi}
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means that the stack is aligned to an 8 byte boundary, a function
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means that the stack is aligned to an 8-byte boundary, a function
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@code{__eabi} is called to from @code{main} to set up the eabi
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environment, and the @option{-msdata} option can use both @code{r2} and
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@code{r13} to point to two separate small data areas. Selecting
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@option{-mno-eabi} means that the stack is aligned to a 16 byte boundary,
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@option{-mno-eabi} means that the stack is aligned to a 16-byte boundary,
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do not call an initialization function from @code{main}, and the
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@option{-msdata} option will only use @code{r13} to point to a single
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small data area. The @option{-meabi} option is on by default if you
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@ -17201,7 +17202,7 @@ the floating-point number is too large to fit in an integer.
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@opindex mpointers-to-nested-functions
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Generate (do not generate) code to load up the static chain register
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(@var{r11}) when calling through a pointer on AIX and 64-bit Linux
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systems where a function pointer points to a 3 word descriptor giving
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systems where a function pointer points to a 3-word descriptor giving
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the function address, TOC value to be loaded in register @var{r2}, and
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static chain value to be loaded in register @var{r11}. The
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@option{-mpointers-to-nested-functions} is on by default. You will
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@ -17425,7 +17426,7 @@ instructions. This is the default for @option{-march=z9-ec} or higher.
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@opindex mlong-double-64
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@opindex mlong-double-128
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These switches control the size of @code{long double} type. A size
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of 64bit makes the @code{long double} type equivalent to the @code{double}
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of 64 bits makes the @code{long double} type equivalent to the @code{double}
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type. This is the default.
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@item -mbackchain
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@ -17779,7 +17780,7 @@ Mark the @code{MAC} register as call-clobbered, even if
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@opindex mieee
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Increase IEEE compliance of floating-point code.
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At the moment, this is equivalent to @option{-fno-finite-math-only}.
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When generating 16 bit SH opcodes, getting IEEE-conforming results for
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When generating 16-bit SH opcodes, getting IEEE-conforming results for
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comparisons of NANs / infinities incurs extra overhead in every
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floating-point comparison, therefore the default is set to
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@option{-ffinite-math-only}.
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@ -17878,7 +17879,7 @@ needed for unwinding to avoid changing the stack frame around conditional code.
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@item -mdivsi3_libfunc=@var{name}
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@opindex mdivsi3_libfunc=@var{name}
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Set the name of the library function used for 32 bit signed division to
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Set the name of the library function used for 32-bit signed division to
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@var{name}. This only affect the name used in the call and inv:call
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division strategies, and the compiler will still expect the same
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sets of input/output/clobbered registers as if this option was not present.
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@ -17900,12 +17901,12 @@ TARGET_ADJUST_UNROLL_MAX target hook.
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@item -mindexed-addressing
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@opindex mindexed-addressing
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Enable the use of the indexed addressing mode for SHmedia32/SHcompact.
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This is only safe if the hardware and/or OS implement 32 bit wrap-around
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This is only safe if the hardware and/or OS implement 32-bit wrap-around
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semantics for the indexed addressing mode. The architecture allows the
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implementation of processors with 64 bit MMU, which the OS could use to
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get 32 bit addressing, but since no current hardware implementation supports
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implementation of processors with 64-bit MMU, which the OS could use to
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get 32-bit addressing, but since no current hardware implementation supports
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this or any other way to make the indexed addressing mode safe to use in
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the 32 bit ABI, the default is -mno-indexed-addressing.
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the 32-bit ABI, the default is @option{-mno-indexed-addressing}.
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@item -mgettrcost=@var{number}
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@opindex mgettrcost=@var{number}
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@ -18059,11 +18060,11 @@ this is much slower than calling the ABI library routines. Thus the
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@itemx -munaligned-doubles
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@opindex mno-unaligned-doubles
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@opindex munaligned-doubles
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Assume that doubles have 8 byte alignment. This is the default.
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Assume that doubles have 8-byte alignment. This is the default.
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With @option{-munaligned-doubles}, GCC assumes that doubles have 8 byte
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With @option{-munaligned-doubles}, GCC assumes that doubles have 8-byte
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alignment only if they are contained in another type, or if they have an
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absolute address. Otherwise, it assumes they have 4 byte alignment.
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absolute address. Otherwise, it assumes they have 4-byte alignment.
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Specifying this option avoids some rare compatibility problems with code
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generated by other compilers. It is not the default because it results
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in a performance loss, especially for floating-point code.
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@ -18073,7 +18074,7 @@ in a performance loss, especially for floating-point code.
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@opindex mno-faster-structs
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@opindex mfaster-structs
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With @option{-mfaster-structs}, the compiler assumes that structures
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should have 8 byte alignment. This enables the use of pairs of
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should have 8-byte alignment. This enables the use of pairs of
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@code{ldd} and @code{std} instructions for copies in structure
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assignment, in place of twice as many @code{ld} and @code{st} pairs.
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However, the use of this changed alignment directly violates the SPARC
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@ -18181,7 +18182,7 @@ native Solaris and GNU/Linux toolchains, @samp{native} can also be used.
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@opindex mno-v8plus
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With @option{-mv8plus}, GCC generates code for the SPARC-V8+ ABI@. The
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difference from the V8 ABI is that the global and out registers are
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considered 64-bit wide. This is enabled by default on Solaris in 32-bit
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considered 64 bits wide. This is enabled by default on Solaris in 32-bit
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mode for all SPARC-V9 processors.
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@item -mvis
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@ -18364,7 +18365,7 @@ or to make an object a little bit smaller.
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By default, GCC generates code assuming that addresses are never larger
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than 18 bits. With @option{-mlarge-mem} code is generated that assumes
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a full 32 bit address.
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a full 32-bit address.
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@item -mstdmain
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@opindex mstdmain
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@ -19388,8 +19389,8 @@ field's type, aligned to a natural alignment if possible. For
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example, targets with memory-mapped peripheral registers might require
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all such accesses to be 16 bits wide; with this flag the user could
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declare all peripheral bitfields as ``unsigned short'' (assuming short
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is 16 bits on these targets) to force GCC to use 16 bit accesses
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instead of, perhaps, a more efficient 32 bit access.
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is 16 bits on these targets) to force GCC to use 16-bit accesses
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instead of, perhaps, a more efficient 32-bit access.
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If this option is disabled, the compiler will use the most efficient
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instruction. In the previous example, that might be a 32-bit load
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