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(movsicc,movhicc): Allow reload from memory.
From-SVN: r12682
This commit is contained in:
parent
be98e7093c
commit
e120e048d6
@ -6744,10 +6744,11 @@
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(define_expand "movsicc"
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[(match_dup 4)
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(set (match_operand 0 "register_operand" "")
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(parallel [(set (match_operand 0 "register_operand" "")
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(if_then_else:SI (match_operand 1 "comparison_operator" "")
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(match_operand:SI 2 "general_operand" "")
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(match_operand:SI 3 "general_operand" "")))]
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(match_operand:SI 3 "general_operand" "")))
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(clobber (match_scratch:SI 4 "=&r"))])]
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"TARGET_CMOVE"
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"
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{
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@ -6756,10 +6757,11 @@
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(define_expand "movhicc"
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[(match_dup 4)
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(set (match_operand 0 "register_operand" "")
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(parallel [(set (match_operand 0 "register_operand" "")
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(if_then_else:HI (match_operand 1 "comparison_operator" "")
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(match_operand:HI 2 "general_operand" "")
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(match_operand:HI 3 "general_operand" "")))]
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(match_operand:HI 3 "general_operand" "")))
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(clobber (match_scratch:SI 4 "=&r"))])]
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"TARGET_CMOVE"
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"
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{
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@ -6767,11 +6769,12 @@
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}")
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(define_insn "movsicc_1"
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[(set (match_operand:SI 0 "register_operand" "=r,r,&r")
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[(set (match_operand:SI 0 "nonimmediate_operand" "=r,r,&r,rm")
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(if_then_else:SI (match_operator 1 "comparison_operator"
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[(cc0) (const_int 0)])
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(match_operand:SI 2 "nonimmediate_operand" "rm,0,rm")
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(match_operand:SI 3 "nonimmediate_operand" "0,rm,rm")))]
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(match_operand:SI 2 "general_operand" "rm,0,rm,g")
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(match_operand:SI 3 "general_operand" "0,rm,rm,g")))
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(clobber (match_scratch:SI 4 "X,X,X,=&r"))]
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"TARGET_CMOVE"
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"*
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{
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@ -6794,33 +6797,41 @@
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output_asm_insn (AS2 (cmov%C1,%2,%0), operands);
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output_asm_insn (AS2 (cmov%c1,%3,%0), operands);
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}
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RET;
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}")
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(define_insn ""
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[(set (match_operand:SI 0 "register_operand" "r")
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(if_then_else:SI (match_operator 1 "comparison_operator"
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[(cc0) (const_int 0)])
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(match_operand:SI 2 "general_operand" "")
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(match_operand:SI 3 "general_operand" "")))]
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"TARGET_CMOVE"
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"*
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{
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else if (which_alternative == 3)
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{
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/* r <- cond ? arg1 : arg2 */
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operands[4] = gen_label_rtx ();
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operands[5] = gen_label_rtx ();
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if (! rtx_equal_p (operands[0], operands[2]))
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if (GET_CODE (operands[0]) == MEM && GET_CODE (operands[2]) == MEM)
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{
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output_asm_insn (AS2 (mov%L2,%2,%4), operands);
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output_asm_insn (AS2 (mov%L2,%4,%0), operands);
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}
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else
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output_asm_insn (AS2 (mov%L0,%2,%0), operands);
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output_asm_insn (\"j%C1 %l4\", operands);
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if (! rtx_equal_p (operands[0], operands[3]))
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{
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output_asm_insn (\"j%C1 %l5\", operands);
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if (GET_CODE (operands[0]) == MEM && GET_CODE (operands[3]) == MEM)
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{
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output_asm_insn (AS2 (mov%L2,%3,%4), operands);
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output_asm_insn (AS2 (mov%L2,%4,%0), operands);
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}
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else
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output_asm_insn (AS2 (mov%L0,%3,%0), operands);
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ASM_OUTPUT_INTERNAL_LABEL (asm_out_file, \"L\", CODE_LABEL_NUMBER (operands[4]));
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ASM_OUTPUT_INTERNAL_LABEL (asm_out_file, \"L\", CODE_LABEL_NUMBER (operands[5]));
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}
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}
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RET;
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}")
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(define_insn "movhicc_1"
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[(set (match_operand:HI 0 "register_operand" "=r,r,&r")
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[(set (match_operand:HI 0 "nonimmediate_operand" "=r,r,&r,rm")
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(if_then_else:HI (match_operator 1 "comparison_operator"
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[(cc0) (const_int 0)])
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(match_operand:HI 2 "nonimmediate_operand" "rm,0,rm")
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(match_operand:HI 3 "nonimmediate_operand" "0,rm,rm")))]
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(match_operand:HI 2 "general_operand" "rm,0,rm,g")
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(match_operand:HI 3 "general_operand" "0,rm,rm,g")))
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(clobber (match_scratch:SI 4 "X,X,X,=&r"))]
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"TARGET_CMOVE"
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"*
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{
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@ -6843,33 +6854,40 @@
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output_asm_insn (AS2 (cmov%C1,%2,%0), operands);
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output_asm_insn (AS2 (cmov%c1,%3,%0), operands);
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}
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RET;
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}")
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(define_insn ""
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[(set (match_operand:HI 0 "register_operand" "r")
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(if_then_else:HI (match_operator 1 "comparison_operator"
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[(cc0) (const_int 0)])
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(match_operand:HI 2 "general_operand" "")
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(match_operand:HI 3 "general_operand" "")))]
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"TARGET_CMOVE"
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"*
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{
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else if (which_alternative == 3)
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{
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/* r <- cond ? arg1 : arg2 */
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operands[4] = gen_label_rtx ();
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operands[5] = gen_label_rtx ();
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if (! rtx_equal_p (operands[0], operands[2]))
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if (GET_CODE (operands[0]) == MEM && GET_CODE (operands[2]) == MEM)
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{
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output_asm_insn (AS2 (mov%L2,%2,%4), operands);
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output_asm_insn (AS2 (mov%L2,%4,%0), operands);
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}
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else
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output_asm_insn (AS2 (mov%L0,%2,%0), operands);
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output_asm_insn (\"j%C1 %l4\", operands);
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if (! rtx_equal_p (operands[0], operands[3]))
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{
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output_asm_insn (\"j%C1 %l5\", operands);
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if (GET_CODE (operands[0]) == MEM && GET_CODE (operands[3]) == MEM)
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{
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output_asm_insn (AS2 (mov%L2,%3,%4), operands);
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output_asm_insn (AS2 (mov%L2,%4,%0), operands);
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}
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else
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output_asm_insn (AS2 (mov%L0,%3,%0), operands);
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ASM_OUTPUT_INTERNAL_LABEL (asm_out_file, \"L\", CODE_LABEL_NUMBER (operands[4]));
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ASM_OUTPUT_INTERNAL_LABEL (asm_out_file, \"L\", CODE_LABEL_NUMBER (operands[5]));
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}
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}
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RET;
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}")
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(define_expand "movsfcc"
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[(match_dup 4)
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(set (match_operand 0 "register_operand" "")
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(set (match_operand 0 "general_operand" "")
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(if_then_else:SF (match_operand 1 "comparison_operator" "")
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(match_operand:SF 2 "register_operand" "")
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(match_operand:SF 3 "register_operand" "")))]
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(match_operand:SF 2 "general_operand" "")
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(match_operand:SF 3 "general_operand" "")))]
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"TARGET_CMOVE"
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"
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{
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@ -6878,10 +6896,10 @@
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(define_expand "movdfcc"
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[(match_dup 4)
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(set (match_operand 0 "register_operand" "")
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(set (match_operand 0 "register_operand" "t")
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(if_then_else:DF (match_operand 1 "comparison_operator" "")
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(match_operand:DF 2 "register_operand" "")
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(match_operand:DF 3 "register_operand" "")))]
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(match_operand:DF 2 "register_operand" "f")
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(match_operand:DF 3 "register_operand" "f")))]
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"TARGET_CMOVE"
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"
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{
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@ -6890,10 +6908,10 @@
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(define_expand "movxfcc"
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[(match_dup 4)
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(set (match_operand 0 "register_operand" "")
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(set (match_operand 0 "register_operand" "t")
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(if_then_else:XF (match_operand 1 "comparison_operator" "")
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(match_operand:XF 2 "register_operand" "")
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(match_operand:XF 3 "register_operand" "")))]
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(match_operand:XF 2 "register_operand" "f")
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(match_operand:XF 3 "register_operand" "f")))]
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"TARGET_CMOVE"
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"
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{
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@ -6901,11 +6919,11 @@
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}")
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(define_insn "movsfcc_1"
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[(set (match_operand:SF 0 "register_operand" "=t,t")
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[(set (match_operand:SF 0 "general_operand" "=t,=t,f,fFm")
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(if_then_else:SF (match_operator 1 "comparison_operator"
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[(cc0) (const_int 0)])
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(match_operand:SF 2 "register_operand" "0,f")
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(match_operand:SF 3 "register_operand" "f,0")))]
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(match_operand:SF 2 "general_operand" "0,f,f,fFm")
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(match_operand:SF 3 "general_operand" "f,0,f,fFm")))]
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"TARGET_CMOVE"
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"*
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{
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@ -6919,6 +6937,41 @@
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/* r <- cond ? r : arg */
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output_asm_insn (AS2 (fcmov%F1,%2,%0), operands);
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}
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else if (which_alternative == 2)
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{
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/* r <- cond ? r : arg */
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output_asm_insn (AS2 (fcmov%F1,%2,%0), operands);
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output_asm_insn (AS2 (fcmov%f1,%3,%0), operands);
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}
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else if (which_alternative == 3)
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{
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rtx xops[2];
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/* r <- cond ? arg1 : arg2 */
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operands[4] = gen_label_rtx ();
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if (STACK_REG_P (operands[2]) || GET_CODE (operands[2]) == MEM)
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output_asm_insn (AS1 (fld,%y2), operands);
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else
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{
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xops[0] = operands[0];
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xops[1] = operands[2];
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/* SET_SRC (PATTERN (insn)) = XEXP (SET_SRC (PATTERN (insn)), 1);*/
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output_asm_insn (output_move_const_single (xops), xops);
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}
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output_asm_insn (\"j%C1 %l4\", operands);
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if (STACK_REG_P (operands[3]) || GET_CODE (operands[0]) == MEM)
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output_asm_insn (AS1 (fld,%y3), operands);
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else
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{
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xops[1] = operands[3];
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SET_SRC (PATTERN (insn)) = XEXP (SET_SRC (PATTERN (insn)), 2);
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output_asm_insn (output_move_const_single (xops), xops);
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/* output_move_memory (xops, insn, GET_MODE_SIZE (DFmode), 2, 4);*/
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/* output_asm_insn (AS1 (fld%z0,%y3), operands);*/
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}
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ASM_OUTPUT_INTERNAL_LABEL (asm_out_file, \"L\", CODE_LABEL_NUMBER (operands[4]));
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}
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RET;
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}")
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