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[PATCH, GCC/ARM, 3/10] Save/restore FPCXTNS in nsentry functions
This patch consists mainly of creating 2 new instruction patterns to
push and pop special FP registers via vldm and vstr and using them in
prologue and epilogue. The patterns are defined as push/pop with an
unspecified operation on the memory accessed, with an unspecified
constant indicating what special FP register is being saved/restored.
Other aspects of the patch include:
* defining the set of special registers that can be saved/restored and
their name
* reserving space in the stack frames for these push/pop
* preventing return via pop
* guarding the clearing of FPSCR to target architecture not having
Armv8.1-M Mainline instructions.
*** gcc/ChangeLog ***
2020-01-16 Mihail-Calin Ionescu <mihail.ionescu@arm.com>
2020-01-16 Thomas Preud'homme <thomas.preudhomme@arm.com>
* config/arm/arm.c (fp_sysreg_names): Declare and define.
(use_return_insn): Also return false for Armv8.1-M Mainline.
(output_return_instruction): Skip FPSCR clearing if Armv8.1-M
Mainline instructions are available.
(arm_compute_frame_layout): Allocate space in frame for FPCXTNS
when targeting Armv8.1-M Mainline Security Extensions.
(arm_expand_prologue): Save FPCXTNS if this is an Armv8.1-M
Mainline entry function.
(cmse_nonsecure_entry_clear_before_return): Clear IP and r4 if
targeting Armv8.1-M Mainline or successor.
(arm_expand_epilogue): Fix indentation of caller-saved register
clearing. Restore FPCXTNS if this is an Armv8.1-M Mainline
entry function.
* config/arm/arm.h (TARGET_HAVE_FP_CMSE): New macro.
(FP_SYSREGS): Likewise.
(enum vfp_sysregs_encoding): Define enum.
(fp_sysreg_names): Declare.
* config/arm/unspecs.md (VUNSPEC_VSTR_VLDR): New volatile unspec.
* config/arm/vfp.md (push_fpsysreg_insn): New define_insn.
(pop_fpsysreg_insn): Likewise.
*** gcc/testsuite/Changelog ***
2020-01-16 Mihail-Calin Ionescu <mihail.ionescu@arm.com>
2020-01-16 Thomas Preud'homme <thomas.preudhomme@arm.com>
* gcc.target/arm/cmse/bitfield-1.c: add checks for VSTR and VLDR.
* gcc.target/arm/cmse/bitfield-2.c: Likewise.
* gcc.target/arm/cmse/bitfield-3.c: Likewise.
* gcc.target/arm/cmse/cmse-1.c: Likewise.
* gcc.target/arm/cmse/struct-1.c: Likewise.
* gcc.target/arm/cmse/cmse.exp: Run existing Armv8-M Mainline tests
from mainline/8m subdirectory and new Armv8.1-M Mainline tests from
mainline/8_1m subdirectory.
* gcc.target/arm/cmse/mainline/bitfield-4.c: Move into ...
* gcc.target/arm/cmse/mainline/8m/bitfield-4.c: This.
* gcc.target/arm/cmse/mainline/bitfield-5.c: Move into ...
* gcc.target/arm/cmse/mainline/8m/bitfield-5.c: This.
* gcc.target/arm/cmse/mainline/bitfield-6.c: Move into ...
* gcc.target/arm/cmse/mainline/8m/bitfield-6.c: This.
* gcc.target/arm/cmse/mainline/bitfield-7.c: Move into ...
* gcc.target/arm/cmse/mainline/8m/bitfield-7.c: This.
* gcc.target/arm/cmse/mainline/bitfield-8.c: Move into ...
* gcc.target/arm/cmse/mainline/8m/bitfield-8.c: This.
* gcc.target/arm/cmse/mainline/bitfield-9.c: Move into ...
* gcc.target/arm/cmse/mainline/8m/bitfield-9.c: This.
* gcc.target/arm/cmse/mainline/bitfield-and-union-1.c: Move and rename
into ...
* gcc.target/arm/cmse/mainline/8m/bitfield-and-union.c: This.
* gcc.target/arm/cmse/mainline/hard-sp/cmse-13.c: Move into ...
* gcc.target/arm/cmse/mainline/8m/hard-sp/cmse-13.c: This. Clean up
dg-skip-if directive for float ABI.
* gcc.target/arm/cmse/mainline/hard-sp/cmse-5.c: Move into ...
* gcc.target/arm/cmse/mainline/8m/hard-sp/cmse-5.c: This. Clean up
dg-skip-if directive for float ABI.
* gcc.target/arm/cmse/mainline/hard-sp/cmse-7.c: Move into ...
* gcc.target/arm/cmse/mainline/8m/hard-sp/cmse-7.c: This. Clean up
dg-skip-if directive for float ABI.
* gcc.target/arm/cmse/mainline/hard-sp/cmse-8.c: Move into ...
* gcc.target/arm/cmse/mainline/8m/hard-sp/cmse-8.c: This. Clean up
dg-skip-if directive for float ABI.
* gcc.target/arm/cmse/mainline/hard/cmse-13.c: Move into ...
* gcc.target/arm/cmse/mainline/8m/hard/cmse-13.c: This. Clean up
dg-skip-if directive for float ABI.
* gcc.target/arm/cmse/mainline/hard/cmse-5.c: Move into ...
* gcc.target/arm/cmse/mainline/8m/hard/cmse-5.c: This. Clean up
dg-skip-if directive for float ABI.
* gcc.target/arm/cmse/mainline/hard/cmse-7.c: Move into ...
* gcc.target/arm/cmse/mainline/8m/hard/cmse-7.c: This. Clean up
dg-skip-if directive for float ABI.
* gcc.target/arm/cmse/mainline/hard/cmse-8.c: Move into ...
* gcc.target/arm/cmse/mainline/8m/hard/cmse-8.c: This. Clean up
dg-skip-if directive for float ABI.
* gcc.target/arm/cmse/mainline/soft/cmse-13.c: Move into ...
* gcc.target/arm/cmse/mainline/8m/soft/cmse-13.c: This. Clean up
dg-skip-if directive for float ABI.
* gcc.target/arm/cmse/mainline/soft/cmse-5.c: Move into ...
* gcc.target/arm/cmse/mainline/8m/soft/cmse-5.c: This. Clean up
dg-skip-if directive for float ABI.
* gcc.target/arm/cmse/mainline/soft/cmse-7.c: Move into ...
* gcc.target/arm/cmse/mainline/8m/soft/cmse-7.c: This. Clean up
dg-skip-if directive for float ABI.
* gcc.target/arm/cmse/mainline/soft/cmse-8.c: Move into ...
* gcc.target/arm/cmse/mainline/8m/soft/cmse-8.c: This. Clean up
dg-skip-if directive for float ABI.
* gcc.target/arm/cmse/mainline/softfp-sp/cmse-5.c: Move into ...
* gcc.target/arm/cmse/mainline/8m/softfp-sp/cmse-5.c: This. Clean up
dg-skip-if directive for float ABI.
* gcc.target/arm/cmse/mainline/softfp-sp/cmse-7.c: Move into ...
* gcc.target/arm/cmse/mainline/8m/softfp-sp/cmse-7.c: This. Clean up
dg-skip-if directive for float ABI.
* gcc.target/arm/cmse/mainline/softfp-sp/cmse-8.c: Move into ...
* gcc.target/arm/cmse/mainline/8m/softfp-sp/cmse-8.c: This. Clean up
dg-skip-if directive for float ABI.
* gcc.target/arm/cmse/mainline/softfp/cmse-13.c: Move into ...
* gcc.target/arm/cmse/mainline/8m/softfp/cmse-13.c: This. Clean up
dg-skip-if directive for float ABI.
* gcc.target/arm/cmse/mainline/softfp/cmse-5.c: Move into ...
* gcc.target/arm/cmse/mainline/8m/softfp/cmse-5.c: This. Clean up
dg-skip-if directive for float ABI.
* gcc.target/arm/cmse/mainline/softfp/cmse-7.c: Move into ...
* gcc.target/arm/cmse/mainline/8m/softfp/cmse-7.c: This. Clean up
dg-skip-if directive for float ABI.
* gcc.target/arm/cmse/mainline/softfp/cmse-8.c: Move into ...
* gcc.target/arm/cmse/mainline/8m/softfp/cmse-8.c: This. Clean up
dg-skip-if directive for float ABI.
* gcc.target/arm/cmse/mainline/union-1.c: Move into ...
* gcc.target/arm/cmse/mainline/8m/union-1.c: This.
* gcc.target/arm/cmse/mainline/union-2.c: Move into ...
* gcc.target/arm/cmse/mainline/8m/union-2.c: This.
* gcc.target/arm/cmse/mainline/8_1m/bitfield-4.c: New file.
* gcc.target/arm/cmse/mainline/8_1m/bitfield-5.c: New file.
* gcc.target/arm/cmse/mainline/8_1m/bitfield-6.c: New file.
* gcc.target/arm/cmse/mainline/8_1m/bitfield-7.c: New file.
* gcc.target/arm/cmse/mainline/8_1m/bitfield-8.c: New file.
* gcc.target/arm/cmse/mainline/8_1m/bitfield-9.c: New file.
* gcc.target/arm/cmse/mainline/8_1m/bitfield-and-union.c: New file.
* gcc.target/arm/cmse/mainline/8_1m/hard-sp/cmse-13.c: New file.
* gcc.target/arm/cmse/mainline/8_1m/hard-sp/cmse-5.c: New file.
* gcc.target/arm/cmse/mainline/8_1m/hard-sp/cmse-7.c: New file.
* gcc.target/arm/cmse/mainline/8_1m/hard-sp/cmse-8.c: New file.
* gcc.target/arm/cmse/mainline/8_1m/hard/cmse-13.c: New file.
* gcc.target/arm/cmse/mainline/8_1m/hard/cmse-5.c: New file.
* gcc.target/arm/cmse/mainline/8_1m/hard/cmse-7.c: New file.
* gcc.target/arm/cmse/mainline/8_1m/hard/cmse-8.c: New file.
* gcc.target/arm/cmse/mainline/8_1m/soft/cmse-13.c: New file.
* gcc.target/arm/cmse/mainline/8_1m/soft/cmse-5.c: New file.
* gcc.target/arm/cmse/mainline/8_1m/soft/cmse-7.c: New file.
* gcc.target/arm/cmse/mainline/8_1m/soft/cmse-8.c: New file.
* gcc.target/arm/cmse/mainline/8_1m/softfp-sp/cmse-5.c: New file.
* gcc.target/arm/cmse/mainline/8_1m/softfp-sp/cmse-7.c: New file.
* gcc.target/arm/cmse/mainline/8_1m/softfp-sp/cmse-8.c: New file.
* gcc.target/arm/cmse/mainline/8_1m/softfp/cmse-13.c: New file.
* gcc.target/arm/cmse/mainline/8_1m/softfp/cmse-5.c: New file.
* gcc.target/arm/cmse/mainline/8_1m/softfp/cmse-7.c: New file.
* gcc.target/arm/cmse/mainline/8_1m/softfp/cmse-8.c: New file.
* gcc.target/arm/cmse/mainline/8_1m/union-1.c: New file.
* gcc.target/arm/cmse/mainline/8_1m/union-2.c: New file.
* lib/target-supports.exp (check_effective_target_arm_cmse_clear_ok):
New procedure.
This commit is contained in:
Mihail Ionescu
parent
e27cf2e372
commit
e0e4be48a9
@ -1,3 +1,27 @@
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2020-01-16 Mihail-Calin Ionescu <mihail.ionescu@arm.com>
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2020-01-16 Thomas Preud'homme <thomas.preudhomme@arm.com>
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* config/arm/arm.c (fp_sysreg_names): Declare and define.
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(use_return_insn): Also return false for Armv8.1-M Mainline.
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(output_return_instruction): Skip FPSCR clearing if Armv8.1-M
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Mainline instructions are available.
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(arm_compute_frame_layout): Allocate space in frame for FPCXTNS
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when targeting Armv8.1-M Mainline Security Extensions.
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(arm_expand_prologue): Save FPCXTNS if this is an Armv8.1-M
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Mainline entry function.
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(cmse_nonsecure_entry_clear_before_return): Clear IP and r4 if
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targeting Armv8.1-M Mainline or successor.
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(arm_expand_epilogue): Fix indentation of caller-saved register
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clearing. Restore FPCXTNS if this is an Armv8.1-M Mainline
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entry function.
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* config/arm/arm.h (TARGET_HAVE_FP_CMSE): New macro.
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(FP_SYSREGS): Likewise.
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(enum vfp_sysregs_encoding): Define enum.
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(fp_sysreg_names): Declare.
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* config/arm/unspecs.md (VUNSPEC_VSTR_VLDR): New volatile unspec.
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* config/arm/vfp.md (push_fpsysreg_insn): New define_insn.
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(pop_fpsysreg_insn): Likewise.
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2020-01-16 Mihail-Calin Ionescu <mihail.ionescu@arm.com>
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2020-01-16 Thomas Preud'homme <thomas.preudhomme@arm.com>
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@ -1021,6 +1021,12 @@ int arm_regs_in_sequence[] =
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0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15
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};
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#define DEF_FP_SYSREG(reg) #reg,
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const char *fp_sysreg_names[NB_FP_SYSREGS] = {
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FP_SYSREGS
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};
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#undef DEF_FP_SYSREG
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#define ARM_LSL_NAME "lsl"
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#define streq(string1, string2) (strcmp (string1, string2) == 0)
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@ -4245,8 +4251,9 @@ use_return_insn (int iscond, rtx sibling)
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}
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/* ARMv8-M nonsecure entry function need to use bxns to return and thus need
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several instructions if anything needs to be popped. */
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if (saved_int_regs && IS_CMSE_ENTRY (func_type))
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several instructions if anything needs to be popped. Armv8.1-M Mainline
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also needs several instructions to save and restore FP context. */
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if (IS_CMSE_ENTRY (func_type) && (saved_int_regs || TARGET_HAVE_FPCXT_CMSE))
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return 0;
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/* If there are saved registers but the LR isn't saved, then we need
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@ -20705,7 +20712,9 @@ output_return_instruction (rtx operand, bool really_return, bool reverse,
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"msr%s\tAPSR_nzcvq, %%|lr", conditional);
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output_asm_insn (instr, & operand);
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if (TARGET_HARD_FLOAT)
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/* Do not clear FPSCR if targeting Armv8.1-M Mainline, VLDR takes
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care of it. */
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if (TARGET_HARD_FLOAT && ! TARGET_HAVE_FPCXT_CMSE)
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{
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/* Clear the cumulative exception-status bits (0-4,7) and the
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condition code bits (28-31) of the FPSCR. We need to
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@ -21997,6 +22006,11 @@ arm_compute_frame_layout (void)
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if (! IS_VOLATILE (func_type)
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&& TARGET_HARD_FLOAT)
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saved += arm_get_vfp_saved_size ();
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/* Allocate space for saving/restoring FPCXTNS in Armv8.1-M Mainline
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nonecure entry functions with VSTR/VLDR. */
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if (TARGET_HAVE_FPCXT_CMSE && IS_CMSE_ENTRY (func_type))
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saved += 4;
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}
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else /* TARGET_THUMB1 */
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{
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@ -22698,6 +22712,15 @@ arm_expand_prologue (void)
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RTX_FRAME_RELATED_P (insn) = 1;
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}
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/* Armv8.1-M Mainline nonsecure entry: save FPCXTNS on stack using VSTR. */
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if (TARGET_HAVE_FPCXT_CMSE && IS_CMSE_ENTRY (func_type))
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{
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saved_regs += 4;
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insn = emit_insn (gen_push_fpsysreg_insn (stack_pointer_rtx,
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GEN_INT (FPCXTNS_ENUM)));
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RTX_FRAME_RELATED_P (insn) = 1;
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}
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if (args_to_push)
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{
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/* Push the argument registers, or reserve space for them. */
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@ -26261,12 +26284,15 @@ cmse_nonsecure_entry_clear_before_return (void)
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bitmap_set_range (to_clear_bitmap, FIRST_VFP_REGNUM, float_bits);
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/* Make sure we don't clear the two scratch registers used to clear the
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relevant FPSCR bits in output_return_instruction. */
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emit_use (gen_rtx_REG (SImode, IP_REGNUM));
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bitmap_clear_bit (to_clear_bitmap, IP_REGNUM);
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emit_use (gen_rtx_REG (SImode, 4));
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bitmap_clear_bit (to_clear_bitmap, 4);
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if (!TARGET_HAVE_FPCXT_CMSE)
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{
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/* Make sure we don't clear the two scratch registers used to clear
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the relevant FPSCR bits in output_return_instruction. */
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emit_use (gen_rtx_REG (SImode, IP_REGNUM));
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bitmap_clear_bit (to_clear_bitmap, IP_REGNUM);
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emit_use (gen_rtx_REG (SImode, 4));
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bitmap_clear_bit (to_clear_bitmap, 4);
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}
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}
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/* If the user has defined registers to be caller saved, these are no longer
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@ -26876,12 +26902,23 @@ arm_expand_epilogue (bool really_return)
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stack_pointer_rtx, stack_pointer_rtx);
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}
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/* Clear all caller-saved regs that are not used to return. */
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if (IS_CMSE_ENTRY (arm_current_func_type ()))
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{
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/* CMSE_ENTRY always returns. */
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gcc_assert (really_return);
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cmse_nonsecure_entry_clear_before_return ();
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if (IS_CMSE_ENTRY (func_type))
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{
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/* CMSE_ENTRY always returns. */
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gcc_assert (really_return);
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/* Clear all caller-saved regs that are not used to return. */
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cmse_nonsecure_entry_clear_before_return ();
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/* Armv8.1-M Mainline nonsecure entry: restore FPCXTNS from stack using
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VLDR. */
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if (TARGET_HAVE_FPCXT_CMSE)
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{
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rtx_insn *insn;
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insn = emit_insn (gen_pop_fpsysreg_insn (stack_pointer_rtx,
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GEN_INT (FPCXTNS_ENUM)));
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RTX_FRAME_RELATED_P (insn) = 1;
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}
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}
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if (!really_return)
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@ -315,6 +315,10 @@ emission of floating point pcs attributes. */
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/* Nonzero if this chip provides the CBZ and CBNZ instructions. */
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#define TARGET_HAVE_CBZ (arm_arch_thumb2 || arm_arch8)
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/* Nonzero if this chip provides Armv8.1-M Mainline Security extensions
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instructions (most are floating-point related). */
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#define TARGET_HAVE_FPCXT_CMSE (arm_arch8_1m_main)
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/* Nonzero if integer division instructions supported. */
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#define TARGET_IDIV ((TARGET_ARM && arm_arch_arm_hwdiv) \
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|| (TARGET_THUMB && arm_arch_thumb_hwdiv))
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@ -1181,6 +1185,22 @@ enum reg_class
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{ 0xFFFF7FFF, 0xFFFFFFFF, 0xFFFFFFFF, 0x0000000F } /* ALL_REGS */ \
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}
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#define FP_SYSREGS \
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DEF_FP_SYSREG (FPSCR) \
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DEF_FP_SYSREG (FPSCR_nzcvqc) \
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DEF_FP_SYSREG (VPR) \
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DEF_FP_SYSREG (P0) \
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DEF_FP_SYSREG (FPCXTNS) \
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DEF_FP_SYSREG (FPCXTS)
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#define DEF_FP_SYSREG(reg) reg ## _ENUM,
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enum vfp_sysregs_encoding {
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FP_SYSREGS
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NB_FP_SYSREGS
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};
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#undef DEF_FP_SYSREG
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extern const char *fp_sysreg_names[NB_FP_SYSREGS];
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/* Any of the VFP register classes. */
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#define IS_VFP_CLASS(X) \
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((X) == VFP_D0_D7_REGS || (X) == VFP_LO_REGS \
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@ -239,6 +239,7 @@
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VUNSPEC_MRRC2 ; Represent the coprocessor mrrc2 instruction.
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VUNSPEC_SPECULATION_BARRIER ; Represents an unconditional speculation barrier.
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VUNSPEC_APSR_WRITE ; Represent writing the APSR.
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VUNSPEC_VSTR_VLDR ; Represent the vstr/vldr instruction.
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])
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;; Enumerators for NEON unspecs.
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@ -1599,6 +1599,44 @@
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(set_attr "type" "f_flag")]
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)
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(define_insn "push_fpsysreg_insn"
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[(set (mem:SI (post_dec:SI (match_operand:SI 0 "s_register_operand" "+&rk")))
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(unspec_volatile:SI [(match_operand:SI 1 "const_int_operand" "n")]
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VUNSPEC_VSTR_VLDR))]
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"TARGET_HAVE_FPCXT_CMSE && use_cmse"
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{
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static char buf[32];
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int fp_sysreg_enum = INTVAL (operands[1]);
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gcc_assert (IN_RANGE (fp_sysreg_enum, 0, NB_FP_SYSREGS - 1));
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snprintf (buf, sizeof (buf), \"vstr%%?\\t%s, [%%0, #-4]!\",
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fp_sysreg_names[fp_sysreg_enum]);
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return buf;
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}
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[(set_attr "predicable" "yes")
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(set_attr "type" "store_4")]
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)
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(define_insn "pop_fpsysreg_insn"
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[(set (mem:SI (post_inc:SI (match_operand:SI 0 "s_register_operand" "+&rk")))
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(unspec_volatile:SI [(match_operand:SI 1 "const_int_operand" "n")]
|
||||
VUNSPEC_VSTR_VLDR))]
|
||||
"TARGET_HAVE_FPCXT_CMSE && use_cmse"
|
||||
{
|
||||
static char buf[32];
|
||||
int fp_sysreg_enum = INTVAL (operands[1]);
|
||||
|
||||
gcc_assert (IN_RANGE (fp_sysreg_enum, 0, NB_FP_SYSREGS - 1));
|
||||
|
||||
snprintf (buf, sizeof (buf), \"vldr%%?\\t%s, [%%0], #4\",
|
||||
fp_sysreg_names[fp_sysreg_enum]);
|
||||
return buf;
|
||||
}
|
||||
[(set_attr "predicable" "yes")
|
||||
(set_attr "type" "load_4")]
|
||||
)
|
||||
|
||||
(define_insn_and_split "*cmpsf_split_vfp"
|
||||
[(set (reg:CCFP CC_REGNUM)
|
||||
(compare:CCFP (match_operand:SF 0 "s_register_operand" "t")
|
||||
|
||||
@ -1,3 +1,121 @@
|
||||
2020-01-16 Mihail-Calin Ionescu <mihail.ionescu@arm.com>
|
||||
2020-01-16 Thomas Preud'homme <thomas.preudhomme@arm.com>
|
||||
|
||||
* gcc.target/arm/cmse/bitfield-1.c: add checks for VSTR and VLDR.
|
||||
* gcc.target/arm/cmse/bitfield-2.c: Likewise.
|
||||
* gcc.target/arm/cmse/bitfield-3.c: Likewise.
|
||||
* gcc.target/arm/cmse/cmse-1.c: Likewise.
|
||||
* gcc.target/arm/cmse/struct-1.c: Likewise.
|
||||
* gcc.target/arm/cmse/cmse.exp: Run existing Armv8-M Mainline tests
|
||||
from mainline/8m subdirectory and new Armv8.1-M Mainline tests from
|
||||
mainline/8_1m subdirectory.
|
||||
* gcc.target/arm/cmse/mainline/bitfield-4.c: Move into ...
|
||||
* gcc.target/arm/cmse/mainline/8m/bitfield-4.c: This.
|
||||
* gcc.target/arm/cmse/mainline/bitfield-5.c: Move into ...
|
||||
* gcc.target/arm/cmse/mainline/8m/bitfield-5.c: This.
|
||||
* gcc.target/arm/cmse/mainline/bitfield-6.c: Move into ...
|
||||
* gcc.target/arm/cmse/mainline/8m/bitfield-6.c: This.
|
||||
* gcc.target/arm/cmse/mainline/bitfield-7.c: Move into ...
|
||||
* gcc.target/arm/cmse/mainline/8m/bitfield-7.c: This.
|
||||
* gcc.target/arm/cmse/mainline/bitfield-8.c: Move into ...
|
||||
* gcc.target/arm/cmse/mainline/8m/bitfield-8.c: This.
|
||||
* gcc.target/arm/cmse/mainline/bitfield-9.c: Move into ...
|
||||
* gcc.target/arm/cmse/mainline/8m/bitfield-9.c: This.
|
||||
* gcc.target/arm/cmse/mainline/bitfield-and-union-1.c: Move and rename
|
||||
into ...
|
||||
* gcc.target/arm/cmse/mainline/8m/bitfield-and-union.c: This.
|
||||
* gcc.target/arm/cmse/mainline/hard-sp/cmse-13.c: Move into ...
|
||||
* gcc.target/arm/cmse/mainline/8m/hard-sp/cmse-13.c: This. Clean up
|
||||
dg-skip-if directive for float ABI.
|
||||
* gcc.target/arm/cmse/mainline/hard-sp/cmse-5.c: Move into ...
|
||||
* gcc.target/arm/cmse/mainline/8m/hard-sp/cmse-5.c: This. Clean up
|
||||
dg-skip-if directive for float ABI.
|
||||
* gcc.target/arm/cmse/mainline/hard-sp/cmse-7.c: Move into ...
|
||||
* gcc.target/arm/cmse/mainline/8m/hard-sp/cmse-7.c: This. Clean up
|
||||
dg-skip-if directive for float ABI.
|
||||
* gcc.target/arm/cmse/mainline/hard-sp/cmse-8.c: Move into ...
|
||||
* gcc.target/arm/cmse/mainline/8m/hard-sp/cmse-8.c: This. Clean up
|
||||
dg-skip-if directive for float ABI.
|
||||
* gcc.target/arm/cmse/mainline/hard/cmse-13.c: Move into ...
|
||||
* gcc.target/arm/cmse/mainline/8m/hard/cmse-13.c: This. Clean up
|
||||
dg-skip-if directive for float ABI.
|
||||
* gcc.target/arm/cmse/mainline/hard/cmse-5.c: Move into ...
|
||||
* gcc.target/arm/cmse/mainline/8m/hard/cmse-5.c: This. Clean up
|
||||
dg-skip-if directive for float ABI.
|
||||
* gcc.target/arm/cmse/mainline/hard/cmse-7.c: Move into ...
|
||||
* gcc.target/arm/cmse/mainline/8m/hard/cmse-7.c: This. Clean up
|
||||
dg-skip-if directive for float ABI.
|
||||
* gcc.target/arm/cmse/mainline/hard/cmse-8.c: Move into ...
|
||||
* gcc.target/arm/cmse/mainline/8m/hard/cmse-8.c: This. Clean up
|
||||
dg-skip-if directive for float ABI.
|
||||
* gcc.target/arm/cmse/mainline/soft/cmse-13.c: Move into ...
|
||||
* gcc.target/arm/cmse/mainline/8m/soft/cmse-13.c: This. Clean up
|
||||
dg-skip-if directive for float ABI.
|
||||
* gcc.target/arm/cmse/mainline/soft/cmse-5.c: Move into ...
|
||||
* gcc.target/arm/cmse/mainline/8m/soft/cmse-5.c: This. Clean up
|
||||
dg-skip-if directive for float ABI.
|
||||
* gcc.target/arm/cmse/mainline/soft/cmse-7.c: Move into ...
|
||||
* gcc.target/arm/cmse/mainline/8m/soft/cmse-7.c: This. Clean up
|
||||
dg-skip-if directive for float ABI.
|
||||
* gcc.target/arm/cmse/mainline/soft/cmse-8.c: Move into ...
|
||||
* gcc.target/arm/cmse/mainline/8m/soft/cmse-8.c: This. Clean up
|
||||
dg-skip-if directive for float ABI.
|
||||
* gcc.target/arm/cmse/mainline/softfp-sp/cmse-5.c: Move into ...
|
||||
* gcc.target/arm/cmse/mainline/8m/softfp-sp/cmse-5.c: This. Clean up
|
||||
dg-skip-if directive for float ABI.
|
||||
* gcc.target/arm/cmse/mainline/softfp-sp/cmse-7.c: Move into ...
|
||||
* gcc.target/arm/cmse/mainline/8m/softfp-sp/cmse-7.c: This. Clean up
|
||||
dg-skip-if directive for float ABI.
|
||||
* gcc.target/arm/cmse/mainline/softfp-sp/cmse-8.c: Move into ...
|
||||
* gcc.target/arm/cmse/mainline/8m/softfp-sp/cmse-8.c: This. Clean up
|
||||
dg-skip-if directive for float ABI.
|
||||
* gcc.target/arm/cmse/mainline/softfp/cmse-13.c: Move into ...
|
||||
* gcc.target/arm/cmse/mainline/8m/softfp/cmse-13.c: This. Clean up
|
||||
dg-skip-if directive for float ABI.
|
||||
* gcc.target/arm/cmse/mainline/softfp/cmse-5.c: Move into ...
|
||||
* gcc.target/arm/cmse/mainline/8m/softfp/cmse-5.c: This. Clean up
|
||||
dg-skip-if directive for float ABI.
|
||||
* gcc.target/arm/cmse/mainline/softfp/cmse-7.c: Move into ...
|
||||
* gcc.target/arm/cmse/mainline/8m/softfp/cmse-7.c: This. Clean up
|
||||
dg-skip-if directive for float ABI.
|
||||
* gcc.target/arm/cmse/mainline/softfp/cmse-8.c: Move into ...
|
||||
* gcc.target/arm/cmse/mainline/8m/softfp/cmse-8.c: This. Clean up
|
||||
dg-skip-if directive for float ABI.
|
||||
* gcc.target/arm/cmse/mainline/union-1.c: Move into ...
|
||||
* gcc.target/arm/cmse/mainline/8m/union-1.c: This.
|
||||
* gcc.target/arm/cmse/mainline/union-2.c: Move into ...
|
||||
* gcc.target/arm/cmse/mainline/8m/union-2.c: This.
|
||||
* gcc.target/arm/cmse/mainline/8_1m/bitfield-4.c: New file.
|
||||
* gcc.target/arm/cmse/mainline/8_1m/bitfield-5.c: New file.
|
||||
* gcc.target/arm/cmse/mainline/8_1m/bitfield-6.c: New file.
|
||||
* gcc.target/arm/cmse/mainline/8_1m/bitfield-7.c: New file.
|
||||
* gcc.target/arm/cmse/mainline/8_1m/bitfield-8.c: New file.
|
||||
* gcc.target/arm/cmse/mainline/8_1m/bitfield-9.c: New file.
|
||||
* gcc.target/arm/cmse/mainline/8_1m/bitfield-and-union.c: New file.
|
||||
* gcc.target/arm/cmse/mainline/8_1m/hard-sp/cmse-13.c: New file.
|
||||
* gcc.target/arm/cmse/mainline/8_1m/hard-sp/cmse-5.c: New file.
|
||||
* gcc.target/arm/cmse/mainline/8_1m/hard-sp/cmse-7.c: New file.
|
||||
* gcc.target/arm/cmse/mainline/8_1m/hard-sp/cmse-8.c: New file.
|
||||
* gcc.target/arm/cmse/mainline/8_1m/hard/cmse-13.c: New file.
|
||||
* gcc.target/arm/cmse/mainline/8_1m/hard/cmse-5.c: New file.
|
||||
* gcc.target/arm/cmse/mainline/8_1m/hard/cmse-7.c: New file.
|
||||
* gcc.target/arm/cmse/mainline/8_1m/hard/cmse-8.c: New file.
|
||||
* gcc.target/arm/cmse/mainline/8_1m/soft/cmse-13.c: New file.
|
||||
* gcc.target/arm/cmse/mainline/8_1m/soft/cmse-5.c: New file.
|
||||
* gcc.target/arm/cmse/mainline/8_1m/soft/cmse-7.c: New file.
|
||||
* gcc.target/arm/cmse/mainline/8_1m/soft/cmse-8.c: New file.
|
||||
* gcc.target/arm/cmse/mainline/8_1m/softfp-sp/cmse-5.c: New file.
|
||||
* gcc.target/arm/cmse/mainline/8_1m/softfp-sp/cmse-7.c: New file.
|
||||
* gcc.target/arm/cmse/mainline/8_1m/softfp-sp/cmse-8.c: New file.
|
||||
* gcc.target/arm/cmse/mainline/8_1m/softfp/cmse-13.c: New file.
|
||||
* gcc.target/arm/cmse/mainline/8_1m/softfp/cmse-5.c: New file.
|
||||
* gcc.target/arm/cmse/mainline/8_1m/softfp/cmse-7.c: New file.
|
||||
* gcc.target/arm/cmse/mainline/8_1m/softfp/cmse-8.c: New file.
|
||||
* gcc.target/arm/cmse/mainline/8_1m/union-1.c: New file.
|
||||
* gcc.target/arm/cmse/mainline/8_1m/union-2.c: New file.
|
||||
* lib/target-supports.exp (check_effective_target_arm_cmse_clear_ok):
|
||||
New procedure.
|
||||
|
||||
2020-01-16 Mihail-Calin Ionescu <mihail.ionescu@arm.com>
|
||||
2020-01-16 Thomas Preud'homme <thomas.preudhomme@arm.com>
|
||||
|
||||
|
||||
@ -32,8 +32,10 @@ main (void)
|
||||
return 0;
|
||||
}
|
||||
|
||||
/* { dg-final { scan-assembler "vstr\tFPCXTNS, \\\[sp, #-4\\\]!" { target arm_cmse_clear_ok } } } */
|
||||
/* { dg-final { scan-assembler "movw\tr1, #1855" } } */
|
||||
/* { dg-final { scan-assembler "movt\tr1, 65535" } } */
|
||||
/* { dg-final { scan-assembler "ands\tr0(, r0)?, r1" } } */
|
||||
/* { dg-final { scan-assembler "vldr\tFPCXTNS, \\\[sp\\\], #4" { target arm_cmse_clear_ok } } } */
|
||||
/* { dg-final { scan-assembler "bxns" } } */
|
||||
|
||||
|
||||
@ -29,8 +29,10 @@ main (void)
|
||||
return 0;
|
||||
}
|
||||
|
||||
/* { dg-final { scan-assembler "vstr\tFPCXTNS, \\\[sp, #-4\\\]!" { target arm_cmse_clear_ok } } } */
|
||||
/* { dg-final { scan-assembler "movw\tr1, #1919" } } */
|
||||
/* { dg-final { scan-assembler "movt\tr1, 2047" } } */
|
||||
/* { dg-final { scan-assembler "ands\tr0(, r0)?, r1" } } */
|
||||
/* { dg-final { scan-assembler "vldr\tFPCXTNS, \\\[sp\\\], #4" { target arm_cmse_clear_ok } } } */
|
||||
/* { dg-final { scan-assembler "bxns" } } */
|
||||
|
||||
|
||||
@ -30,8 +30,9 @@ main (void)
|
||||
return 0;
|
||||
}
|
||||
|
||||
/* { dg-final { scan-assembler "vstr\tFPCXTNS, \\\[sp, #-4\\\]!" { target arm_cmse_clear_ok } } } */
|
||||
/* { dg-final { scan-assembler "movw\tr1, #65535" } } */
|
||||
/* { dg-final { scan-assembler "movt\tr1, 63" } } */
|
||||
/* { dg-final { scan-assembler "ands\tr0(, r0)?, r1" } } */
|
||||
/* { dg-final { scan-assembler "vldr\tFPCXTNS, \\\[sp\\\], #4" { target arm_cmse_clear_ok } } } */
|
||||
/* { dg-final { scan-assembler "bxns" } } */
|
||||
|
||||
|
||||
@ -104,6 +104,8 @@ qux (int_nsfunc_t * callback)
|
||||
/* { dg-final { scan-assembler "__acle_se_qux:" } } */
|
||||
/* { dg-final { scan-assembler "bic" } } */
|
||||
/* { dg-final { scan-assembler "push\t\{r4, r5, r6" } } */
|
||||
/* { dg-final { scan-assembler "vstr\tFPCXTNS, \\\[sp, #-4\\\]!" { target arm_cmse_clear_ok } } } */
|
||||
/* { dg-final { scan-assembler "vldr\tFPCXTNS, \\\[sp\\\], #4" { target arm_cmse_clear_ok } } } */
|
||||
/* { dg-final { scan-assembler "msr\tAPSR_nzcvq" } } */
|
||||
|
||||
int call_callback (void)
|
||||
|
||||
@ -51,20 +51,37 @@ if {[check_effective_target_arm_arch_v8m_base_ok]} then {
|
||||
}
|
||||
|
||||
if {[check_effective_target_arm_arch_v8m_main_ok]} then {
|
||||
set MAINLINE_FLAGS [add_options_for_arm_arch_v8m_main ""]
|
||||
gcc-dg-runtest [lsort [glob $srcdir/$subdir/mainline/*.c]] \
|
||||
"$MAINLINE_FLAGS" $DEFAULT_CFLAGS
|
||||
set MAINLINE_8M_FLAGS [add_options_for_arm_arch_v8m_main ""]
|
||||
gcc-dg-runtest [lsort [glob $srcdir/$subdir/mainline/8m/*.c]] \
|
||||
"$MAINLINE_8M_FLAGS" $DEFAULT_CFLAGS
|
||||
# Mainline -mfloat-abi=soft
|
||||
gcc-dg-runtest [lsort [glob $srcdir/$subdir/mainline/soft/*.c]] \
|
||||
"$MAINLINE_FLAGS -mfloat-abi=soft" $DEFAULT_CFLAGS
|
||||
gcc-dg-runtest [lsort [glob $srcdir/$subdir/mainline/softfp/*.c]] \
|
||||
"$MAINLINE_FLAGS" $DEFAULT_CFLAGS
|
||||
gcc-dg-runtest [lsort [glob $srcdir/$subdir/mainline/softfp-sp/*.c]] \
|
||||
"$MAINLINE_FLAGS" $DEFAULT_CFLAGS
|
||||
gcc-dg-runtest [lsort [glob $srcdir/$subdir/mainline/hard/*.c]] \
|
||||
"$MAINLINE_FLAGS" $DEFAULT_CFLAGS
|
||||
gcc-dg-runtest [lsort [glob $srcdir/$subdir/mainline/hard-sp/*.c]] \
|
||||
"$MAINLINE_FLAGS" $DEFAULT_CFLAGS
|
||||
gcc-dg-runtest [lsort [glob $srcdir/$subdir/mainline/8m/soft/*.c]] \
|
||||
"$MAINLINE_8M_FLAGS -mfloat-abi=soft" $DEFAULT_CFLAGS
|
||||
gcc-dg-runtest [lsort [glob $srcdir/$subdir/mainline/8m/softfp/*.c]] \
|
||||
"$MAINLINE_8M_FLAGS" $DEFAULT_CFLAGS
|
||||
gcc-dg-runtest [lsort [glob $srcdir/$subdir/mainline/8m/softfp-sp/*.c]] \
|
||||
"$MAINLINE_8M_FLAGS" $DEFAULT_CFLAGS
|
||||
gcc-dg-runtest [lsort [glob $srcdir/$subdir/mainline/8m/hard/*.c]] \
|
||||
"$MAINLINE_8M_FLAGS" $DEFAULT_CFLAGS
|
||||
gcc-dg-runtest [lsort [glob $srcdir/$subdir/mainline/8m/hard-sp/*.c]] \
|
||||
"$MAINLINE_8M_FLAGS" $DEFAULT_CFLAGS
|
||||
}
|
||||
|
||||
if {[check_effective_target_arm_arch_v8_1m_main_ok]} then {
|
||||
set MAINLINE_8_1M_FLAGS [add_options_for_arm_arch_v8_1m_main ""]
|
||||
gcc-dg-runtest [lsort [glob $srcdir/$subdir/mainline/8_1m/*.c]] \
|
||||
"$MAINLINE_8_1M_FLAGS" $DEFAULT_CFLAGS
|
||||
# Mainline -mfloat-abi=soft
|
||||
gcc-dg-runtest [lsort [glob $srcdir/$subdir/mainline/8_1m/soft/*.c]] \
|
||||
"$MAINLINE_8_1M_FLAGS -mfloat-abi=soft" $DEFAULT_CFLAGS
|
||||
gcc-dg-runtest [lsort [glob $srcdir/$subdir/mainline/8_1m/softfp/*.c]] \
|
||||
"$MAINLINE_8_1M_FLAGS" $DEFAULT_CFLAGS
|
||||
gcc-dg-runtest [lsort [glob $srcdir/$subdir/mainline/8_1m/softfp-sp/*.c]] \
|
||||
"$MAINLINE_8_1M_FLAGS" $DEFAULT_CFLAGS
|
||||
gcc-dg-runtest [lsort [glob $srcdir/$subdir/mainline/8_1m/hard/*.c]] \
|
||||
"$MAINLINE_8_1M_FLAGS" $DEFAULT_CFLAGS
|
||||
gcc-dg-runtest [lsort [glob $srcdir/$subdir/mainline/8_1m/hard-sp/*.c]] \
|
||||
"$MAINLINE_8_1M_FLAGS" $DEFAULT_CFLAGS
|
||||
}
|
||||
|
||||
set LTO_TORTURE_OPTIONS ${saved-lto_torture_options}
|
||||
|
||||
@ -1,7 +1,7 @@
|
||||
/* { dg-do compile } */
|
||||
/* { dg-options "-mcmse" } */
|
||||
|
||||
#include "../bitfield-4.x"
|
||||
#include "../../bitfield-4.x"
|
||||
|
||||
/* { dg-final { scan-assembler "movw\tip, #65535" } } */
|
||||
/* { dg-final { scan-assembler "movt\tip, 255" } } */
|
||||
@ -1,7 +1,7 @@
|
||||
/* { dg-do compile } */
|
||||
/* { dg-options "-mcmse" } */
|
||||
|
||||
#include "../bitfield-5.x"
|
||||
#include "../../bitfield-5.x"
|
||||
|
||||
/* { dg-final { scan-assembler "movw\tip, #8191" } } */
|
||||
/* { dg-final { scan-assembler "movt\tip, 255" } } */
|
||||
@ -13,4 +13,3 @@
|
||||
/* { dg-final { scan-assembler "mov\tr2, r4" } } */
|
||||
/* { dg-final { scan-assembler "mov\tr3, r4" } } */
|
||||
/* { dg-final { scan-assembler "bl\t__gnu_cmse_nonsecure_call" } } */
|
||||
|
||||
@ -1,7 +1,7 @@
|
||||
/* { dg-do compile } */
|
||||
/* { dg-options "-mcmse" } */
|
||||
|
||||
#include "../bitfield-6.x"
|
||||
#include "../../bitfield-6.x"
|
||||
|
||||
/* { dg-final { scan-assembler "movw\tip, #65535" } } */
|
||||
/* { dg-final { scan-assembler "movt\tip, 1023" } } */
|
||||
@ -1,7 +1,7 @@
|
||||
/* { dg-do compile } */
|
||||
/* { dg-options "-mcmse" } */
|
||||
|
||||
#include "../bitfield-7.x"
|
||||
#include "../../bitfield-7.x"
|
||||
|
||||
/* { dg-final { scan-assembler "movw\tip, #8191" } } */
|
||||
/* { dg-final { scan-assembler "movt\tip, 255" } } */
|
||||
@ -13,4 +13,3 @@
|
||||
/* { dg-final { scan-assembler "mov\tr2, r4" } } */
|
||||
/* { dg-final { scan-assembler "mov\tr3, r4" } } */
|
||||
/* { dg-final { scan-assembler "bl\t__gnu_cmse_nonsecure_call" } } */
|
||||
|
||||
@ -1,7 +1,7 @@
|
||||
/* { dg-do compile } */
|
||||
/* { dg-options "-mcmse" } */
|
||||
|
||||
#include "../bitfield-8.x"
|
||||
#include "../../bitfield-8.x"
|
||||
|
||||
/* { dg-final { scan-assembler "mov\tip, #255" } } */
|
||||
/* { dg-final { scan-assembler "and\tr0, r0, ip" } } */
|
||||
@ -1,7 +1,7 @@
|
||||
/* { dg-do compile } */
|
||||
/* { dg-options "-mcmse" } */
|
||||
|
||||
#include "../bitfield-9.x"
|
||||
#include "../../bitfield-9.x"
|
||||
|
||||
/* { dg-final { scan-assembler "movw\tip, #1799" } } */
|
||||
/* { dg-final { scan-assembler "and\tr0, r0, ip" } } */
|
||||
@ -1,7 +1,7 @@
|
||||
/* { dg-do compile } */
|
||||
/* { dg-options "-mcmse" } */
|
||||
|
||||
#include "../bitfield-and-union.x"
|
||||
#include "../../bitfield-and-union.x"
|
||||
|
||||
/* { dg-final { scan-assembler "movw\tip, #7939" } } */
|
||||
/* { dg-final { scan-assembler "movt\tip, 15" } } */
|
||||
@ -1,9 +1,9 @@
|
||||
/* { dg-do compile } */
|
||||
/* { dg-options "-mcmse -mfloat-abi=hard -mfpu=fpv5-sp-d16" } */
|
||||
/* { dg-skip-if "Do not combine float-abi= hard | soft | softfp" {*-*-*} {"-mfloat-abi=soft" -mfloat-abi=softfp } {""} } */
|
||||
/* { dg-skip-if "Incompatible float ABI" { *-*-* } { "-mfloat-abi=*" } { "-mfloat-abi=hard" } } */
|
||||
/* { dg-skip-if "Skip these if testing double precision" {*-*-*} {"-mfpu=fpv[4-5]-d16"} {""} } */
|
||||
|
||||
#include "../../cmse-13.x"
|
||||
#include "../../../cmse-13.x"
|
||||
|
||||
/* Checks for saving and clearing prior to function call. */
|
||||
/* { dg-final { scan-assembler "lsrs\tr4, r4, #1" } } */
|
||||
@ -31,4 +31,3 @@
|
||||
|
||||
/* Now we check that we use the correct intrinsic to call. */
|
||||
/* { dg-final { scan-assembler "bl\t__gnu_cmse_nonsecure_call" } } */
|
||||
|
||||
@ -0,0 +1,32 @@
|
||||
/* { dg-do compile } */
|
||||
/* { dg-options "-mcmse -mfloat-abi=hard -mfpu=fpv5-sp-d16" } */
|
||||
/* { dg-skip-if "Incompatible float ABI" { *-*-* } { "-mfloat-abi=*" } { "-mfloat-abi=hard" } } */
|
||||
/* { dg-skip-if "Skip these if testing double precision" {*-*-*} {"-mfpu=fpv[4-5]-d16"} {""} } */
|
||||
|
||||
#include "../../../cmse-5.x"
|
||||
|
||||
/* { dg-final { scan-assembler "vstr\tFPCXTNS, \\\[sp, #-4\\\]!" } } */
|
||||
/* { dg-final { scan-assembler "mov\tr0, lr" } } */
|
||||
/* { dg-final { scan-assembler "mov\tr1, lr" } } */
|
||||
/* { dg-final { scan-assembler "mov\tr2, lr" } } */
|
||||
/* { dg-final { scan-assembler "mov\tr3, lr" } } */
|
||||
/* { dg-final { scan-assembler-not "vmov\.f32\ts0, #1\.0" } } */
|
||||
/* { dg-final { scan-assembler "vmov\.f32\ts1, #1\.0" } } */
|
||||
/* { dg-final { scan-assembler "vmov\.f32\ts2, #1\.0" } } */
|
||||
/* { dg-final { scan-assembler "vmov\.f32\ts3, #1\.0" } } */
|
||||
/* { dg-final { scan-assembler "vmov\.f32\ts4, #1\.0" } } */
|
||||
/* { dg-final { scan-assembler "vmov\.f32\ts5, #1\.0" } } */
|
||||
/* { dg-final { scan-assembler "vmov\.f32\ts6, #1\.0" } } */
|
||||
/* { dg-final { scan-assembler "vmov\.f32\ts7, #1\.0" } } */
|
||||
/* { dg-final { scan-assembler "vmov\.f32\ts8, #1\.0" } } */
|
||||
/* { dg-final { scan-assembler "vmov\.f32\ts9, #1\.0" } } */
|
||||
/* { dg-final { scan-assembler "vmov\.f32\ts10, #1\.0" } } */
|
||||
/* { dg-final { scan-assembler "vmov\.f32\ts11, #1\.0" } } */
|
||||
/* { dg-final { scan-assembler "vmov\.f32\ts12, #1\.0" } } */
|
||||
/* { dg-final { scan-assembler "vmov\.f32\ts13, #1\.0" } } */
|
||||
/* { dg-final { scan-assembler "vmov\.f32\ts14, #1\.0" } } */
|
||||
/* { dg-final { scan-assembler "vmov\.f32\ts15, #1\.0" } } */
|
||||
/* { dg-final { scan-assembler "msr\tAPSR_nzcvq, lr" { target { ! arm_dsp } } } } */
|
||||
/* { dg-final { scan-assembler "msr\tAPSR_nzcvqg, lr" { target arm_dsp } } } */
|
||||
/* { dg-final { scan-assembler "vldr\tFPCXTNS, \\\[sp\\\], #4" } } */
|
||||
/* { dg-final { scan-assembler "bxns" } } */
|
||||
@ -1,9 +1,9 @@
|
||||
/* { dg-do compile } */
|
||||
/* { dg-options "-mcmse -mfloat-abi=hard -mfpu=fpv5-sp-d16" } */
|
||||
/* { dg-skip-if "Do not combine float-abi= hard | soft | softfp" {*-*-*} {"-mfloat-abi=soft" -mfloat-abi=softfp } {""} } */
|
||||
/* { dg-skip-if "Incompatible float ABI" { *-*-* } { "-mfloat-abi=*" } { "-mfloat-abi=hard" } } */
|
||||
/* { dg-skip-if "Skip these if testing double precision" {*-*-*} {"-mfpu=fpv[4-5]-d16"} {""} } */
|
||||
|
||||
#include "../../cmse-7.x"
|
||||
#include "../../../cmse-7.x"
|
||||
|
||||
/* Checks for saving and clearing prior to function call. */
|
||||
/* { dg-final { scan-assembler "lsrs\tr4, r4, #1" } } */
|
||||
@ -31,4 +31,3 @@
|
||||
|
||||
/* Now we check that we use the correct intrinsic to call. */
|
||||
/* { dg-final { scan-assembler "bl\t__gnu_cmse_nonsecure_call" } } */
|
||||
|
||||
@ -1,9 +1,9 @@
|
||||
/* { dg-do compile } */
|
||||
/* { dg-options "-mcmse -mfloat-abi=hard -mfpu=fpv5-sp-d16" } */
|
||||
/* { dg-skip-if "Do not combine float-abi= hard | soft | softfp" {*-*-*} {"-mfloat-abi=soft" -mfloat-abi=softfp } {""} } */
|
||||
/* { dg-skip-if "Incompatible float ABI" { *-*-* } { "-mfloat-abi=*" } { "-mfloat-abi=hard" } } */
|
||||
/* { dg-skip-if "Skip these if testing double precision" {*-*-*} {"-mfpu=fpv[4-5]-d16"} {""} } */
|
||||
|
||||
#include "../../cmse-8.x"
|
||||
#include "../../../cmse-8.x"
|
||||
|
||||
/* Checks for saving and clearing prior to function call. */
|
||||
/* { dg-final { scan-assembler "lsrs\tr4, r4, #1" } } */
|
||||
@ -1,9 +1,9 @@
|
||||
/* { dg-do compile } */
|
||||
/* { dg-options "-mcmse -mfloat-abi=hard -mfpu=fpv5-d16" } */
|
||||
/* { dg-skip-if "Do not combine float-abi= hard | soft | softfp" {*-*-*} {"-mfloat-abi=soft" -mfloat-abi=softfp } {""} } */
|
||||
/* { dg-skip-if "Incompatible float ABI" { *-*-* } { "-mfloat-abi=*" } { "-mfloat-abi=hard" } } */
|
||||
/* { dg-skip-if "Skip these if testing single precision" {*-*-*} {"-mfpu=*-sp-*"} {""} } */
|
||||
|
||||
#include "../../cmse-13.x"
|
||||
#include "../../../cmse-13.x"
|
||||
|
||||
/* Checks for saving and clearing prior to function call. */
|
||||
/* { dg-final { scan-assembler "lsrs\tr4, r4, #1" } } */
|
||||
@ -0,0 +1,25 @@
|
||||
/* { dg-do compile } */
|
||||
/* { dg-options "-mcmse -mfloat-abi=hard -mfpu=fpv5-d16" } */
|
||||
/* { dg-skip-if "Incompatible float ABI" { *-*-* } { "-mfloat-abi=*" } { "-mfloat-abi=hard" } } */
|
||||
/* { dg-skip-if "Skip these if testing single precision" {*-*-*} {"-mfpu=*-sp-*"} {""} } */
|
||||
|
||||
#include "../../../cmse-5.x"
|
||||
|
||||
/* { dg-final { scan-assembler "vstr\tFPCXTNS, \\\[sp, #-4\\\]!" } } */
|
||||
/* { dg-final { scan-assembler "mov\tr0, lr" } } */
|
||||
/* { dg-final { scan-assembler "mov\tr1, lr" } } */
|
||||
/* { dg-final { scan-assembler "mov\tr2, lr" } } */
|
||||
/* { dg-final { scan-assembler "mov\tr3, lr" } } */
|
||||
/* { dg-final { scan-assembler-not "vmov\.f32\ts0, #1\.0" } } */
|
||||
/* { dg-final { scan-assembler "vmov\.f32\ts1, #1\.0" } } */
|
||||
/* { dg-final { scan-assembler "vmov\.f64\td1, #1\.0" } } */
|
||||
/* { dg-final { scan-assembler "vmov\.f64\td2, #1\.0" } } */
|
||||
/* { dg-final { scan-assembler "vmov\.f64\td3, #1\.0" } } */
|
||||
/* { dg-final { scan-assembler "vmov\.f64\td4, #1\.0" } } */
|
||||
/* { dg-final { scan-assembler "vmov\.f64\td5, #1\.0" } } */
|
||||
/* { dg-final { scan-assembler "vmov\.f64\td6, #1\.0" } } */
|
||||
/* { dg-final { scan-assembler "vmov\.f64\td7, #1\.0" } } */
|
||||
/* { dg-final { scan-assembler "msr\tAPSR_nzcvq, lr" { target { ! arm_dsp } } } } */
|
||||
/* { dg-final { scan-assembler "msr\tAPSR_nzcvqg, lr" { target arm_dsp } } } */
|
||||
/* { dg-final { scan-assembler "vldr\tFPCXTNS, \\\[sp\\\], #4" } } */
|
||||
/* { dg-final { scan-assembler "bxns" } } */
|
||||
@ -1,9 +1,9 @@
|
||||
/* { dg-do compile } */
|
||||
/* { dg-options "-mcmse -mfloat-abi=hard -mfpu=fpv5-d16" } */
|
||||
/* { dg-skip-if "Do not combine float-abi= hard | soft | softfp" {*-*-*} {"-mfloat-abi=soft" -mfloat-abi=softfp } {""} } */
|
||||
/* { dg-skip-if "Incompatible float ABI" { *-*-* } { "-mfloat-abi=*" } { "-mfloat-abi=hard" } } */
|
||||
/* { dg-skip-if "Skip these if testing single precision" {*-*-*} {"-mfpu=*-sp-*"} {""} } */
|
||||
|
||||
#include "../../cmse-7.x"
|
||||
#include "../../../cmse-7.x"
|
||||
|
||||
/* Checks for saving and clearing prior to function call. */
|
||||
/* { dg-final { scan-assembler "lsrs\tr4, r4, #1" } } */
|
||||
@ -23,4 +23,3 @@
|
||||
|
||||
/* Now we check that we use the correct intrinsic to call. */
|
||||
/* { dg-final { scan-assembler "bl\t__gnu_cmse_nonsecure_call" } } */
|
||||
|
||||
@ -1,9 +1,9 @@
|
||||
/* { dg-do compile } */
|
||||
/* { dg-options "-mcmse -mfloat-abi=hard -mfpu=fpv5-d16" } */
|
||||
/* { dg-skip-if "Do not combine float-abi= hard | soft | softfp" {*-*-*} {"-mfloat-abi=soft" -mfloat-abi=softfp } {""} } */
|
||||
/* { dg-skip-if "Incompatible float ABI" { *-*-* } { "-mfloat-abi=*" } { "-mfloat-abi=hard" } } */
|
||||
/* { dg-skip-if "Skip these if testing single precision" {*-*-*} {"-mfpu=*-sp-*"} {""} } */
|
||||
|
||||
#include "../../cmse-8.x"
|
||||
#include "../../../cmse-8.x"
|
||||
|
||||
/* Checks for saving and clearing prior to function call. */
|
||||
/* { dg-final { scan-assembler "lsrs\tr4, r4, #1" } } */
|
||||
@ -1,8 +1,8 @@
|
||||
/* { dg-do compile } */
|
||||
/* { dg-options "-mcmse -mfloat-abi=soft" } */
|
||||
/* { dg-skip-if "Do not combine float-abi= hard | soft | softfp" {*-*-*} {"-mfloat-abi=hard" -mfloat-abi=softfp } {""} } */
|
||||
/* { dg-skip-if "Incompatible float ABI" { *-*-* } { "-mfloat-abi=*" } { "-mfloat-abi=soft" } } */
|
||||
|
||||
#include "../../cmse-13.x"
|
||||
#include "../../../cmse-13.x"
|
||||
|
||||
/* Checks for saving and clearing prior to function call. */
|
||||
/* { dg-final { scan-assembler "lsrs\tr4, r4, #1" } } */
|
||||
@ -16,4 +16,3 @@
|
||||
|
||||
/* Now we check that we use the correct intrinsic to call. */
|
||||
/* { dg-final { scan-assembler "bl\t__gnu_cmse_nonsecure_call" } } */
|
||||
|
||||
@ -0,0 +1,17 @@
|
||||
/* { dg-do compile } */
|
||||
/* { dg-options "-mcmse -mfloat-abi=soft" } */
|
||||
/* { dg-skip-if "Incompatible float ABI" { *-*-* } { "-mfloat-abi=*" } { "-mfloat-abi=soft" } } */
|
||||
|
||||
#include "../../../cmse-5.x"
|
||||
|
||||
/* { dg-final { scan-assembler "vstr\tFPCXTNS, \\\[sp, #-4\\\]!" } } */
|
||||
/* { dg-final { scan-assembler "mov\tr1, lr" } } */
|
||||
/* { dg-final { scan-assembler "mov\tr2, lr" } } */
|
||||
/* { dg-final { scan-assembler "mov\tr3, lr" } } */
|
||||
/* { dg-final { scan-assembler "mov\tip, lr" } } */
|
||||
/* { dg-final { scan-assembler-not "vmov" } } */
|
||||
/* { dg-final { scan-assembler-not "vmsr" } } */
|
||||
/* { dg-final { scan-assembler "msr\tAPSR_nzcvq, lr" { target { ! arm_dsp } } } } */
|
||||
/* { dg-final { scan-assembler "msr\tAPSR_nzcvqg, lr" { target arm_dsp } } } */
|
||||
/* { dg-final { scan-assembler "vldr\tFPCXTNS, \\\[sp\\\], #4" } } */
|
||||
/* { dg-final { scan-assembler "bxns" } } */
|
||||
@ -1,8 +1,8 @@
|
||||
/* { dg-do compile } */
|
||||
/* { dg-options "-mcmse -mfloat-abi=soft" } */
|
||||
/* { dg-skip-if "Do not combine float-abi= hard | soft | softfp" {*-*-*} {"-mfloat-abi=hard" -mfloat-abi=softfp } {""} } */
|
||||
/* { dg-skip-if "Incompatible float ABI" { *-*-* } { "-mfloat-abi=*" } { "-mfloat-abi=soft" } } */
|
||||
|
||||
#include "../../cmse-7.x"
|
||||
#include "../../../cmse-7.x"
|
||||
|
||||
/* Checks for saving and clearing prior to function call. */
|
||||
/* { dg-final { scan-assembler "lsrs\tr4, r4, #1" } } */
|
||||
@ -16,4 +16,3 @@
|
||||
|
||||
/* Now we check that we use the correct intrinsic to call. */
|
||||
/* { dg-final { scan-assembler "bl\t__gnu_cmse_nonsecure_call" } } */
|
||||
|
||||
@ -1,8 +1,8 @@
|
||||
/* { dg-do compile } */
|
||||
/* { dg-options "-mcmse -mfloat-abi=soft" } */
|
||||
/* { dg-skip-if "Do not combine float-abi= hard | soft | softfp" {*-*-*} {"-mfloat-abi=hard" -mfloat-abi=softfp } {""} } */
|
||||
/* { dg-skip-if "Incompatible float ABI" { *-*-* } { "-mfloat-abi=*" } { "-mfloat-abi=soft" } } */
|
||||
|
||||
#include "../../cmse-8.x"
|
||||
#include "../../../cmse-8.x"
|
||||
|
||||
/* Checks for saving and clearing prior to function call. */
|
||||
/* { dg-final { scan-assembler "lsrs\tr4, r4, #1" } } */
|
||||
@ -0,0 +1,33 @@
|
||||
/* { dg-do compile } */
|
||||
/* { dg-options "-mcmse -mfloat-abi=softfp -mfpu=fpv5-sp-d16" } */
|
||||
/* { dg-skip-if "Incompatible float ABI" { *-*-* } { "-mfloat-abi=*" } { "-mfloat-abi=softfp" } } */
|
||||
/* { dg-skip-if "Skip these if testing double precision" {*-*-*} {"-mfpu=fpv[4-5]-d16"} {""} } */
|
||||
|
||||
#include "../../../cmse-5.x"
|
||||
|
||||
/* { dg-final { scan-assembler "__acle_se_foo:" } } */
|
||||
/* { dg-final { scan-assembler "vstr\tFPCXTNS, \\\[sp, #-4\\\]!" } } */
|
||||
/* { dg-final { scan-assembler-not "mov\tr0, lr" } } */
|
||||
/* { dg-final { scan-assembler "mov\tr1, lr" } } */
|
||||
/* { dg-final { scan-assembler "mov\tr2, lr" } } */
|
||||
/* { dg-final { scan-assembler "mov\tr3, lr" } } */
|
||||
/* { dg-final { scan-assembler "vmov\.f32\ts0, #1\.0" } } */
|
||||
/* { dg-final { scan-assembler "vmov\.f32\ts1, #1\.0" } } */
|
||||
/* { dg-final { scan-assembler "vmov\.f32\ts2, #1\.0" } } */
|
||||
/* { dg-final { scan-assembler "vmov\.f32\ts3, #1\.0" } } */
|
||||
/* { dg-final { scan-assembler "vmov\.f32\ts4, #1\.0" } } */
|
||||
/* { dg-final { scan-assembler "vmov\.f32\ts5, #1\.0" } } */
|
||||
/* { dg-final { scan-assembler "vmov\.f32\ts6, #1\.0" } } */
|
||||
/* { dg-final { scan-assembler "vmov\.f32\ts7, #1\.0" } } */
|
||||
/* { dg-final { scan-assembler "vmov\.f32\ts8, #1\.0" } } */
|
||||
/* { dg-final { scan-assembler "vmov\.f32\ts9, #1\.0" } } */
|
||||
/* { dg-final { scan-assembler "vmov\.f32\ts10, #1\.0" } } */
|
||||
/* { dg-final { scan-assembler "vmov\.f32\ts11, #1\.0" } } */
|
||||
/* { dg-final { scan-assembler "vmov\.f32\ts12, #1\.0" } } */
|
||||
/* { dg-final { scan-assembler "vmov\.f32\ts13, #1\.0" } } */
|
||||
/* { dg-final { scan-assembler "vmov\.f32\ts14, #1\.0" } } */
|
||||
/* { dg-final { scan-assembler "vmov\.f32\ts15, #1\.0" } } */
|
||||
/* { dg-final { scan-assembler "msr\tAPSR_nzcvq, lr" { target { ! arm_dsp } } } } */
|
||||
/* { dg-final { scan-assembler "msr\tAPSR_nzcvqg, lr" { target arm_dsp } } } */
|
||||
/* { dg-final { scan-assembler "vldr\tFPCXTNS, \\\[sp\\\], #4" } } */
|
||||
/* { dg-final { scan-assembler "bxns" } } */
|
||||
@ -1,9 +1,9 @@
|
||||
/* { dg-do compile } */
|
||||
/* { dg-options "-mcmse -mfloat-abi=softfp -mfpu=fpv5-sp-d16" } */
|
||||
/* { dg-skip-if "Do not combine float-abi= hard | soft | softfp" {*-*-*} {"-mfloat-abi=soft" -mfloat-abi=hard } {""} } */
|
||||
/* { dg-skip-if "Incompatible float ABI" { *-*-* } { "-mfloat-abi=*" } { "-mfloat-abi=softfp" } } */
|
||||
/* { dg-skip-if "Skip these if testing double precision" {*-*-*} {"-mfpu=fpv[4-5]-d16"} {""} } */
|
||||
|
||||
#include "../../cmse-7.x"
|
||||
#include "../../../cmse-7.x"
|
||||
|
||||
/* Checks for saving and clearing prior to function call. */
|
||||
/* { dg-final { scan-assembler "lsrs\tr4, r4, #1" } } */
|
||||
@ -15,4 +15,3 @@
|
||||
|
||||
/* Now we check that we use the correct intrinsic to call. */
|
||||
/* { dg-final { scan-assembler "bl\t__gnu_cmse_nonsecure_call" } } */
|
||||
|
||||
@ -1,9 +1,9 @@
|
||||
/* { dg-do compile } */
|
||||
/* { dg-options "-mcmse -mfloat-abi=softfp -mfpu=fpv5-sp-d16" } */
|
||||
/* { dg-skip-if "Do not combine float-abi= hard | soft | softfp" {*-*-*} {"-mfloat-abi=soft" -mfloat-abi=hard } {""} } */
|
||||
/* { dg-skip-if "Incompatible float ABI" { *-*-* } { "-mfloat-abi=*" } { "-mfloat-abi=softfp" } } */
|
||||
/* { dg-skip-if "Skip these if testing double precision" {*-*-*} {"-mfpu=fpv[4-5]-d16"} {""} } */
|
||||
|
||||
#include "../../cmse-8.x"
|
||||
#include "../../../cmse-8.x"
|
||||
|
||||
/* Checks for saving and clearing prior to function call. */
|
||||
/* { dg-final { scan-assembler "lsrs\tr4, r4, #1" } } */
|
||||
@ -1,9 +1,9 @@
|
||||
/* { dg-do compile } */
|
||||
/* { dg-options "-mcmse -mfloat-abi=softfp -mfpu=fpv5-d16" } */
|
||||
/* { dg-skip-if "Do not combine float-abi= hard | soft | softfp" {*-*-*} {"-mfloat-abi=soft" -mfloat-abi=hard } {""} } */
|
||||
/* { dg-skip-if "Incompatible float ABI" { *-*-* } { "-mfloat-abi=*" } { "-mfloat-abi=softfp" } } */
|
||||
/* { dg-skip-if "Skip these if testing single precision" {*-*-*} {"-mfpu=*-sp-*"} {""} } */
|
||||
|
||||
#include "../../cmse-13.x"
|
||||
#include "../../../cmse-13.x"
|
||||
|
||||
/* Checks for saving and clearing prior to function call. */
|
||||
/* { dg-final { scan-assembler "lsrs\tr4, r4, #1" } } */
|
||||
@ -14,4 +14,3 @@
|
||||
|
||||
/* Now we check that we use the correct intrinsic to call. */
|
||||
/* { dg-final { scan-assembler "bl\t__gnu_cmse_nonsecure_call" } } */
|
||||
|
||||
@ -0,0 +1,25 @@
|
||||
/* { dg-do compile } */
|
||||
/* { dg-options "-mcmse -mfloat-abi=softfp -mfpu=fpv5-d16" } */
|
||||
/* { dg-skip-if "Incompatible float ABI" { *-*-* } { "-mfloat-abi=*" } { "-mfloat-abi=softfp" } } */
|
||||
/* { dg-skip-if "Skip these if testing single precision" {*-*-*} {"-mfpu=*-sp-*"} {""} } */
|
||||
|
||||
#include "../../../cmse-5.x"
|
||||
|
||||
/* { dg-final { scan-assembler "__acle_se_foo:" } } */
|
||||
/* { dg-final { scan-assembler "vstr\tFPCXTNS, \\\[sp, #-4\\\]!" } } */
|
||||
/* { dg-final { scan-assembler-not "mov\tr0, lr" } } */
|
||||
/* { dg-final { scan-assembler "mov\tr1, lr" } } */
|
||||
/* { dg-final { scan-assembler "mov\tr2, lr" } } */
|
||||
/* { dg-final { scan-assembler "mov\tr3, lr" } } */
|
||||
/* { dg-final { scan-assembler "vmov\.f64\td0, #1\.0" } } */
|
||||
/* { dg-final { scan-assembler "vmov\.f64\td1, #1\.0" } } */
|
||||
/* { dg-final { scan-assembler "vmov\.f64\td2, #1\.0" } } */
|
||||
/* { dg-final { scan-assembler "vmov\.f64\td3, #1\.0" } } */
|
||||
/* { dg-final { scan-assembler "vmov\.f64\td4, #1\.0" } } */
|
||||
/* { dg-final { scan-assembler "vmov\.f64\td5, #1\.0" } } */
|
||||
/* { dg-final { scan-assembler "vmov\.f64\td6, #1\.0" } } */
|
||||
/* { dg-final { scan-assembler "vmov\.f64\td7, #1\.0" } } */
|
||||
/* { dg-final { scan-assembler "msr\tAPSR_nzcvq, lr" { target { ! arm_dsp } } } } */
|
||||
/* { dg-final { scan-assembler "msr\tAPSR_nzcvqg, lr" { target arm_dsp } } } */
|
||||
/* { dg-final { scan-assembler "vldr\tFPCXTNS, \\\[sp\\\], #4" } } */
|
||||
/* { dg-final { scan-assembler "bxns" } } */
|
||||
@ -1,9 +1,9 @@
|
||||
/* { dg-do compile } */
|
||||
/* { dg-options "-mcmse -mfloat-abi=softfp -mfpu=fpv5-d16" } */
|
||||
/* { dg-skip-if "Do not combine float-abi= hard | soft | softfp" {*-*-*} {"-mfloat-abi=soft" -mfloat-abi=hard } {""} } */
|
||||
/* { dg-skip-if "Incompatible float ABI" { *-*-* } { "-mfloat-abi=*" } { "-mfloat-abi=softfp" } } */
|
||||
/* { dg-skip-if "Skip these if testing single precision" {*-*-*} {"-mfpu=*-sp-*"} {""} } */
|
||||
|
||||
#include "../../cmse-7.x"
|
||||
#include "../../../cmse-7.x"
|
||||
|
||||
/* Checks for saving and clearing prior to function call. */
|
||||
/* { dg-final { scan-assembler "lsrs\tr4, r4, #1" } } */
|
||||
@ -15,4 +15,3 @@
|
||||
|
||||
/* Now we check that we use the correct intrinsic to call. */
|
||||
/* { dg-final { scan-assembler "bl\t__gnu_cmse_nonsecure_call" } } */
|
||||
|
||||
@ -1,9 +1,9 @@
|
||||
/* { dg-do compile } */
|
||||
/* { dg-options "-mcmse -mfloat-abi=softfp -mfpu=fpv5-d16" } */
|
||||
/* { dg-skip-if "Do not combine float-abi= hard | soft | softfp" {*-*-*} {"-mfloat-abi=soft" -mfloat-abi=hard } {""} } */
|
||||
/* { dg-skip-if "Incompatible float ABI" { *-*-* } { "-mfloat-abi=*" } { "-mfloat-abi=softfp" } } */
|
||||
/* { dg-skip-if "Skip these if testing single precision" {*-*-*} {"-mfpu=*-sp-*"} {""} } */
|
||||
|
||||
#include "../../cmse-8.x"
|
||||
#include "../../../cmse-8.x"
|
||||
|
||||
/* Checks for saving and clearing prior to function call. */
|
||||
/* { dg-final { scan-assembler "lsrs\tr4, r4, #1" } } */
|
||||
@ -1,7 +1,7 @@
|
||||
/* { dg-do compile } */
|
||||
/* { dg-options "-mcmse" } */
|
||||
|
||||
#include "../union-1.x"
|
||||
#include "../../union-1.x"
|
||||
|
||||
/* { dg-final { scan-assembler "movw\tip, #8063" } } */
|
||||
/* { dg-final { scan-assembler "movt\tip, 63" } } */
|
||||
@ -13,4 +13,3 @@
|
||||
/* { dg-final { scan-assembler "mov\tr2, r4" } } */
|
||||
/* { dg-final { scan-assembler "mov\tr3, r4" } } */
|
||||
/* { dg-final { scan-assembler "bl\t__gnu_cmse_nonsecure_call" } } */
|
||||
|
||||
@ -1,7 +1,7 @@
|
||||
/* { dg-do compile } */
|
||||
/* { dg-options "-mcmse" } */
|
||||
|
||||
#include "../union-2.x"
|
||||
#include "../../union-2.x"
|
||||
|
||||
/* { dg-final { scan-assembler "movw\tip, #8191" } } */
|
||||
/* { dg-final { scan-assembler "movt\tip, 63" } } */
|
||||
16
gcc/testsuite/gcc.target/arm/cmse/mainline/8m/bitfield-4.c
Normal file
16
gcc/testsuite/gcc.target/arm/cmse/mainline/8m/bitfield-4.c
Normal file
@ -0,0 +1,16 @@
|
||||
/* { dg-do compile } */
|
||||
/* { dg-options "-mcmse" } */
|
||||
|
||||
#include "../../bitfield-4.x"
|
||||
|
||||
/* { dg-final { scan-assembler "movw\tip, #65535" } } */
|
||||
/* { dg-final { scan-assembler "movt\tip, 255" } } */
|
||||
/* { dg-final { scan-assembler "and\tr0, r0, ip" } } */
|
||||
/* { dg-final { scan-assembler "mov\tip, #255" } } */
|
||||
/* { dg-final { scan-assembler "and\tr1, r1, ip" } } */
|
||||
/* { dg-final { scan-assembler "mov\tip, #3" } } */
|
||||
/* { dg-final { scan-assembler "and\tr2, r2, ip" } } */
|
||||
/* { dg-final { scan-assembler "lsrs\tr4, r4, #1" } } */
|
||||
/* { dg-final { scan-assembler "lsls\tr4, r4, #1" } } */
|
||||
/* { dg-final { scan-assembler "mov\tr3, r4" } } */
|
||||
/* { dg-final { scan-assembler "bl\t__gnu_cmse_nonsecure_call" } } */
|
||||
15
gcc/testsuite/gcc.target/arm/cmse/mainline/8m/bitfield-5.c
Normal file
15
gcc/testsuite/gcc.target/arm/cmse/mainline/8m/bitfield-5.c
Normal file
@ -0,0 +1,15 @@
|
||||
/* { dg-do compile } */
|
||||
/* { dg-options "-mcmse" } */
|
||||
|
||||
#include "../../bitfield-5.x"
|
||||
|
||||
/* { dg-final { scan-assembler "movw\tip, #8191" } } */
|
||||
/* { dg-final { scan-assembler "movt\tip, 255" } } */
|
||||
/* { dg-final { scan-assembler "and\tr0, r0, ip" } } */
|
||||
/* { dg-final { scan-assembler "movw\tip, #2047" } } */
|
||||
/* { dg-final { scan-assembler "and\tr1, r1, ip" } } */
|
||||
/* { dg-final { scan-assembler "lsrs\tr4, r4, #1" } } */
|
||||
/* { dg-final { scan-assembler "lsls\tr4, r4, #1" } } */
|
||||
/* { dg-final { scan-assembler "mov\tr2, r4" } } */
|
||||
/* { dg-final { scan-assembler "mov\tr3, r4" } } */
|
||||
/* { dg-final { scan-assembler "bl\t__gnu_cmse_nonsecure_call" } } */
|
||||
17
gcc/testsuite/gcc.target/arm/cmse/mainline/8m/bitfield-6.c
Normal file
17
gcc/testsuite/gcc.target/arm/cmse/mainline/8m/bitfield-6.c
Normal file
@ -0,0 +1,17 @@
|
||||
/* { dg-do compile } */
|
||||
/* { dg-options "-mcmse" } */
|
||||
|
||||
#include "../../bitfield-6.x"
|
||||
|
||||
/* { dg-final { scan-assembler "movw\tip, #65535" } } */
|
||||
/* { dg-final { scan-assembler "movt\tip, 1023" } } */
|
||||
/* { dg-final { scan-assembler "and\tr0, r0, ip" } } */
|
||||
/* { dg-final { scan-assembler "mov\tip, #3" } } */
|
||||
/* { dg-final { scan-assembler "movt\tip, 32767" } } */
|
||||
/* { dg-final { scan-assembler "and\tr1, r1, ip" } } */
|
||||
/* { dg-final { scan-assembler "mov\tip, #255" } } */
|
||||
/* { dg-final { scan-assembler "and\tr2, r2, ip" } } */
|
||||
/* { dg-final { scan-assembler "lsrs\tr4, r4, #1" } } */
|
||||
/* { dg-final { scan-assembler "lsls\tr4, r4, #1" } } */
|
||||
/* { dg-final { scan-assembler "mov\tr3, r4" } } */
|
||||
/* { dg-final { scan-assembler "bl\t__gnu_cmse_nonsecure_call" } } */
|
||||
15
gcc/testsuite/gcc.target/arm/cmse/mainline/8m/bitfield-7.c
Normal file
15
gcc/testsuite/gcc.target/arm/cmse/mainline/8m/bitfield-7.c
Normal file
@ -0,0 +1,15 @@
|
||||
/* { dg-do compile } */
|
||||
/* { dg-options "-mcmse" } */
|
||||
|
||||
#include "../../bitfield-7.x"
|
||||
|
||||
/* { dg-final { scan-assembler "movw\tip, #8191" } } */
|
||||
/* { dg-final { scan-assembler "movt\tip, 255" } } */
|
||||
/* { dg-final { scan-assembler "and\tr0, r0, ip" } } */
|
||||
/* { dg-final { scan-assembler "movw\tip, #2047" } } */
|
||||
/* { dg-final { scan-assembler "and\tr1, r1, ip" } } */
|
||||
/* { dg-final { scan-assembler "lsrs\tr4, r4, #1" } } */
|
||||
/* { dg-final { scan-assembler "lsls\tr4, r4, #1" } } */
|
||||
/* { dg-final { scan-assembler "mov\tr2, r4" } } */
|
||||
/* { dg-final { scan-assembler "mov\tr3, r4" } } */
|
||||
/* { dg-final { scan-assembler "bl\t__gnu_cmse_nonsecure_call" } } */
|
||||
17
gcc/testsuite/gcc.target/arm/cmse/mainline/8m/bitfield-8.c
Normal file
17
gcc/testsuite/gcc.target/arm/cmse/mainline/8m/bitfield-8.c
Normal file
@ -0,0 +1,17 @@
|
||||
/* { dg-do compile } */
|
||||
/* { dg-options "-mcmse" } */
|
||||
|
||||
#include "../../bitfield-8.x"
|
||||
|
||||
/* { dg-final { scan-assembler "mov\tip, #255" } } */
|
||||
/* { dg-final { scan-assembler "and\tr0, r0, ip" } } */
|
||||
/* { dg-final { scan-assembler "mov\tip, #1" } } */
|
||||
/* { dg-final { scan-assembler "movt\tip, 65535" } } */
|
||||
/* { dg-final { scan-assembler "and\tr1, r1, ip" } } */
|
||||
/* { dg-final { scan-assembler "movw\tip, #65535" } } */
|
||||
/* { dg-final { scan-assembler "movt\tip, 31" } } */
|
||||
/* { dg-final { scan-assembler "and\tr2, r2, ip" } } */
|
||||
/* { dg-final { scan-assembler "lsrs\tr4, r4, #1" } } */
|
||||
/* { dg-final { scan-assembler "lsls\tr4, r4, #1" } } */
|
||||
/* { dg-final { scan-assembler "mov\tr3, r4" } } */
|
||||
/* { dg-final { scan-assembler "bl\t__gnu_cmse_nonsecure_call" } } */
|
||||
13
gcc/testsuite/gcc.target/arm/cmse/mainline/8m/bitfield-9.c
Normal file
13
gcc/testsuite/gcc.target/arm/cmse/mainline/8m/bitfield-9.c
Normal file
@ -0,0 +1,13 @@
|
||||
/* { dg-do compile } */
|
||||
/* { dg-options "-mcmse" } */
|
||||
|
||||
#include "../../bitfield-9.x"
|
||||
|
||||
/* { dg-final { scan-assembler "movw\tip, #1799" } } */
|
||||
/* { dg-final { scan-assembler "and\tr0, r0, ip" } } */
|
||||
/* { dg-final { scan-assembler "lsrs\tr4, r4, #1" } } */
|
||||
/* { dg-final { scan-assembler "lsls\tr4, r4, #1" } } */
|
||||
/* { dg-final { scan-assembler "mov\tr1, r4" } } */
|
||||
/* { dg-final { scan-assembler "mov\tr2, r4" } } */
|
||||
/* { dg-final { scan-assembler "mov\tr3, r4" } } */
|
||||
/* { dg-final { scan-assembler "bl\t__gnu_cmse_nonsecure_call" } } */
|
||||
@ -0,0 +1,20 @@
|
||||
/* { dg-do compile } */
|
||||
/* { dg-options "-mcmse" } */
|
||||
|
||||
#include "../../bitfield-and-union.x"
|
||||
|
||||
/* { dg-final { scan-assembler "movw\tip, #7939" } } */
|
||||
/* { dg-final { scan-assembler "movt\tip, 15" } } */
|
||||
/* { dg-final { scan-assembler "and\tr0, r0, ip" } } */
|
||||
/* { dg-final { scan-assembler "movw\tip, #65535" } } */
|
||||
/* { dg-final { scan-assembler "movt\tip, 2047" } } */
|
||||
/* { dg-final { scan-assembler "and\tr1, r1, ip" } } */
|
||||
/* { dg-final { scan-assembler "mov\tip, #1" } } */
|
||||
/* { dg-final { scan-assembler "movt\tip, 65535" } } */
|
||||
/* { dg-final { scan-assembler "and\tr2, r2, ip" } } */
|
||||
/* { dg-final { scan-assembler "movw\tip, #65535" } } */
|
||||
/* { dg-final { scan-assembler "movt\tip, 31" } } */
|
||||
/* { dg-final { scan-assembler "and\tr3, r3, ip" } } */
|
||||
/* { dg-final { scan-assembler "lsrs\tr4, r4, #1" } } */
|
||||
/* { dg-final { scan-assembler "lsls\tr4, r4, #1" } } */
|
||||
/* { dg-final { scan-assembler "bl\t__gnu_cmse_nonsecure_call" } } */
|
||||
@ -0,0 +1,33 @@
|
||||
/* { dg-do compile } */
|
||||
/* { dg-options "-mcmse -mfloat-abi=hard -mfpu=fpv5-sp-d16" } */
|
||||
/* { dg-skip-if "Incompatible float ABI" { *-*-* } { "-mfloat-abi=*" } { "-mfloat-abi=hard" } } */
|
||||
/* { dg-skip-if "Skip these if testing double precision" {*-*-*} {"-mfpu=fpv[4-5]-d16"} {""} } */
|
||||
|
||||
#include "../../../cmse-13.x"
|
||||
|
||||
/* Checks for saving and clearing prior to function call. */
|
||||
/* { dg-final { scan-assembler "lsrs\tr4, r4, #1" } } */
|
||||
/* { dg-final { scan-assembler "lsls\tr4, r4, #1" } } */
|
||||
/* { dg-final { scan-assembler "mov\tr0, r4" } } */
|
||||
/* { dg-final { scan-assembler "mov\tr1, r4" } } */
|
||||
/* { dg-final { scan-assembler "mov\tr2, r4" } } */
|
||||
/* { dg-final { scan-assembler "mov\tr3, r4" } } */
|
||||
/* { dg-final { scan-assembler-not "vmov\.f32\ts0, #1\.0" } } */
|
||||
/* { dg-final { scan-assembler "vmov\.f32\ts1, #1\.0" } } */
|
||||
/* { dg-final { scan-assembler-not "vmov\.f32\ts2, #1\.0" } } */
|
||||
/* { dg-final { scan-assembler-not "vmov\.f32\ts3, #1\.0" } } */
|
||||
/* { dg-final { scan-assembler "vmov\.f32\ts4, #1\.0" } } */
|
||||
/* { dg-final { scan-assembler "vmov\.f32\ts5, #1\.0" } } */
|
||||
/* { dg-final { scan-assembler "vmov\.f32\ts6, #1\.0" } } */
|
||||
/* { dg-final { scan-assembler "vmov\.f32\ts7, #1\.0" } } */
|
||||
/* { dg-final { scan-assembler "vmov\.f32\ts8, #1\.0" } } */
|
||||
/* { dg-final { scan-assembler "vmov\.f32\ts9, #1\.0" } } */
|
||||
/* { dg-final { scan-assembler "vmov\.f32\ts10, #1\.0" } } */
|
||||
/* { dg-final { scan-assembler "vmov\.f32\ts11, #1\.0" } } */
|
||||
/* { dg-final { scan-assembler "vmov\.f32\ts12, #1\.0" } } */
|
||||
/* { dg-final { scan-assembler "vmov\.f32\ts13, #1\.0" } } */
|
||||
/* { dg-final { scan-assembler "vmov\.f32\ts14, #1\.0" } } */
|
||||
/* { dg-final { scan-assembler "vmov\.f32\ts15, #1\.0" } } */
|
||||
|
||||
/* Now we check that we use the correct intrinsic to call. */
|
||||
/* { dg-final { scan-assembler "bl\t__gnu_cmse_nonsecure_call" } } */
|
||||
@ -1,9 +1,9 @@
|
||||
/* { dg-do compile } */
|
||||
/* { dg-options "-mcmse -mfloat-abi=hard -mfpu=fpv5-sp-d16" } */
|
||||
/* { dg-skip-if "Do not combine float-abi= hard | soft | softfp" {*-*-*} {"-mfloat-abi=soft" -mfloat-abi=softfp } {""} } */
|
||||
/* { dg-skip-if "Incompatible float ABI" { *-*-* } { "-mfloat-abi=*" } { "-mfloat-abi=hard" } } */
|
||||
/* { dg-skip-if "Skip these if testing double precision" {*-*-*} {"-mfpu=fpv[4-5]-d16"} {""} } */
|
||||
|
||||
#include "../../cmse-5.x"
|
||||
#include "../../../cmse-5.x"
|
||||
|
||||
/* { dg-final { scan-assembler "mov\tr0, lr" } } */
|
||||
/* { dg-final { scan-assembler "mov\tr1, lr" } } */
|
||||
@ -0,0 +1,33 @@
|
||||
/* { dg-do compile } */
|
||||
/* { dg-options "-mcmse -mfloat-abi=hard -mfpu=fpv5-sp-d16" } */
|
||||
/* { dg-skip-if "Incompatible float ABI" { *-*-* } { "-mfloat-abi=*" } { "-mfloat-abi=hard" } } */
|
||||
/* { dg-skip-if "Skip these if testing double precision" {*-*-*} {"-mfpu=fpv[4-5]-d16"} {""} } */
|
||||
|
||||
#include "../../../cmse-7.x"
|
||||
|
||||
/* Checks for saving and clearing prior to function call. */
|
||||
/* { dg-final { scan-assembler "lsrs\tr4, r4, #1" } } */
|
||||
/* { dg-final { scan-assembler "lsls\tr4, r4, #1" } } */
|
||||
/* { dg-final { scan-assembler "mov\tr0, r4" } } */
|
||||
/* { dg-final { scan-assembler "mov\tr1, r4" } } */
|
||||
/* { dg-final { scan-assembler "mov\tr2, r4" } } */
|
||||
/* { dg-final { scan-assembler "mov\tr3, r4" } } */
|
||||
/* { dg-final { scan-assembler "vmov\.f32\ts0, #1\.0" } } */
|
||||
/* { dg-final { scan-assembler "vmov\.f32\ts1, #1\.0" } } */
|
||||
/* { dg-final { scan-assembler "vmov\.f32\ts2, #1\.0" } } */
|
||||
/* { dg-final { scan-assembler "vmov\.f32\ts3, #1\.0" } } */
|
||||
/* { dg-final { scan-assembler "vmov\.f32\ts4, #1\.0" } } */
|
||||
/* { dg-final { scan-assembler "vmov\.f32\ts5, #1\.0" } } */
|
||||
/* { dg-final { scan-assembler "vmov\.f32\ts6, #1\.0" } } */
|
||||
/* { dg-final { scan-assembler "vmov\.f32\ts7, #1\.0" } } */
|
||||
/* { dg-final { scan-assembler "vmov\.f32\ts8, #1\.0" } } */
|
||||
/* { dg-final { scan-assembler "vmov\.f32\ts9, #1\.0" } } */
|
||||
/* { dg-final { scan-assembler "vmov\.f32\ts10, #1\.0" } } */
|
||||
/* { dg-final { scan-assembler "vmov\.f32\ts11, #1\.0" } } */
|
||||
/* { dg-final { scan-assembler "vmov\.f32\ts12, #1\.0" } } */
|
||||
/* { dg-final { scan-assembler "vmov\.f32\ts13, #1\.0" } } */
|
||||
/* { dg-final { scan-assembler "vmov\.f32\ts14, #1\.0" } } */
|
||||
/* { dg-final { scan-assembler "vmov\.f32\ts15, #1\.0" } } */
|
||||
|
||||
/* Now we check that we use the correct intrinsic to call. */
|
||||
/* { dg-final { scan-assembler "bl\t__gnu_cmse_nonsecure_call" } } */
|
||||
@ -0,0 +1,33 @@
|
||||
/* { dg-do compile } */
|
||||
/* { dg-options "-mcmse -mfloat-abi=hard -mfpu=fpv5-sp-d16" } */
|
||||
/* { dg-skip-if "Incompatible float ABI" { *-*-* } { "-mfloat-abi=*" } { "-mfloat-abi=hard" } } */
|
||||
/* { dg-skip-if "Skip these if testing double precision" {*-*-*} {"-mfpu=fpv[4-5]-d16"} {""} } */
|
||||
|
||||
#include "../../../cmse-8.x"
|
||||
|
||||
/* Checks for saving and clearing prior to function call. */
|
||||
/* { dg-final { scan-assembler "lsrs\tr4, r4, #1" } } */
|
||||
/* { dg-final { scan-assembler "lsls\tr4, r4, #1" } } */
|
||||
/* { dg-final { scan-assembler "mov\tr0, r4" } } */
|
||||
/* { dg-final { scan-assembler "mov\tr1, r4" } } */
|
||||
/* { dg-final { scan-assembler "mov\tr2, r4" } } */
|
||||
/* { dg-final { scan-assembler "mov\tr3, r4" } } */
|
||||
/* { dg-final { scan-assembler-not "vmov\.f32\ts0, #1\.0" } } */
|
||||
/* { dg-final { scan-assembler-not "vmov\.f32\ts1, #1\.0" } } */
|
||||
/* { dg-final { scan-assembler "vmov\.f32\ts2, #1\.0" } } */
|
||||
/* { dg-final { scan-assembler "vmov\.f32\ts3, #1\.0" } } */
|
||||
/* { dg-final { scan-assembler "vmov\.f32\ts4, #1\.0" } } */
|
||||
/* { dg-final { scan-assembler "vmov\.f32\ts5, #1\.0" } } */
|
||||
/* { dg-final { scan-assembler "vmov\.f32\ts6, #1\.0" } } */
|
||||
/* { dg-final { scan-assembler "vmov\.f32\ts7, #1\.0" } } */
|
||||
/* { dg-final { scan-assembler "vmov\.f32\ts8, #1\.0" } } */
|
||||
/* { dg-final { scan-assembler "vmov\.f32\ts9, #1\.0" } } */
|
||||
/* { dg-final { scan-assembler "vmov\.f32\ts10, #1\.0" } } */
|
||||
/* { dg-final { scan-assembler "vmov\.f32\ts11, #1\.0" } } */
|
||||
/* { dg-final { scan-assembler "vmov\.f32\ts12, #1\.0" } } */
|
||||
/* { dg-final { scan-assembler "vmov\.f32\ts13, #1\.0" } } */
|
||||
/* { dg-final { scan-assembler "vmov\.f32\ts14, #1\.0" } } */
|
||||
/* { dg-final { scan-assembler "vmov\.f32\ts15, #1\.0" } } */
|
||||
|
||||
/* Now we check that we use the correct intrinsic to call. */
|
||||
/* { dg-final { scan-assembler "bl\t__gnu_cmse_nonsecure_call" } } */
|
||||
29
gcc/testsuite/gcc.target/arm/cmse/mainline/8m/hard/cmse-13.c
Normal file
29
gcc/testsuite/gcc.target/arm/cmse/mainline/8m/hard/cmse-13.c
Normal file
@ -0,0 +1,29 @@
|
||||
/* { dg-do compile } */
|
||||
/* { dg-options "-mcmse -mfloat-abi=hard -mfpu=fpv5-d16" } */
|
||||
/* { dg-skip-if "Incompatible float ABI" { *-*-* } { "-mfloat-abi=*" } { "-mfloat-abi=hard" } } */
|
||||
/* { dg-skip-if "Skip these if testing single precision" {*-*-*} {"-mfpu=*-sp-*"} {""} } */
|
||||
|
||||
#include "../../../cmse-13.x"
|
||||
|
||||
/* Checks for saving and clearing prior to function call. */
|
||||
/* { dg-final { scan-assembler "lsrs\tr4, r4, #1" } } */
|
||||
/* { dg-final { scan-assembler "lsls\tr4, r4, #1" } } */
|
||||
/* { dg-final { scan-assembler "mov\tr0, r4" } } */
|
||||
/* { dg-final { scan-assembler "mov\tr1, r4" } } */
|
||||
/* { dg-final { scan-assembler "mov\tr2, r4" } } */
|
||||
/* { dg-final { scan-assembler "mov\tr3, r4" } } */
|
||||
/* { dg-final { scan-assembler "vmov\.f32\ts1, #1\.0" } } */
|
||||
/* { dg-final { scan-assembler-not "vmov\.f32\ts0, #1\.0" } } */
|
||||
/* { dg-final { scan-assembler-not "vmov\.f64\td0, #1\.0" } } */
|
||||
/* { dg-final { scan-assembler-not "vmov\.f64\td1, #1\.0" } } */
|
||||
/* { dg-final { scan-assembler-not "vmov\.f32\ts2, #1\.0" } } */
|
||||
/* { dg-final { scan-assembler-not "vmov\.f32\ts3, #1\.0" } } */
|
||||
/* { dg-final { scan-assembler "vmov\.f64\td2, #1\.0" } } */
|
||||
/* { dg-final { scan-assembler "vmov\.f64\td3, #1\.0" } } */
|
||||
/* { dg-final { scan-assembler "vmov\.f64\td4, #1\.0" } } */
|
||||
/* { dg-final { scan-assembler "vmov\.f64\td5, #1\.0" } } */
|
||||
/* { dg-final { scan-assembler "vmov\.f64\td6, #1\.0" } } */
|
||||
/* { dg-final { scan-assembler "vmov\.f64\td7, #1\.0" } } */
|
||||
|
||||
/* Now we check that we use the correct intrinsic to call. */
|
||||
/* { dg-final { scan-assembler "bl\t__gnu_cmse_nonsecure_call" } } */
|
||||
@ -1,9 +1,9 @@
|
||||
/* { dg-do compile } */
|
||||
/* { dg-options "-mcmse -mfloat-abi=hard -mfpu=fpv5-d16" } */
|
||||
/* { dg-skip-if "Do not combine float-abi= hard | soft | softfp" {*-*-*} {"-mfloat-abi=soft" -mfloat-abi=softfp } {""} } */
|
||||
/* { dg-skip-if "Incompatible float ABI" { *-*-* } { "-mfloat-abi=*" } { "-mfloat-abi=hard" } } */
|
||||
/* { dg-skip-if "Skip these if testing single precision" {*-*-*} {"-mfpu=*-sp-*"} {""} } */
|
||||
|
||||
#include "../../cmse-5.x"
|
||||
#include "../../../cmse-5.x"
|
||||
|
||||
/* { dg-final { scan-assembler "mov\tr0, lr" } } */
|
||||
/* { dg-final { scan-assembler "mov\tr1, lr" } } */
|
||||
25
gcc/testsuite/gcc.target/arm/cmse/mainline/8m/hard/cmse-7.c
Normal file
25
gcc/testsuite/gcc.target/arm/cmse/mainline/8m/hard/cmse-7.c
Normal file
@ -0,0 +1,25 @@
|
||||
/* { dg-do compile } */
|
||||
/* { dg-options "-mcmse -mfloat-abi=hard -mfpu=fpv5-d16" } */
|
||||
/* { dg-skip-if "Incompatible float ABI" { *-*-* } { "-mfloat-abi=*" } { "-mfloat-abi=hard" } } */
|
||||
/* { dg-skip-if "Skip these if testing single precision" {*-*-*} {"-mfpu=*-sp-*"} {""} } */
|
||||
|
||||
#include "../../../cmse-7.x"
|
||||
|
||||
/* Checks for saving and clearing prior to function call. */
|
||||
/* { dg-final { scan-assembler "lsrs\tr4, r4, #1" } } */
|
||||
/* { dg-final { scan-assembler "lsls\tr4, r4, #1" } } */
|
||||
/* { dg-final { scan-assembler "mov\tr0, r4" } } */
|
||||
/* { dg-final { scan-assembler "mov\tr1, r4" } } */
|
||||
/* { dg-final { scan-assembler "mov\tr2, r4" } } */
|
||||
/* { dg-final { scan-assembler "mov\tr3, r4" } } */
|
||||
/* { dg-final { scan-assembler "vmov\.f64\td0, #1\.0" } } */
|
||||
/* { dg-final { scan-assembler "vmov\.f64\td1, #1\.0" } } */
|
||||
/* { dg-final { scan-assembler "vmov\.f64\td2, #1\.0" } } */
|
||||
/* { dg-final { scan-assembler "vmov\.f64\td3, #1\.0" } } */
|
||||
/* { dg-final { scan-assembler "vmov\.f64\td4, #1\.0" } } */
|
||||
/* { dg-final { scan-assembler "vmov\.f64\td5, #1\.0" } } */
|
||||
/* { dg-final { scan-assembler "vmov\.f64\td6, #1\.0" } } */
|
||||
/* { dg-final { scan-assembler "vmov\.f64\td7, #1\.0" } } */
|
||||
|
||||
/* Now we check that we use the correct intrinsic to call. */
|
||||
/* { dg-final { scan-assembler "bl\t__gnu_cmse_nonsecure_call" } } */
|
||||
25
gcc/testsuite/gcc.target/arm/cmse/mainline/8m/hard/cmse-8.c
Normal file
25
gcc/testsuite/gcc.target/arm/cmse/mainline/8m/hard/cmse-8.c
Normal file
@ -0,0 +1,25 @@
|
||||
/* { dg-do compile } */
|
||||
/* { dg-options "-mcmse -mfloat-abi=hard -mfpu=fpv5-d16" } */
|
||||
/* { dg-skip-if "Incompatible float ABI" { *-*-* } { "-mfloat-abi=*" } { "-mfloat-abi=hard" } } */
|
||||
/* { dg-skip-if "Skip these if testing single precision" {*-*-*} {"-mfpu=*-sp-*"} {""} } */
|
||||
|
||||
#include "../../../cmse-8.x"
|
||||
|
||||
/* Checks for saving and clearing prior to function call. */
|
||||
/* { dg-final { scan-assembler "lsrs\tr4, r4, #1" } } */
|
||||
/* { dg-final { scan-assembler "lsls\tr4, r4, #1" } } */
|
||||
/* { dg-final { scan-assembler "mov\tr0, r4" } } */
|
||||
/* { dg-final { scan-assembler "mov\tr1, r4" } } */
|
||||
/* { dg-final { scan-assembler "mov\tr2, r4" } } */
|
||||
/* { dg-final { scan-assembler "mov\tr3, r4" } } */
|
||||
/* { dg-final { scan-assembler-not "vmov\.f64\td0, #1\.0" } } */
|
||||
/* { dg-final { scan-assembler "vmov\.f64\td1, #1\.0" } } */
|
||||
/* { dg-final { scan-assembler "vmov\.f64\td2, #1\.0" } } */
|
||||
/* { dg-final { scan-assembler "vmov\.f64\td3, #1\.0" } } */
|
||||
/* { dg-final { scan-assembler "vmov\.f64\td4, #1\.0" } } */
|
||||
/* { dg-final { scan-assembler "vmov\.f64\td5, #1\.0" } } */
|
||||
/* { dg-final { scan-assembler "vmov\.f64\td6, #1\.0" } } */
|
||||
/* { dg-final { scan-assembler "vmov\.f64\td7, #1\.0" } } */
|
||||
|
||||
/* Now we check that we use the correct intrinsic to call. */
|
||||
/* { dg-final { scan-assembler "bl\t__gnu_cmse_nonsecure_call" } } */
|
||||
18
gcc/testsuite/gcc.target/arm/cmse/mainline/8m/soft/cmse-13.c
Normal file
18
gcc/testsuite/gcc.target/arm/cmse/mainline/8m/soft/cmse-13.c
Normal file
@ -0,0 +1,18 @@
|
||||
/* { dg-do compile } */
|
||||
/* { dg-options "-mcmse -mfloat-abi=soft" } */
|
||||
/* { dg-skip-if "Incompatible float ABI" { *-*-* } { "-mfloat-abi=*" } { "-mfloat-abi=soft" } } */
|
||||
|
||||
#include "../../../cmse-13.x"
|
||||
|
||||
/* Checks for saving and clearing prior to function call. */
|
||||
/* { dg-final { scan-assembler "lsrs\tr4, r4, #1" } } */
|
||||
/* { dg-final { scan-assembler "lsls\tr4, r4, #1" } } */
|
||||
/* { dg-final { scan-assembler-not "mov\tr0, r4" } } */
|
||||
/* { dg-final { scan-assembler "mov\tr1, r4" } } */
|
||||
/* { dg-final { scan-assembler-not "mov\tr2, r4" } } */
|
||||
/* { dg-final { scan-assembler-not "mov\tr3, r4" } } */
|
||||
/* { dg-final { scan-assembler-not "vmov" } } */
|
||||
/* { dg-final { scan-assembler-not "vmsr" } } */
|
||||
|
||||
/* Now we check that we use the correct intrinsic to call. */
|
||||
/* { dg-final { scan-assembler "bl\t__gnu_cmse_nonsecure_call" } } */
|
||||
@ -1,8 +1,8 @@
|
||||
/* { dg-do compile } */
|
||||
/* { dg-options "-mcmse -mfloat-abi=soft" } */
|
||||
/* { dg-skip-if "Do not combine float-abi= hard | soft | softfp" {*-*-*} {"-mfloat-abi=hard" -mfloat-abi=softfp } {""} } */
|
||||
/* { dg-skip-if "Incompatible float ABI" { *-*-* } { "-mfloat-abi=*" } { "-mfloat-abi=soft" } } */
|
||||
|
||||
#include "../../cmse-5.x"
|
||||
#include "../../../cmse-5.x"
|
||||
|
||||
/* { dg-final { scan-assembler "mov\tr1, lr" } } */
|
||||
/* { dg-final { scan-assembler "mov\tr2, lr" } } */
|
||||
@ -13,4 +13,3 @@
|
||||
/* { dg-final { scan-assembler "msr\tAPSR_nzcvq, lr" { target { ! arm_dsp } } } } */
|
||||
/* { dg-final { scan-assembler "msr\tAPSR_nzcvqg, lr" { target arm_dsp } } } */
|
||||
/* { dg-final { scan-assembler "bxns" } } */
|
||||
|
||||
18
gcc/testsuite/gcc.target/arm/cmse/mainline/8m/soft/cmse-7.c
Normal file
18
gcc/testsuite/gcc.target/arm/cmse/mainline/8m/soft/cmse-7.c
Normal file
@ -0,0 +1,18 @@
|
||||
/* { dg-do compile } */
|
||||
/* { dg-options "-mcmse -mfloat-abi=soft" } */
|
||||
/* { dg-skip-if "Incompatible float ABI" { *-*-* } { "-mfloat-abi=*" } { "-mfloat-abi=soft" } } */
|
||||
|
||||
#include "../../../cmse-7.x"
|
||||
|
||||
/* Checks for saving and clearing prior to function call. */
|
||||
/* { dg-final { scan-assembler "lsrs\tr4, r4, #1" } } */
|
||||
/* { dg-final { scan-assembler "lsls\tr4, r4, #1" } } */
|
||||
/* { dg-final { scan-assembler "mov\tr0, r4" } } */
|
||||
/* { dg-final { scan-assembler "mov\tr1, r4" } } */
|
||||
/* { dg-final { scan-assembler "mov\tr2, r4" } } */
|
||||
/* { dg-final { scan-assembler "mov\tr3, r4" } } */
|
||||
/* { dg-final { scan-assembler-not "vmov" } } */
|
||||
/* { dg-final { scan-assembler-not "vmsr" } } */
|
||||
|
||||
/* Now we check that we use the correct intrinsic to call. */
|
||||
/* { dg-final { scan-assembler "bl\t__gnu_cmse_nonsecure_call" } } */
|
||||
18
gcc/testsuite/gcc.target/arm/cmse/mainline/8m/soft/cmse-8.c
Normal file
18
gcc/testsuite/gcc.target/arm/cmse/mainline/8m/soft/cmse-8.c
Normal file
@ -0,0 +1,18 @@
|
||||
/* { dg-do compile } */
|
||||
/* { dg-options "-mcmse -mfloat-abi=soft" } */
|
||||
/* { dg-skip-if "Incompatible float ABI" { *-*-* } { "-mfloat-abi=*" } { "-mfloat-abi=soft" } } */
|
||||
|
||||
#include "../../../cmse-8.x"
|
||||
|
||||
/* Checks for saving and clearing prior to function call. */
|
||||
/* { dg-final { scan-assembler "lsrs\tr4, r4, #1" } } */
|
||||
/* { dg-final { scan-assembler "lsls\tr4, r4, #1" } } */
|
||||
/* { dg-final { scan-assembler-not "mov\tr0, r4" } } */
|
||||
/* { dg-final { scan-assembler-not "mov\tr1, r4" } } */
|
||||
/* { dg-final { scan-assembler "mov\tr2, r4" } } */
|
||||
/* { dg-final { scan-assembler "mov\tr3, r4" } } */
|
||||
/* { dg-final { scan-assembler-not "vmov" } } */
|
||||
/* { dg-final { scan-assembler-not "vmsr" } } */
|
||||
|
||||
/* Now we check that we use the correct intrinsic to call. */
|
||||
/* { dg-final { scan-assembler "bl\t__gnu_cmse_nonsecure_call" } } */
|
||||
@ -1,9 +1,9 @@
|
||||
/* { dg-do compile } */
|
||||
/* { dg-options "-mcmse -mfloat-abi=softfp -mfpu=fpv5-sp-d16" } */
|
||||
/* { dg-skip-if "Do not combine float-abi= hard | soft | softfp" {*-*-*} {"-mfloat-abi=soft" -mfloat-abi=hard } {""} } */
|
||||
/* { dg-skip-if "Incompatible float ABI" { *-*-* } { "-mfloat-abi=*" } { "-mfloat-abi=softfp" } } */
|
||||
/* { dg-skip-if "Skip these if testing double precision" {*-*-*} {"-mfpu=fpv[4-5]-d16"} {""} } */
|
||||
|
||||
#include "../../cmse-5.x"
|
||||
#include "../../../cmse-5.x"
|
||||
|
||||
/* { dg-final { scan-assembler "__acle_se_foo:" } } */
|
||||
/* { dg-final { scan-assembler-not "mov\tr0, lr" } } */
|
||||
@ -0,0 +1,17 @@
|
||||
/* { dg-do compile } */
|
||||
/* { dg-options "-mcmse -mfloat-abi=softfp -mfpu=fpv5-sp-d16" } */
|
||||
/* { dg-skip-if "Incompatible float ABI" { *-*-* } { "-mfloat-abi=*" } { "-mfloat-abi=softfp" } } */
|
||||
/* { dg-skip-if "Skip these if testing double precision" {*-*-*} {"-mfpu=fpv[4-5]-d16"} {""} } */
|
||||
|
||||
#include "../../../cmse-7.x"
|
||||
|
||||
/* Checks for saving and clearing prior to function call. */
|
||||
/* { dg-final { scan-assembler "lsrs\tr4, r4, #1" } } */
|
||||
/* { dg-final { scan-assembler "lsls\tr4, r4, #1" } } */
|
||||
/* { dg-final { scan-assembler "mov\tr0, r4" } } */
|
||||
/* { dg-final { scan-assembler "mov\tr1, r4" } } */
|
||||
/* { dg-final { scan-assembler "mov\tr2, r4" } } */
|
||||
/* { dg-final { scan-assembler "mov\tr3, r4" } } */
|
||||
|
||||
/* Now we check that we use the correct intrinsic to call. */
|
||||
/* { dg-final { scan-assembler "bl\t__gnu_cmse_nonsecure_call" } } */
|
||||
@ -0,0 +1,17 @@
|
||||
/* { dg-do compile } */
|
||||
/* { dg-options "-mcmse -mfloat-abi=softfp -mfpu=fpv5-sp-d16" } */
|
||||
/* { dg-skip-if "Incompatible float ABI" { *-*-* } { "-mfloat-abi=*" } { "-mfloat-abi=softfp" } } */
|
||||
/* { dg-skip-if "Skip these if testing double precision" {*-*-*} {"-mfpu=fpv[4-5]-d16"} {""} } */
|
||||
|
||||
#include "../../../cmse-8.x"
|
||||
|
||||
/* Checks for saving and clearing prior to function call. */
|
||||
/* { dg-final { scan-assembler "lsrs\tr4, r4, #1" } } */
|
||||
/* { dg-final { scan-assembler "lsls\tr4, r4, #1" } } */
|
||||
/* { dg-final { scan-assembler-not "mov\tr0, r4" } } */
|
||||
/* { dg-final { scan-assembler-not "mov\tr1, r4" } } */
|
||||
/* { dg-final { scan-assembler "mov\tr2, r4" } } */
|
||||
/* { dg-final { scan-assembler "mov\tr3, r4" } } */
|
||||
|
||||
/* Now we check that we use the correct intrinsic to call. */
|
||||
/* { dg-final { scan-assembler "bl\t__gnu_cmse_nonsecure_call" } } */
|
||||
@ -0,0 +1,16 @@
|
||||
/* { dg-do compile } */
|
||||
/* { dg-options "-mcmse -mfloat-abi=softfp -mfpu=fpv5-d16" } */
|
||||
/* { dg-skip-if "Incompatible float ABI" { *-*-* } { "-mfloat-abi=*" } { "-mfloat-abi=softfp" } } */
|
||||
/* { dg-skip-if "Skip these if testing single precision" {*-*-*} {"-mfpu=*-sp-*"} {""} } */
|
||||
|
||||
#include "../../../cmse-13.x"
|
||||
|
||||
/* Checks for saving and clearing prior to function call. */
|
||||
/* { dg-final { scan-assembler "lsrs\tr4, r4, #1" } } */
|
||||
/* { dg-final { scan-assembler "lsls\tr4, r4, #1" } } */
|
||||
/* { dg-final { scan-assembler-not "mov\tr0, r4" } } */
|
||||
/* { dg-final { scan-assembler "\n\tmov\tr1, r4" } } */
|
||||
/* { dg-final { scan-assembler-not "\n\tmov\tr2, r4\n\tmov\tr3, r4" } } */
|
||||
|
||||
/* Now we check that we use the correct intrinsic to call. */
|
||||
/* { dg-final { scan-assembler "bl\t__gnu_cmse_nonsecure_call" } } */
|
||||
@ -1,9 +1,9 @@
|
||||
/* { dg-do compile } */
|
||||
/* { dg-options "-mcmse -mfloat-abi=softfp -mfpu=fpv5-d16" } */
|
||||
/* { dg-skip-if "Do not combine float-abi= hard | soft | softfp" {*-*-*} {"-mfloat-abi=soft" -mfloat-abi=hard } {""} } */
|
||||
/* { dg-skip-if "Incompatible float ABI" { *-*-* } { "-mfloat-abi=*" } { "-mfloat-abi=softfp" } } */
|
||||
/* { dg-skip-if "Skip these if testing single precision" {*-*-*} {"-mfpu=*-sp-*"} {""} } */
|
||||
|
||||
#include "../../cmse-5.x"
|
||||
#include "../../../cmse-5.x"
|
||||
|
||||
/* { dg-final { scan-assembler "__acle_se_foo:" } } */
|
||||
/* { dg-final { scan-assembler-not "mov\tr0, lr" } } */
|
||||
@ -0,0 +1,17 @@
|
||||
/* { dg-do compile } */
|
||||
/* { dg-options "-mcmse -mfloat-abi=softfp -mfpu=fpv5-d16" } */
|
||||
/* { dg-skip-if "Incompatible float ABI" { *-*-* } { "-mfloat-abi=*" } { "-mfloat-abi=softfp" } } */
|
||||
/* { dg-skip-if "Skip these if testing single precision" {*-*-*} {"-mfpu=*-sp-*"} {""} } */
|
||||
|
||||
#include "../../../cmse-7.x"
|
||||
|
||||
/* Checks for saving and clearing prior to function call. */
|
||||
/* { dg-final { scan-assembler "lsrs\tr4, r4, #1" } } */
|
||||
/* { dg-final { scan-assembler "lsls\tr4, r4, #1" } } */
|
||||
/* { dg-final { scan-assembler "mov\tr0, r4" } } */
|
||||
/* { dg-final { scan-assembler "mov\tr1, r4" } } */
|
||||
/* { dg-final { scan-assembler "mov\tr2, r4" } } */
|
||||
/* { dg-final { scan-assembler "mov\tr3, r4" } } */
|
||||
|
||||
/* Now we check that we use the correct intrinsic to call. */
|
||||
/* { dg-final { scan-assembler "bl\t__gnu_cmse_nonsecure_call" } } */
|
||||
@ -0,0 +1,17 @@
|
||||
/* { dg-do compile } */
|
||||
/* { dg-options "-mcmse -mfloat-abi=softfp -mfpu=fpv5-d16" } */
|
||||
/* { dg-skip-if "Incompatible float ABI" { *-*-* } { "-mfloat-abi=*" } { "-mfloat-abi=softfp" } } */
|
||||
/* { dg-skip-if "Skip these if testing single precision" {*-*-*} {"-mfpu=*-sp-*"} {""} } */
|
||||
|
||||
#include "../../../cmse-8.x"
|
||||
|
||||
/* Checks for saving and clearing prior to function call. */
|
||||
/* { dg-final { scan-assembler "lsrs\tr4, r4, #1" } } */
|
||||
/* { dg-final { scan-assembler "lsls\tr4, r4, #1" } } */
|
||||
/* { dg-final { scan-assembler-not "mov\tr0, r4" } } */
|
||||
/* { dg-final { scan-assembler-not "mov\tr1, r4" } } */
|
||||
/* { dg-final { scan-assembler "mov\tr2, r4" } } */
|
||||
/* { dg-final { scan-assembler "mov\tr3, r4" } } */
|
||||
|
||||
/* Now we check that we use the correct intrinsic to call. */
|
||||
/* { dg-final { scan-assembler "bl\t__gnu_cmse_nonsecure_call" } } */
|
||||
15
gcc/testsuite/gcc.target/arm/cmse/mainline/8m/union-1.c
Normal file
15
gcc/testsuite/gcc.target/arm/cmse/mainline/8m/union-1.c
Normal file
@ -0,0 +1,15 @@
|
||||
/* { dg-do compile } */
|
||||
/* { dg-options "-mcmse" } */
|
||||
|
||||
#include "../../union-1.x"
|
||||
|
||||
/* { dg-final { scan-assembler "movw\tip, #8063" } } */
|
||||
/* { dg-final { scan-assembler "movt\tip, 63" } } */
|
||||
/* { dg-final { scan-assembler "and\tr0, r0, ip" } } */
|
||||
/* { dg-final { scan-assembler "movw\tip, #511" } } */
|
||||
/* { dg-final { scan-assembler "and\tr1, r1, ip" } } */
|
||||
/* { dg-final { scan-assembler "lsrs\tr4, r4, #1" } } */
|
||||
/* { dg-final { scan-assembler "lsls\tr4, r4, #1" } } */
|
||||
/* { dg-final { scan-assembler "mov\tr2, r4" } } */
|
||||
/* { dg-final { scan-assembler "mov\tr3, r4" } } */
|
||||
/* { dg-final { scan-assembler "bl\t__gnu_cmse_nonsecure_call" } } */
|
||||
18
gcc/testsuite/gcc.target/arm/cmse/mainline/8m/union-2.c
Normal file
18
gcc/testsuite/gcc.target/arm/cmse/mainline/8m/union-2.c
Normal file
@ -0,0 +1,18 @@
|
||||
/* { dg-do compile } */
|
||||
/* { dg-options "-mcmse" } */
|
||||
|
||||
#include "../../union-2.x"
|
||||
|
||||
/* { dg-final { scan-assembler "movw\tip, #8191" } } */
|
||||
/* { dg-final { scan-assembler "movt\tip, 63" } } */
|
||||
/* { dg-final { scan-assembler "and\tr0, r0, ip" } } */
|
||||
/* { dg-final { scan-assembler "movw\tip, #511" } } */
|
||||
/* { dg-final { scan-assembler "movt\tip, 65535" } } */
|
||||
/* { dg-final { scan-assembler "and\tr1, r1, ip" } } */
|
||||
/* { dg-final { scan-assembler "movw\tip, #65535" } } */
|
||||
/* { dg-final { scan-assembler "movt\tip, 31" } } */
|
||||
/* { dg-final { scan-assembler "and\tr2, r2, ip" } } */
|
||||
/* { dg-final { scan-assembler "lsrs\tr4, r4, #1" } } */
|
||||
/* { dg-final { scan-assembler "lsls\tr4, r4, #1" } } */
|
||||
/* { dg-final { scan-assembler "mov\tr3, r4" } } */
|
||||
/* { dg-final { scan-assembler "bl\t__gnu_cmse_nonsecure_call" } } */
|
||||
@ -25,9 +25,9 @@ main (void)
|
||||
return 0;
|
||||
}
|
||||
|
||||
/* { dg-final { scan-assembler "vstr\tFPCXTNS, \\\[sp, #-4\\\]!" { target arm_cmse_clear_ok } } } */
|
||||
/* { dg-final { scan-assembler "movs\tr1, #255" } } */
|
||||
/* { dg-final { scan-assembler "movt\tr1, 65535" } } */
|
||||
/* { dg-final { scan-assembler "ands\tr0(, r0)?, r1" } } */
|
||||
/* { dg-final { scan-assembler "vldr\tFPCXTNS, \\\[sp\\\], #4" { target arm_cmse_clear_ok } } } */
|
||||
/* { dg-final { scan-assembler "bxns" } } */
|
||||
|
||||
|
||||
|
||||
@ -4525,6 +4525,19 @@ proc check_effective_target_arm_cmse_ok {} {
|
||||
} "-mcmse"];
|
||||
}
|
||||
|
||||
# Return 1 if this is an ARM target where ARMv8-M Security Extensions with
|
||||
# clearing instructions (clrm, vscclrm, vstr/vldr with FPCXT) is available.
|
||||
|
||||
proc check_effective_target_arm_cmse_clear_ok {} {
|
||||
return [check_no_compiler_messages arm_cmse_clear object {
|
||||
int
|
||||
foo (void)
|
||||
{
|
||||
asm ("clrm {r1, r2}");
|
||||
}
|
||||
} "-mcmse"];
|
||||
}
|
||||
|
||||
# Return 1 if this compilation turns on string_ops_prefer_neon on.
|
||||
|
||||
proc check_effective_target_arm_tune_string_ops_prefer_neon { } {
|
||||
|
||||
Loading…
x
Reference in New Issue
Block a user