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Fix bugs in -mvsx-scalar-memory and -mvsx-scalar-double
From-SVN: r183048
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@ -1,3 +1,12 @@
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* config/rs6000/rs6000.c (rs6000_init_hard_regno_mode_ok): Add DF
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reload patterns if -mvsx-scalar-memory.
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* config/rs6000/vsx.md (vsx_xscvspdp): Allow xscvspdp to be
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generated, even -mno-vsx-scalar-double was used.
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(vsx_xscvdpsp_scalar): Likewise.
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(vsx_xscvspdp_scalar2): Likewise.
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2012-01-09 Tom de Vries <tom@codesourcery.com>
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Andrew Pinski <apinski@cavium.com>
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@ -1,6 +1,7 @@
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/* Subroutines used for code generation on IBM RS/6000.
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Copyright (C) 1991, 1993, 1994, 1995, 1996, 1997, 1998, 1999,
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2000, 2001, 2002, 2003, 2004, 2005, 2006, 2007, 2008, 2009, 2010, 2011
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2000, 2001, 2002, 2003, 2004, 2005, 2006, 2007, 2008, 2009, 2010, 2011,
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2012
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Free Software Foundation, Inc.
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Contributed by Richard Kenner (kenner@vlsi1.ultra.nyu.edu)
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@ -2332,6 +2333,11 @@ rs6000_init_hard_regno_mode_ok (bool global_init_p)
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rs6000_vector_reload[V4SFmode][1] = CODE_FOR_reload_v4sf_di_load;
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rs6000_vector_reload[V2DFmode][0] = CODE_FOR_reload_v2df_di_store;
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rs6000_vector_reload[V2DFmode][1] = CODE_FOR_reload_v2df_di_load;
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if (TARGET_VSX && TARGET_VSX_SCALAR_MEMORY)
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{
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rs6000_vector_reload[DFmode][0] = CODE_FOR_reload_df_di_store;
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rs6000_vector_reload[DFmode][1] = CODE_FOR_reload_df_di_load;
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}
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}
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else
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{
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@ -2347,6 +2353,11 @@ rs6000_init_hard_regno_mode_ok (bool global_init_p)
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rs6000_vector_reload[V4SFmode][1] = CODE_FOR_reload_v4sf_si_load;
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rs6000_vector_reload[V2DFmode][0] = CODE_FOR_reload_v2df_si_store;
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rs6000_vector_reload[V2DFmode][1] = CODE_FOR_reload_v2df_si_load;
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if (TARGET_VSX && TARGET_VSX_SCALAR_MEMORY)
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{
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rs6000_vector_reload[DFmode][0] = CODE_FOR_reload_df_si_store;
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rs6000_vector_reload[DFmode][1] = CODE_FOR_reload_df_si_load;
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}
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}
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}
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@ -1,5 +1,5 @@
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;; VSX patterns.
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;; Copyright (C) 2009, 2010, 2011
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;; Copyright (C) 2009, 2010, 2011, 2012
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;; Free Software Foundation, Inc.
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;; Contributed by Michael Meissner <meissner@linux.vnet.ibm.com>
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@ -919,7 +919,7 @@
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[(set (match_operand:DF 0 "vsx_register_operand" "=ws,?wa")
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(unspec:DF [(match_operand:V4SF 1 "vsx_register_operand" "wa,wa")]
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UNSPEC_VSX_CVSPDP))]
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"VECTOR_UNIT_VSX_P (DFmode)"
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"VECTOR_UNIT_VSX_P (V4SFmode)"
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"xscvspdp %x0,%x1"
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[(set_attr "type" "fp")])
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@ -929,7 +929,7 @@
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[(set (match_operand:V4SF 0 "vsx_register_operand" "=wa")
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(unspec:V4SF [(match_operand:SF 1 "vsx_register_operand" "f")]
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UNSPEC_VSX_CVSPDP))]
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"VECTOR_UNIT_VSX_P (DFmode)"
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"VECTOR_UNIT_VSX_P (V4SFmode)"
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"xscvdpsp %x0,%x1"
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[(set_attr "type" "fp")])
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@ -938,7 +938,7 @@
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[(set (match_operand:SF 0 "vsx_register_operand" "=f")
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(unspec:SF [(match_operand:V4SF 1 "vsx_register_operand" "wa")]
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UNSPEC_VSX_CVSPDP))]
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"VECTOR_UNIT_VSX_P (DFmode)"
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"VECTOR_UNIT_VSX_P (V4SFmode)"
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"xscvspdp %x0,%x1"
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[(set_attr "type" "fp")])
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