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amdgcn: Fix vector compare modes

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The GCN VCC register has 64 CC values in one registers, one bit for each
vector lane.

Previously we avoided problems with invalid optimizations by not declaring
a mode for the comparison operators, but it turns out that causes other
problems (and build warnings).

Instead, the optimization issues can be avoided by setting
STORE_REGISTER_VALUE to -1, meaning that all the bits are significant.

(It would be better if we could set STORE_REGISTER_VALUE according to the
known mask or vector size, but we can't.)

2020-03-18  Andrew Stubbs  <ams@codesourcery.com>

	gcc/
	* config/gcn/gcn-valu.md (vec_cmp<mode>di): Set operand 1 to DImode.
	(vec_cmp<mode>di_dup): Likewise.
	* config/gcn/gcn.h (STORE_FLAG_VALUE): Set to -1.
This commit is contained in:
Andrew Stubbs 2020-03-17 12:49:19 +00:00
parent 5a80a6c3e5
commit dbde9e2d59
3 changed files with 12 additions and 2 deletions
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6
gcc/ChangeLog
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@ -1,3 +1,9 @@
2020-03-18 Andrew Stubbs <ams@codesourcery.com>
* config/gcn/gcn-valu.md (vec_cmp<mode>di): Set operand 1 to DImode.
(vec_cmp<mode>di_dup): Likewise.
* config/gcn/gcn.h (STORE_FLAG_VALUE): Set to -1.
2020-03-18 Andrew Stubbs <ams@codesourcery.com>
* config/gcn/gcn-valu.md (COND_MODE): Delete.

4
gcc/config/gcn/gcn-valu.md
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@ -2549,7 +2549,7 @@
(define_insn "vec_cmp<mode>di"
[(set (match_operand:DI 0 "register_operand" "=cV,cV, e, e,Sg,Sg")
(match_operator 1 "gcn_fp_compare_operator"
(match_operator:DI 1 "gcn_fp_compare_operator"
[(match_operand:VCMP_MODE 2 "gcn_alu_operand"
"vSv, B,vSv, B, v,vA")
(match_operand:VCMP_MODE 3 "gcn_vop3_operand"
@ -2658,7 +2658,7 @@
(define_insn "vec_cmp<mode>di_dup"
[(set (match_operand:DI 0 "register_operand" "=cV,cV, e,e,Sg")
(match_operator 1 "gcn_fp_compare_operator"
(match_operator:DI 1 "gcn_fp_compare_operator"
[(vec_duplicate:VCMP_MODE
(match_operand:<SCALAR_MODE> 2 "gcn_alu_operand"
" Sv, B,Sv,B, A"))

4
gcc/config/gcn/gcn.h
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@ -607,6 +607,10 @@ enum gcn_builtin_codes
#define SLOW_BYTE_ACCESS 0
#define WORD_REGISTER_OPERATIONS 1
/* Flag values are either BImode or DImode, but either way the compiler
should assume that all the bits are live. */
#define STORE_FLAG_VALUE -1
/* Definitions for register eliminations.
This is an array of structures. Each structure initializes one pair