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alpha.c (alpha_emit_set_long_const): Remove c1 argument.
* config/alpha/alpha.c (alpha_emit_set_long_const): Remove c1 argument. (alpha_extract_integer): Redeclare as static HOST_WIDE_INT. Remove *p0 and *p1 arguments. Rewrite function. (alpha_legitimate_constant_p): Update call to alpha_extract_integer. (alpha_split_const_mov): Update calls to alpha_extract_integer and alpha_emit_set_long_const. (alpha_expand_epilogue): Update calls to alpha_emit_set_long_const. (alpha_output_mi_thunk_osf): Ditto. * config/alpha/alpha.md (movti): Do not check operands[1] for CONST_DOUBLE. From-SVN: r223166
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Uros Bizjak
Uros Bizjak
parent
1ece8d4c77
commit
da80c6b81f
@ -1,3 +1,16 @@
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2015-05-13 Uros Bizjak <ubizjak@gmail.com>
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* config/alpha/alpha.c (alpha_emit_set_long_const): Remove c1 argument.
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(alpha_extract_integer): Redeclare as static HOST_WIDE_INT.
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Remove *p0 and *p1 arguments. Rewrite function.
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(alpha_legitimate_constant_p): Update call to alpha_extract_integer.
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(alpha_split_const_mov): Update calls to alpha_extract_integer and
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alpha_emit_set_long_const.
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(alpha_expand_epilogue): Update calls to alpha_emit_set_long_const.
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(alpha_output_mi_thunk_osf): Ditto.
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* config/alpha/alpha.md (movti): Do not check operands[1]
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for CONST_DOUBLE.
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2015-05-13 Richard Biener <rguenther@suse.de>
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PR tree-optimization/66129
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@ -2068,13 +2068,12 @@ alpha_emit_set_const (rtx target, machine_mode mode,
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with alpha_emit_set_const. */
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static rtx
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alpha_emit_set_long_const (rtx target, HOST_WIDE_INT c1, HOST_WIDE_INT c2)
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alpha_emit_set_long_const (rtx target, HOST_WIDE_INT c1)
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{
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HOST_WIDE_INT d1, d2, d3, d4;
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/* Decompose the entire word */
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gcc_assert (c2 == -(c1 < 0));
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d1 = ((c1 & 0xffff) ^ 0x8000) - 0x8000;
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c1 -= d1;
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d2 = ((c1 & 0xffffffff) ^ 0x80000000) - 0x80000000;
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@ -2109,25 +2108,23 @@ alpha_emit_set_long_const (rtx target, HOST_WIDE_INT c1, HOST_WIDE_INT c2)
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/* Given an integral CONST_INT, CONST_WIDE_INT, CONST_DOUBLE,
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or CONST_VECTOR, return the low 64 bits. */
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static void
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alpha_extract_integer (rtx x, HOST_WIDE_INT *p0, HOST_WIDE_INT *p1)
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static HOST_WIDE_INT
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alpha_extract_integer (rtx x)
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{
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HOST_WIDE_INT i0, i1;
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if (GET_CODE (x) == CONST_VECTOR)
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x = simplify_subreg (DImode, x, GET_MODE (x), 0);
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if (CONST_INT_P (x))
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i0 = INTVAL (x);
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else if (CONST_WIDE_INT_P (x))
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i0 = CONST_WIDE_INT_ELT (x, 0);
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else
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i0 = CONST_DOUBLE_LOW (x);
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i1 = -(i0 < 0);
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*p0 = i0;
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*p1 = i1;
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switch (GET_CODE (x))
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{
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case CONST_INT:
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return INTVAL (x);
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case CONST_WIDE_INT:
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return CONST_WIDE_INT_ELT (x, 0);
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case CONST_DOUBLE:
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return CONST_DOUBLE_LOW (x);
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default:
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gcc_unreachable ();
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}
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}
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/* Implement TARGET_LEGITIMATE_CONSTANT_P. This is all constants for which
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@ -2138,7 +2135,7 @@ alpha_extract_integer (rtx x, HOST_WIDE_INT *p0, HOST_WIDE_INT *p1)
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bool
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alpha_legitimate_constant_p (machine_mode mode, rtx x)
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{
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HOST_WIDE_INT i0, i1;
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HOST_WIDE_INT i0;
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switch (GET_CODE (x))
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{
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@ -2185,7 +2182,7 @@ alpha_legitimate_constant_p (machine_mode mode, rtx x)
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do_integer:
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if (TARGET_BUILD_CONSTANTS)
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return true;
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alpha_extract_integer (x, &i0, &i1);
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i0 = alpha_extract_integer (x);
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return alpha_emit_set_const_1 (x, mode, i0, 3, true) != NULL;
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default:
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@ -2199,15 +2196,15 @@ alpha_legitimate_constant_p (machine_mode mode, rtx x)
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bool
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alpha_split_const_mov (machine_mode mode, rtx *operands)
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{
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HOST_WIDE_INT i0, i1;
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HOST_WIDE_INT i0;
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rtx temp = NULL_RTX;
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alpha_extract_integer (operands[1], &i0, &i1);
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i0 = alpha_extract_integer (operands[1]);
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temp = alpha_emit_set_const (operands[0], mode, i0, 3, false);
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if (!temp && TARGET_BUILD_CONSTANTS)
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temp = alpha_emit_set_long_const (operands[0], i0, i1);
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temp = alpha_emit_set_long_const (operands[0], i0);
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if (temp)
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{
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@ -8260,8 +8257,7 @@ alpha_expand_epilogue (void)
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{
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/* We can't drop new things to memory this late, afaik,
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so build it up by pieces. */
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sp_adj2 = alpha_emit_set_long_const (tmp, frame_size,
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-(frame_size < 0));
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sp_adj2 = alpha_emit_set_long_const (tmp, frame_size);
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gcc_assert (sp_adj2);
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}
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}
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@ -8388,8 +8384,7 @@ alpha_output_mi_thunk_osf (FILE *file, tree thunk_fndecl ATTRIBUTE_UNUSED,
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}
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else
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{
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rtx tmp = alpha_emit_set_long_const (gen_rtx_REG (Pmode, 0),
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delta, -(delta < 0));
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rtx tmp = alpha_emit_set_long_const (gen_rtx_REG (Pmode, 0), delta);
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emit_insn (gen_adddi3 (this_rtx, this_rtx, tmp));
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}
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@ -8411,7 +8406,7 @@ alpha_output_mi_thunk_osf (FILE *file, tree thunk_fndecl ATTRIBUTE_UNUSED,
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else
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{
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tmp2 = alpha_emit_set_long_const (gen_rtx_REG (Pmode, 1),
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vcall_offset, -(vcall_offset < 0));
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vcall_offset);
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emit_insn (gen_adddi3 (tmp, tmp, tmp2));
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lo = 0;
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}
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@ -3867,7 +3867,7 @@
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operands[1] = force_reg (TFmode, operands[1]);
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})
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(define_insn_and_split "*movtf"
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(define_insn_and_split "*movtf_internal"
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[(set (match_operand:TF 0 "nonimmediate_operand" "=r,o")
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(match_operand:TF 1 "input_operand" "roG,rG"))]
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"register_operand (operands[0], TFmode)
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@ -4154,8 +4154,7 @@
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32-bit constants in TImode and rely on the splitter, but
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this doesn't seem to be worth the pain. */
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else if (CONST_INT_P (operands[1])
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|| GET_CODE (operands[1]) == CONST_WIDE_INT
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|| GET_CODE (operands[1]) == CONST_DOUBLE)
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|| GET_CODE (operands[1]) == CONST_WIDE_INT)
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{
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rtx in[2], out[2], target;
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