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LoongArch: Remove masking process for operand 3 of xvpermi.q.

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The behavior of non-zero unused bits in xvpermi.q instruction's
third operand is undefined on LoongArch, according to our
discussion (https://github.com/llvm/llvm-project/pull/83540),
we think that keeping original insn operand as unmodified
state is better solution.

This patch partially reverts 7b158e036a.

gcc/ChangeLog:

	* config/loongarch/lasx.md (lasx_xvpermi_q_<LASX:mode>):
	Remove masking of operand 3.

gcc/testsuite/ChangeLog:

	* gcc.target/loongarch/vector/lasx/lasx-xvpermi_q.c:
	Reposition operand 3's value into instruction's defined accept range.
This commit is contained in:
Chenghui Pan 2024-03-14 09:26:54 +08:00 committed by Lulu Cheng
parent c1f6690b82
commit d7d05824ae
2 changed files with 3 additions and 8 deletions
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5
gcc/config/loongarch/lasx.md
View File

@ -640,8 +640,6 @@
(set_attr "mode" "<MODE>")])
;; xvpermi.q
;; Unused bits in operands[3] need be set to 0 to avoid
;; causing undefined behavior on LA464.
(define_insn "lasx_xvpermi_q_<LASX:mode>"
[(set (match_operand:LASX 0 "register_operand" "=f")
(unspec:LASX
@ -651,9 +649,6 @@
UNSPEC_LASX_XVPERMI_Q))]
"ISA_HAS_LASX"
{
int mask = 0x33;
mask &= INTVAL (operands[3]);
operands[3] = GEN_INT (mask);
return "xvpermi.q\t%u0,%u2,%3";
}
[(set_attr "type" "simd_splat")

6
gcc/testsuite/gcc.target/loongarch/vector/lasx/lasx-xvpermi_q.c
View File

@ -27,7 +27,7 @@ main ()
*((unsigned long*)& __m256i_result[2]) = 0x7fff7fff7fff0000;
*((unsigned long*)& __m256i_result[1]) = 0x7fe37fe3001d001d;
*((unsigned long*)& __m256i_result[0]) = 0x7fff7fff7fff0000;
__m256i_out = __lasx_xvpermi_q (__m256i_op0, __m256i_op1, 0x2a);
__m256i_out = __lasx_xvpermi_q (__m256i_op0, __m256i_op1, 0x22);
ASSERTEQ_64 (__LINE__, __m256i_result, __m256i_out);
*((unsigned long*)& __m256i_op0[3]) = 0x0000000000000000;
@ -42,7 +42,7 @@ main ()
*((unsigned long*)& __m256i_result[2]) = 0x000000000019001c;
*((unsigned long*)& __m256i_result[1]) = 0x0000000000000000;
*((unsigned long*)& __m256i_result[0]) = 0x00000000000001fe;
__m256i_out = __lasx_xvpermi_q (__m256i_op0, __m256i_op1, 0xb9);
__m256i_out = __lasx_xvpermi_q (__m256i_op0, __m256i_op1, 0x31);
ASSERTEQ_64 (__LINE__, __m256i_result, __m256i_out);
*((unsigned long*)& __m256i_op0[3]) = 0x00ff00ff00ff00ff;
@ -57,7 +57,7 @@ main ()
*((unsigned long*)& __m256i_result[2]) = 0xffff0000ffff0000;
*((unsigned long*)& __m256i_result[1]) = 0x00ff00ff00ff00ff;
*((unsigned long*)& __m256i_result[0]) = 0x00ff00ff00ff00ff;
__m256i_out = __lasx_xvpermi_q (__m256i_op0, __m256i_op1, 0xca);
__m256i_out = __lasx_xvpermi_q (__m256i_op0, __m256i_op1, 0x02);
ASSERTEQ_64 (__LINE__, __m256i_result, __m256i_out);
return 0;