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* config/pdp11/pdp11.md (lshrsi3, lshrhi3): Fix wrong code.
From-SVN: r166468
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@ -1,3 +1,7 @@
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2010-11-08 Paul Koning <ni1d@arrl.net>
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* config/pdp11/pdp11.md (lshrsi3, lshrhi3): Fix wrong code.
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2010-11-08 Paul Koning <ni1d@arrl.net>
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* config/pdp11/pdp11.md (negsi2): Fix wrong code.
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@ -849,7 +849,7 @@
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[(set_attr "length" "2,4")])
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;; lsr
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(define_insn ""
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(define_insn "lsrhi1"
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[(set (match_operand:HI 0 "nonimmediate_operand" "=rR,Q")
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(lshiftrt:HI (match_operand:HI 1 "general_operand" "0,0")
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(const_int 1)))]
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@ -857,7 +857,7 @@
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"clc\;ror %0"
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[(set_attr "length" "2,4")])
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(define_insn "lshrsi3"
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(define_insn "lsrsi1"
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[(set (match_operand:SI 0 "register_operand" "=r")
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(lshiftrt:SI (match_operand:SI 1 "general_operand" "0")
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(const_int 1)))]
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@ -880,6 +880,36 @@
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}
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[(set_attr "length" "10")])
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(define_expand "lshrsi3"
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[(match_operand:SI 0 "register_operand" "")
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(match_operand:SI 1 "register_operand" "0")
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(match_operand:HI 2 "general_operand" "")]
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""
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"
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{
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rtx r;
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if (!TARGET_40_PLUS &&
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(GET_CODE (operands[2]) != CONST_INT ||
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(unsigned) INTVAL (operands[2]) > 3))
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FAIL;
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emit_insn (gen_lsrsi1 (operands[0], operands[1]));
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if (GET_CODE (operands[2]) != CONST_INT)
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{
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r = gen_reg_rtx (HImode);
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emit_insn (gen_subhi3 (r, operands [2], GEN_INT (1)));
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emit_insn (gen_ashrsi3 (operands[0], operands[0], r));
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}
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else if ((unsigned) INTVAL (operands[2]) != 1)
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{
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emit_insn (gen_ashlsi3 (operands[0], operands[0],
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GEN_INT (1 - INTVAL (operands[2]))));
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}
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DONE;
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}
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"
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)
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;; shift is by arbitrary count is expensive,
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;; shift by one cheap - so let's do that, if
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;; space doesn't matter
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@ -996,13 +1026,35 @@
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operands[2] = negate_rtx (HImode, operands[2]);
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}")
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;;;;- logical shift instructions
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;;(define_insn "lshrsi3"
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;; [(set (match_operand:HI 0 "register_operand" "=r")
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;; (lshiftrt:HI (match_operand:HI 1 "register_operand" "0")
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;; (match_operand:HI 2 "general_operand" "rI")))]
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;; ""
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;; "srl %0,%2")
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(define_expand "lshrhi3"
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[(match_operand:HI 0 "register_operand" "")
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(match_operand:HI 1 "register_operand" "")
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(match_operand:HI 2 "general_operand" "")]
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""
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"
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{
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rtx r;
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if (!TARGET_40_PLUS &&
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(GET_CODE (operands[2]) != CONST_INT ||
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(unsigned) INTVAL (operands[2]) > 3))
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FAIL;
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emit_insn (gen_lsrhi1 (operands[0], operands[1]));
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if (GET_CODE (operands[2]) != CONST_INT)
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{
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r = gen_reg_rtx (HImode);
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emit_insn (gen_subhi3 (r, operands [2], GEN_INT (1)));
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emit_insn (gen_ashrhi3 (operands[0], operands[0], r));
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}
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else if ((unsigned) INTVAL (operands[2]) != 1)
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{
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emit_insn (gen_ashlhi3 (operands[0], operands[0],
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GEN_INT (1 - INTVAL (operands[2]))));
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}
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DONE;
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}
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"
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)
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;; absolute
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