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AArch64 [8/10] Fixup botched commit.
From-SVN: r192733
This commit is contained in:
Marcus Shawcroft
parent
24034425f5
commit
d507e9a340
68
libgcc/config/aarch64/crti.S
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68
libgcc/config/aarch64/crti.S
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@ -0,0 +1,68 @@
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# Machine description for AArch64 architecture.
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# Copyright (C) 2009, 2010, 2011, 2012 Free Software Foundation, Inc.
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# Contributed by ARM Ltd.
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#
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# This file is free software; you can redistribute it and/or modify it
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# under the terms of the GNU General Public License as published by the
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# Free Software Foundation; either version 3, or (at your option) any
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# later version.
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#
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# This file is distributed in the hope that it will be useful, but
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# WITHOUT ANY WARRANTY; without even the implied warranty of
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# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
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# General Public License for more details.
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#
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# Under Section 7 of GPL version 3, you are granted additional
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# permissions described in the GCC Runtime Library Exception, version
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# 3.1, as published by the Free Software Foundation.
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#
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# You should have received a copy of the GNU General Public License and
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# a copy of the GCC Runtime Library Exception along with this program;
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# see the files COPYING3 and COPYING.RUNTIME respectively. If not, see
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# <http://www.gnu.org/licenses/>.
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/* An executable stack is *not* required for these functions. */
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#if defined(__ELF__) && defined(__linux__)
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.section .note.GNU-stack,"",%progbits
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.previous
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#endif
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# This file creates a stack frame for the contents of the .fini and
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# .init sections. Users may put any desired instructions in those
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# sections.
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#ifdef __ELF__
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#define TYPE(x) .type x,function
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#else
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#define TYPE(x)
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#endif
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# Note - this macro is complemented by the FUNC_END macro
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# in crtn.S. If you change this macro you must also change
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# that macro match.
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.macro FUNC_START
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# Create a stack frame and save any call-preserved registers
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stp x29, x30, [sp, #-16]!
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stp x27, x28, [sp, #-16]!
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stp x25, x26, [sp, #-16]!
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stp x23, x24, [sp, #-16]!
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stp x21, x22, [sp, #-16]!
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stp x19, x20, [sp, #-16]!
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.endm
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.section ".init"
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.align 2
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.global _init
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TYPE(_init)
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_init:
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FUNC_START
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.section ".fini"
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.align 2
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.global _fini
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TYPE(_fini)
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_fini:
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FUNC_START
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# end of crti.S
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61
libgcc/config/aarch64/crtn.S
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61
libgcc/config/aarch64/crtn.S
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# Machine description for AArch64 architecture.
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# Copyright (C) 2009, 2010, 2011, 2012 Free Software Foundation, Inc.
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# Contributed by ARM Ltd.
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#
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# This file is free software; you can redistribute it and/or modify it
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# under the terms of the GNU General Public License as published by the
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# Free Software Foundation; either version 3, or (at your option) any
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# later version.
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#
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# This file is distributed in the hope that it will be useful, but
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# WITHOUT ANY WARRANTY; without even the implied warranty of
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# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
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# General Public License for more details.
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#
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# Under Section 7 of GPL version 3, you are granted additional
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# permissions described in the GCC Runtime Library Exception, version
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# 3.1, as published by the Free Software Foundation.
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#
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# You should have received a copy of the GNU General Public License and
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# a copy of the GCC Runtime Library Exception along with this program;
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# see the files COPYING3 and COPYING.RUNTIME respectively. If not, see
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# <http://www.gnu.org/licenses/>.
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/* An executable stack is *not* required for these functions. */
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#if defined(__ELF__) && defined(__linux__)
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.section .note.GNU-stack,"",%progbits
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.previous
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#endif
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# This file just makes sure that the .fini and .init sections do in
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# fact return. Users may put any desired instructions in those sections.
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# This file is the last thing linked into any executable.
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# Note - this macro is complemented by the FUNC_START macro
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# in crti.S. If you change this macro you must also change
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# that macro match.
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#
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# Note - we do not try any fancy optimizations of the return
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# sequences here, it is just not worth it. Instead keep things
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# simple. Restore all the save resgisters, including the link
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# register and then perform the correct function return instruction.
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.macro FUNC_END
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ldp x19, x20, [sp], #16
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ldp x21, x22, [sp], #16
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ldp x23, x24, [sp], #16
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ldp x25, x26, [sp], #16
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ldp x27, x28, [sp], #16
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ldp x29, x30, [sp], #16
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ret
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.endm
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.section ".init"
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;;
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FUNC_END
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.section ".fini"
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;;
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FUNC_END
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# end of crtn.S
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143
libgcc/config/aarch64/linux-unwind.h
Normal file
143
libgcc/config/aarch64/linux-unwind.h
Normal file
@ -0,0 +1,143 @@
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/* Copyright (C) 2009, 2010, 2011, 2012 Free Software Foundation, Inc.
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Contributed by ARM Ltd.
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This file is free software; you can redistribute it and/or modify it
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under the terms of the GNU General Public License as published by the
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Free Software Foundation; either version 3, or (at your option) any
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|
later version.
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This file is distributed in the hope that it will be useful, but
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WITHOUT ANY WARRANTY; without even the implied warranty of
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|
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
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General Public License for more details.
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|
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Under Section 7 of GPL version 3, you are granted additional
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permissions described in the GCC Runtime Library Exception, version
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3.1, as published by the Free Software Foundation.
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|
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You should have received a copy of the GNU General Public License and
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a copy of the GCC Runtime Library Exception along with this program;
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see the files COPYING3 and COPYING.RUNTIME respectively. If not, see
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<http://www.gnu.org/licenses/>. */
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#ifndef inhibit_libc
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#include <signal.h>
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#include <sys/ucontext.h>
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#define MD_FALLBACK_FRAME_STATE_FOR aarch64_fallback_frame_state
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static _Unwind_Reason_Code
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aarch64_fallback_frame_state (struct _Unwind_Context *context,
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_Unwind_FrameState * fs)
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{
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/* The kernel creates an rt_sigframe on the stack immediately prior
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to delivering a signal.
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This structure must have the same shape as the linux kernel
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equivalent. */
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struct rt_sigframe
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{
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siginfo_t info;
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struct ucontext uc;
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};
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struct rt_sigframe *rt_;
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_Unwind_Ptr new_cfa;
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unsigned *pc = context->ra;
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struct sigcontext *sc;
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struct _aarch64_ctx *extension_marker;
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int i;
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/* A signal frame will have a return address pointing to
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__default_sa_restorer. This code is hardwired as:
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0xd2801168 movz x8, #0x8b
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0xd4000001 svc 0x0
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*/
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if (pc[0] != 0xd2801168 || pc[1] != 0xd4000001)
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{
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return _URC_END_OF_STACK;
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}
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rt_ = context->cfa;
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sc = &rt_->uc.uc_mcontext;
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/* This define duplicates the definition in aarch64.md */
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#define SP_REGNUM 31
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new_cfa = (_Unwind_Ptr) sc;
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fs->regs.cfa_how = CFA_REG_OFFSET;
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fs->regs.cfa_reg = STACK_POINTER_REGNUM;
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fs->regs.cfa_offset = new_cfa - (_Unwind_Ptr) context->cfa;
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for (i = 0; i < AARCH64_DWARF_NUMBER_R; i++)
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{
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fs->regs.reg[AARCH64_DWARF_R0 + i].how = REG_SAVED_OFFSET;
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fs->regs.reg[AARCH64_DWARF_R0 + i].loc.offset =
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(_Unwind_Ptr) & (sc->regs[i]) - new_cfa;
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}
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/* The core context may be extended with an arbitrary set of
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additional contexts appended sequentially. Each additional
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context contains a magic identifier and size in bytes. The size
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field can be used to skip over unrecognized context extensions.
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The end of the context sequence is marked by a context with magic
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0 or size 0. */
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for (extension_marker = (struct _aarch64_ctx *) &sc->__reserved;
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extension_marker->magic;
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extension_marker = (struct _aarch64_ctx *)
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((unsigned char *) extension_marker + extension_marker->size))
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{
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if (extension_marker->magic == FPSIMD_MAGIC)
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{
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struct fpsimd_context *ctx =
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(struct fpsimd_context *) extension_marker;
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int i;
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for (i = 0; i < AARCH64_DWARF_NUMBER_V; i++)
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{
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_Unwind_Sword offset;
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fs->regs.reg[AARCH64_DWARF_V0 + i].how = REG_SAVED_OFFSET;
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/* sigcontext contains 32 128bit registers for V0 to
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V31. The kernel will have saved the contents of the
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V registers. We want to unwind the callee save D
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registers. Each D register comprises the least
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significant half of the corresponding V register. We
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need to offset into the saved V register dependent on
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our endianness to find the saved D register. */
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offset = (_Unwind_Ptr) & (ctx->vregs[i]) - new_cfa;
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/* The endianness adjustment code below expects that a
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saved V register is 16 bytes. */
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gcc_assert (sizeof (ctx->vregs[0]) == 16);
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#if defined (__AARCH64EB__)
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offset = offset + 8;
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#endif
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fs->regs.reg[AARCH64_DWARF_V0 + i].loc.offset = offset;
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}
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}
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else
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{
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/* There is context provided that we do not recognize! */
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}
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}
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fs->regs.reg[31].how = REG_SAVED_OFFSET;
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fs->regs.reg[31].loc.offset = (_Unwind_Ptr) & (sc->sp) - new_cfa;
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fs->signal_frame = 1;
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fs->regs.reg[DWARF_ALT_FRAME_RETURN_COLUMN].how = REG_SAVED_VAL_OFFSET;
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fs->regs.reg[DWARF_ALT_FRAME_RETURN_COLUMN].loc.offset =
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(_Unwind_Ptr) (sc->pc) - new_cfa;
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fs->retaddr_column = DWARF_ALT_FRAME_RETURN_COLUMN;
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return _URC_NO_REASON;
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}
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#endif
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153
libgcc/config/aarch64/sfp-machine.h
Normal file
153
libgcc/config/aarch64/sfp-machine.h
Normal file
@ -0,0 +1,153 @@
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|
/* Machine description for AArch64 architecture.
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|
Copyright (C) 2009, 2010, 2011, 2012 Free Software Foundation, Inc.
|
||||||
|
Contributed by ARM Ltd.
|
||||||
|
|
||||||
|
This file is part of GCC.
|
||||||
|
|
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|
GCC is free software; you can redistribute it and/or modify it
|
||||||
|
under the terms of the GNU General Public License as published by
|
||||||
|
the Free Software Foundation; either version 3, or (at your option)
|
||||||
|
any later version.
|
||||||
|
|
||||||
|
GCC is distributed in the hope that it will be useful, but
|
||||||
|
WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||||
|
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
|
||||||
|
General Public License for more details.
|
||||||
|
|
||||||
|
You should have received a copy of the GNU General Public License
|
||||||
|
along with GCC; see the file COPYING3. If not see
|
||||||
|
<http://www.gnu.org/licenses/>. */
|
||||||
|
|
||||||
|
#define _FP_W_TYPE_SIZE 64
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|
#define _FP_W_TYPE unsigned long
|
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|
#define _FP_WS_TYPE signed long
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|
#define _FP_I_TYPE int
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|
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|
typedef int TItype __attribute__ ((mode (TI)));
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|
typedef unsigned int UTItype __attribute__ ((mode (TI)));
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|
#define TI_BITS (__CHAR_BIT__ * (int)sizeof(TItype))
|
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|
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||||||
|
/* The type of the result of a floating point comparison. This must
|
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|
match __libgcc_cmp_return__ in GCC for the target. */
|
||||||
|
typedef int __gcc_CMPtype __attribute__ ((mode (__libgcc_cmp_return__)));
|
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|
#define CMPtype __gcc_CMPtype
|
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|
|
||||||
|
#define _FP_MUL_MEAT_Q(R,X,Y) \
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|
_FP_MUL_MEAT_2_wide(_FP_WFRACBITS_Q,R,X,Y,umul_ppmm)
|
||||||
|
|
||||||
|
#define _FP_DIV_MEAT_Q(R,X,Y) _FP_DIV_MEAT_2_udiv(Q,R,X,Y)
|
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|
|
||||||
|
#define _FP_NANFRAC_S ((_FP_QNANBIT_S << 1) - 1)
|
||||||
|
#define _FP_NANFRAC_D ((_FP_QNANBIT_D << 1) - 1)
|
||||||
|
#define _FP_NANFRAC_Q ((_FP_QNANBIT_Q << 1) - 1), -1
|
||||||
|
#define _FP_NANSIGN_S 0
|
||||||
|
#define _FP_NANSIGN_D 0
|
||||||
|
#define _FP_NANSIGN_Q 0
|
||||||
|
|
||||||
|
#define _FP_KEEPNANFRACP 1
|
||||||
|
|
||||||
|
/* This appears to be in line with the VFP conventions in the v7-a
|
||||||
|
ARM-ARM. Need to check with the v8 version. */
|
||||||
|
#define _FP_CHOOSENAN(fs, wc, R, X, Y, OP) \
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|
do { \
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||||||
|
if ((_FP_FRAC_HIGH_RAW_##fs(X) & _FP_QNANBIT_##fs) \
|
||||||
|
&& !(_FP_FRAC_HIGH_RAW_##fs(Y) & _FP_QNANBIT_##fs)) \
|
||||||
|
{ \
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||||||
|
R##_s = Y##_s; \
|
||||||
|
_FP_FRAC_COPY_##wc(R,Y); \
|
||||||
|
} \
|
||||||
|
else \
|
||||||
|
{ \
|
||||||
|
R##_s = X##_s; \
|
||||||
|
_FP_FRAC_COPY_##wc(R,X); \
|
||||||
|
} \
|
||||||
|
R##_c = FP_CLS_NAN; \
|
||||||
|
} while (0)
|
||||||
|
|
||||||
|
#define FP_EX_INVALID 0x01
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||||||
|
#define FP_EX_DIVZERO 0x02
|
||||||
|
#define FP_EX_OVERFLOW 0x04
|
||||||
|
#define FP_EX_UNDERFLOW 0x08
|
||||||
|
#define FP_EX_INEXACT 0x10
|
||||||
|
|
||||||
|
#define FP_HANDLE_EXCEPTIONS \
|
||||||
|
do { \
|
||||||
|
const float fp_max = __FLT_MAX__; \
|
||||||
|
const float fp_min = __FLT_MIN__; \
|
||||||
|
const float fp_1e32 = 1.0e32f; \
|
||||||
|
const float fp_zero = 0.0; \
|
||||||
|
const float fp_one = 1.0; \
|
||||||
|
unsigned fpsr; \
|
||||||
|
if (_fex & FP_EX_INVALID) \
|
||||||
|
{ \
|
||||||
|
__asm__ __volatile__ ("fdiv\ts0, %s0, %s0" \
|
||||||
|
: \
|
||||||
|
: "w" (fp_zero) \
|
||||||
|
: "s0"); \
|
||||||
|
__asm__ __volatile__ ("mrs\t%0, fpsr" : "=r" (fpsr)); \
|
||||||
|
} \
|
||||||
|
if (_fex & FP_EX_DIVZERO) \
|
||||||
|
{ \
|
||||||
|
__asm__ __volatile__ ("fdiv\ts0, %s0, %s1" \
|
||||||
|
: \
|
||||||
|
: "w" (fp_one), "w" (fp_zero) \
|
||||||
|
: "s0"); \
|
||||||
|
__asm__ __volatile__ ("mrs\t%0, fpsr" : "=r" (fpsr)); \
|
||||||
|
} \
|
||||||
|
if (_fex & FP_EX_OVERFLOW) \
|
||||||
|
{ \
|
||||||
|
__asm__ __volatile__ ("fadd\ts0, %s0, %s1" \
|
||||||
|
: \
|
||||||
|
: "w" (fp_max), "w" (fp_1e32) \
|
||||||
|
: "s0"); \
|
||||||
|
__asm__ __volatile__ ("mrs\t%0, fpsr" : "=r" (fpsr)); \
|
||||||
|
} \
|
||||||
|
if (_fex & FP_EX_UNDERFLOW) \
|
||||||
|
{ \
|
||||||
|
__asm__ __volatile__ ("fmul\ts0, %s0, %s0" \
|
||||||
|
: \
|
||||||
|
: "w" (fp_min) \
|
||||||
|
: "s0"); \
|
||||||
|
__asm__ __volatile__ ("mrs\t%0, fpsr" : "=r" (fpsr)); \
|
||||||
|
} \
|
||||||
|
if (_fex & FP_EX_INEXACT) \
|
||||||
|
{ \
|
||||||
|
__asm__ __volatile__ ("fsub\ts0, %s0, %s1" \
|
||||||
|
: \
|
||||||
|
: "w" (fp_max), "w" (fp_one) \
|
||||||
|
: "s0"); \
|
||||||
|
__asm__ __volatile__ ("mrs\t%0, fpsr" : "=r" (fpsr)); \
|
||||||
|
} \
|
||||||
|
} while (0)
|
||||||
|
|
||||||
|
|
||||||
|
#define FP_RND_NEAREST 0
|
||||||
|
#define FP_RND_ZERO 0xc00000
|
||||||
|
#define FP_RND_PINF 0x400000
|
||||||
|
#define FP_RND_MINF 0x800000
|
||||||
|
|
||||||
|
#define _FP_DECL_EX \
|
||||||
|
unsigned long int _fpcr __attribute__ ((unused)) = FP_RND_NEAREST
|
||||||
|
|
||||||
|
#define FP_INIT_ROUNDMODE \
|
||||||
|
do { \
|
||||||
|
__asm__ __volatile__ ("mrs %0, fpcr" \
|
||||||
|
: "=r" (_fpcr)); \
|
||||||
|
} while (0)
|
||||||
|
|
||||||
|
#define FP_ROUNDMODE (_fpcr & 0xc00000)
|
||||||
|
|
||||||
|
#define __LITTLE_ENDIAN 1234
|
||||||
|
#define __BIG_ENDIAN 4321
|
||||||
|
|
||||||
|
#if defined __AARCH64EB__
|
||||||
|
# define __BYTE_ORDER __BIG_ENDIAN
|
||||||
|
#else
|
||||||
|
# define __BYTE_ORDER __LITTLE_ENDIAN
|
||||||
|
#endif
|
||||||
|
|
||||||
|
|
||||||
|
/* Define ALIASNAME as a strong alias for NAME. */
|
||||||
|
# define strong_alias(name, aliasname) _strong_alias(name, aliasname)
|
||||||
|
# define _strong_alias(name, aliasname) \
|
||||||
|
extern __typeof (name) aliasname __attribute__ ((alias (#name)));
|
||||||
57
libgcc/config/aarch64/sync-cache.c
Normal file
57
libgcc/config/aarch64/sync-cache.c
Normal file
@ -0,0 +1,57 @@
|
|||||||
|
/* Machine description for AArch64 architecture.
|
||||||
|
Copyright (C) 2012 Free Software Foundation, Inc.
|
||||||
|
Contributed by ARM Ltd.
|
||||||
|
|
||||||
|
This file is part of GCC.
|
||||||
|
|
||||||
|
GCC is free software; you can redistribute it and/or modify it
|
||||||
|
under the terms of the GNU General Public License as published by
|
||||||
|
the Free Software Foundation; either version 3, or (at your option)
|
||||||
|
any later version.
|
||||||
|
|
||||||
|
GCC is distributed in the hope that it will be useful, but
|
||||||
|
WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||||
|
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
|
||||||
|
General Public License for more details.
|
||||||
|
|
||||||
|
You should have received a copy of the GNU General Public License
|
||||||
|
along with GCC; see the file COPYING3. If not see
|
||||||
|
<http://www.gnu.org/licenses/>. */
|
||||||
|
|
||||||
|
void
|
||||||
|
__aarch64_sync_cache_range (const void *base, const void *end)
|
||||||
|
{
|
||||||
|
unsigned icache_lsize;
|
||||||
|
unsigned dcache_lsize;
|
||||||
|
static unsigned int cache_info = 0;
|
||||||
|
const char *address;
|
||||||
|
|
||||||
|
if (! cache_info)
|
||||||
|
/* CTR_EL0 [3:0] contains log2 of icache line size in words.
|
||||||
|
CTR_EL0 [19:16] contains log2 of dcache line size in words. */
|
||||||
|
asm volatile ("mrs\t%0, ctr_el0":"=r" (cache_info));
|
||||||
|
|
||||||
|
icache_lsize = 4 << (cache_info & 0xF);
|
||||||
|
dcache_lsize = 4 << ((cache_info >> 16) & 0xF);
|
||||||
|
|
||||||
|
/* Loop over the address range, clearing one cache line at once.
|
||||||
|
Data cache must be flushed to unification first to make sure the
|
||||||
|
instruction cache fetches the updated data. 'end' is exclusive,
|
||||||
|
as per the GNU definition of __clear_cache. */
|
||||||
|
|
||||||
|
for (address = base; address < (const char *) end; address += dcache_lsize)
|
||||||
|
asm volatile ("dc\tcvau, %0"
|
||||||
|
:
|
||||||
|
: "r" (address)
|
||||||
|
: "memory");
|
||||||
|
|
||||||
|
asm volatile ("dsb\tish" : : : "memory");
|
||||||
|
|
||||||
|
for (address = base; address < (const char *) end; address += icache_lsize)
|
||||||
|
asm volatile ("ic\tivau, %0"
|
||||||
|
:
|
||||||
|
: "r" (address)
|
||||||
|
: "memory");
|
||||||
|
|
||||||
|
asm volatile ("dsb\tish; isb" : : : "memory");
|
||||||
|
}
|
||||||
21
libgcc/config/aarch64/t-aarch64
Normal file
21
libgcc/config/aarch64/t-aarch64
Normal file
@ -0,0 +1,21 @@
|
|||||||
|
# Machine description for AArch64 architecture.
|
||||||
|
# Copyright (C) 2012 Free Software Foundation, Inc.
|
||||||
|
# Contributed by ARM Ltd.
|
||||||
|
#
|
||||||
|
# This file is part of GCC.
|
||||||
|
#
|
||||||
|
# GCC is free software; you can redistribute it and/or modify it
|
||||||
|
# under the terms of the GNU General Public License as published by
|
||||||
|
# the Free Software Foundation; either version 3, or (at your option)
|
||||||
|
# any later version.
|
||||||
|
#
|
||||||
|
# GCC is distributed in the hope that it will be useful, but
|
||||||
|
# WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||||
|
# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
|
||||||
|
# General Public License for more details.
|
||||||
|
#
|
||||||
|
# You should have received a copy of the GNU General Public License
|
||||||
|
# along with GCC; see the file COPYING3. If not see
|
||||||
|
# <http://www.gnu.org/licenses/>.
|
||||||
|
|
||||||
|
LIB2ADD += $(srcdir)/config/aarch64/sync-cache.c
|
||||||
7
libgcc/config/aarch64/t-softfp
Normal file
7
libgcc/config/aarch64/t-softfp
Normal file
@ -0,0 +1,7 @@
|
|||||||
|
softfp_float_modes := tf
|
||||||
|
softfp_int_modes := si di ti
|
||||||
|
softfp_extensions := sftf dftf
|
||||||
|
softfp_truncations := tfsf tfdf
|
||||||
|
softfp_exclude_libgcc2 := n
|
||||||
|
|
||||||
|
TARGET_LIBGCC2_CFLAGS += -Wno-missing-prototypes
|
||||||
Loading…
Reference in New Issue
Block a user