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invoke.texi: Add cpu_type power7.
2008-08-08 Peter Bergner <bergner@vnet.ibm.com>
* doc/invoke.texi: Add cpu_type power7.
* config.in (HAVE_AS_VSX): New.
* config.gcc: Add cpu_type power7.
* configure.ac (HAVE_AS_VSX): Check for assembler support of the
VSX instructions.
* configure: Regenerate.
* config/rs6000/rs6000.c (rs6000_override_options): Alias power7 to
power5.
* config/rs6000/rs6000.h (ASM_CPU_POWER7_SPEC): Define.
(ASM_CPU_SPEC): Pass %(asm_cpu_power7) for -mcpu=power7.
(EXTRA_SPECS): Add asm_cpu_power7 spec string.
From-SVN: r138887
This commit is contained in:
Peter Bergner
Pat Haugen
parent
76871f0f31
commit
d40c9e3333
@ -1,3 +1,17 @@
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2008-08-08 Peter Bergner <bergner@vnet.ibm.com>
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* doc/invoke.texi: Add cpu_type power7.
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* config.in (HAVE_AS_VSX): New.
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* config.gcc: Add cpu_type power7.
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* configure.ac (HAVE_AS_VSX): Check for assembler support of the
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VSX instructions.
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* configure: Regenerate.
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* config/rs6000/rs6000.c (rs6000_override_options): Alias power7 to
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power5.
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* config/rs6000/rs6000.h (ASM_CPU_POWER7_SPEC): Define.
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(ASM_CPU_SPEC): Pass %(asm_cpu_power7) for -mcpu=power7.
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(EXTRA_SPECS): Add asm_cpu_power7 spec string.
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2008-08-08 Dorit Nuzman <dorit@il.ibm.com>
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* tree-vect-transform.c (vectorizable_conversion): Pass the integral
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@ -334,7 +334,7 @@ powerpc*-*-*)
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extra_headers="ppc-asm.h altivec.h spe.h ppu_intrinsics.h paired.h spu2vmx.h vec_types.h si2vmx.h"
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need_64bit_hwint=yes
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case x$with_cpu in
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xpowerpc64|xdefault64|x6[23]0|x970|xG5|xpower[3456]|xpower6x|xrs64a|xcell)
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xpowerpc64|xdefault64|x6[23]0|x970|xG5|xpower[34567]|xpower6x|xrs64a|xcell)
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cpu_is_64bit=yes
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;;
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esac
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@ -2842,7 +2842,7 @@ case "${target}" in
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eval "with_$which=405"
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;;
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"" | common \
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| power | power[23456] | power6x | powerpc | powerpc64 \
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| power | power[234567] | power6x | powerpc | powerpc64 \
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| rios | rios1 | rios2 | rsc | rsc1 | rs64a \
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| 401 | 403 | 405 | 405fp | 440 | 440fp | 464 | 464fp \
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| 505 | 601 | 602 | 603 | 603e | ec603e | 604 \
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@ -377,6 +377,10 @@
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#undef HAVE_AS_TLS
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#endif
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/* Define if your assembler supports VSX instructions. */
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#ifndef USED_FOR_TARGET
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#undef HAVE_AS_VSX
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#endif
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/* Define to 1 if you have the `atoll' function. */
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#ifndef USED_FOR_TARGET
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@ -1507,6 +1507,9 @@ rs6000_override_options (const char *default_cpu)
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{"power6x", PROCESSOR_POWER6,
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POWERPC_7400_MASK | MASK_POWERPC64 | MASK_PPC_GPOPT | MASK_MFCRF
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| MASK_POPCNTB | MASK_FPRND | MASK_CMPB | MASK_DFP | MASK_MFPGPR},
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{"power7", PROCESSOR_POWER5,
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POWERPC_7400_MASK | MASK_POWERPC64 | MASK_PPC_GPOPT | MASK_MFCRF
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| MASK_POPCNTB | MASK_FPRND | MASK_CMPB | MASK_DFP},
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{"powerpc", PROCESSOR_POWERPC, POWERPC_BASE_MASK},
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{"powerpc64", PROCESSOR_POWERPC64,
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POWERPC_BASE_MASK | MASK_PPC_GFXOPT | MASK_POWERPC64},
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@ -72,6 +72,12 @@
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#define ASM_CPU_POWER6_SPEC "-mpower4 -maltivec"
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#endif
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#ifdef HAVE_AS_VSX
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#define ASM_CPU_POWER7_SPEC "-mpower7"
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#else
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#define ASM_CPU_POWER7_SPEC "-mpower4 -maltivec"
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#endif
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/* Common ASM definitions used by ASM_SPEC among the various targets
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for handling -mcpu=xxx switches. */
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#define ASM_CPU_SPEC \
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@ -92,6 +98,7 @@
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%{mcpu=power5+: %(asm_cpu_power5)} \
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%{mcpu=power6: %(asm_cpu_power6) -maltivec} \
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%{mcpu=power6x: %(asm_cpu_power6) -maltivec} \
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%{mcpu=power7: %(asm_cpu_power7)} \
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%{mcpu=powerpc: -mppc} \
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%{mcpu=rios: -mpwr} \
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%{mcpu=rios1: -mpwr} \
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@ -160,6 +167,7 @@
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{ "cc1_cpu", CC1_CPU_SPEC }, \
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{ "asm_cpu_power5", ASM_CPU_POWER5_SPEC }, \
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{ "asm_cpu_power6", ASM_CPU_POWER6_SPEC }, \
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{ "asm_cpu_power7", ASM_CPU_POWER7_SPEC }, \
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SUBTARGET_EXTRA_SPECS
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/* -mcpu=native handling only makes sense with compiler running on
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46
gcc/configure
vendored
46
gcc/configure
vendored
@ -22621,6 +22621,52 @@ cat >>confdefs.h <<\_ACEOF
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#define HAVE_AS_DFP 1
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_ACEOF
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fi
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case $target in
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*-*-aix*) conftest_s=' .machine "pwr7"
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.csect .text[PR]
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lxvd2x 1,2,3';;
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*) conftest_s=' .machine power7
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.text
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lxvd2x 1,2,3';;
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esac
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echo "$as_me:$LINENO: checking assembler for vector-scalar support" >&5
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echo $ECHO_N "checking assembler for vector-scalar support... $ECHO_C" >&6
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if test "${gcc_cv_as_powerpc_vsx+set}" = set; then
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echo $ECHO_N "(cached) $ECHO_C" >&6
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else
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gcc_cv_as_powerpc_vsx=no
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if test $in_tree_gas = yes; then
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if test $gcc_cv_gas_vers -ge `expr \( \( 9 \* 1000 \) + 99 \) \* 1000 + 0`
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then gcc_cv_as_powerpc_vsx=yes
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fi
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elif test x$gcc_cv_as != x; then
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echo "$conftest_s" > conftest.s
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if { ac_try='$gcc_cv_as -a32 -o conftest.o conftest.s >&5'
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{ (eval echo "$as_me:$LINENO: \"$ac_try\"") >&5
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(eval $ac_try) 2>&5
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ac_status=$?
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echo "$as_me:$LINENO: \$? = $ac_status" >&5
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(exit $ac_status); }; }
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then
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gcc_cv_as_powerpc_vsx=yes
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else
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echo "configure: failed program was" >&5
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cat conftest.s >&5
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fi
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rm -f conftest.o conftest.s
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fi
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fi
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echo "$as_me:$LINENO: result: $gcc_cv_as_powerpc_vsx" >&5
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echo "${ECHO_T}$gcc_cv_as_powerpc_vsx" >&6
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if test $gcc_cv_as_powerpc_vsx = yes; then
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cat >>confdefs.h <<\_ACEOF
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#define HAVE_AS_VSX 1
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_ACEOF
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fi
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echo "$as_me:$LINENO: checking assembler for .gnu_attribute support" >&5
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@ -3031,6 +3031,21 @@ LCF0:
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[AC_DEFINE(HAVE_AS_DFP, 1,
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[Define if your assembler supports DFP instructions.])])
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case $target in
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*-*-aix*) conftest_s=' .machine "pwr7"
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.csect .text[[PR]]
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lxvd2x 1,2,3';;
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*) conftest_s=' .machine power7
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.text
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lxvd2x 1,2,3';;
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esac
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gcc_GAS_CHECK_FEATURE([vector-scalar support],
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gcc_cv_as_powerpc_vsx, [9,99,0], -a32,
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[$conftest_s],,
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[AC_DEFINE(HAVE_AS_VSX, 1,
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[Define if your assembler supports VSX instructions.])])
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gcc_GAS_CHECK_FEATURE([.gnu_attribute support],
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gcc_cv_as_powerpc_gnu_attribute, [2,18,0],,
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[.gnu_attribute 4,1],,
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@ -13024,7 +13024,7 @@ Supported values for @var{cpu_type} are @samp{401}, @samp{403},
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@samp{860}, @samp{970}, @samp{8540}, @samp{e300c2}, @samp{e300c3},
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@samp{e500mc}, @samp{ec603e}, @samp{G3}, @samp{G4}, @samp{G5},
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@samp{power}, @samp{power2}, @samp{power3}, @samp{power4},
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@samp{power5}, @samp{power5+}, @samp{power6}, @samp{power6x},
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@samp{power5}, @samp{power5+}, @samp{power6}, @samp{power6x}, @samp{power7}
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@samp{common}, @samp{powerpc}, @samp{powerpc64}, @samp{rios},
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@samp{rios1}, @samp{rios2}, @samp{rsc}, and @samp{rs64}.
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