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From-SVN: r782
This commit is contained in:
Richard Stallman
parent
e1fde2b5bc
commit
d3797078d4
@ -276,3 +276,303 @@ rev_cond_name (op)
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abort ();
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}
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}
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int
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vax_float_literal(c)
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register rtx c;
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{
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register enum machine_mode mode;
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int i;
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union {double d; int i[2];} val;
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if (GET_CODE (c) != CONST_DOUBLE)
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return 0;
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mode = GET_MODE (c);
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if (c == const_tiny_rtx[(int) mode][0]
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|| c == const_tiny_rtx[(int) mode][1]
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|| c == const_tiny_rtx[(int) mode][2])
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return 1;
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#if HOST_FLOAT_FORMAT == VAX_FLOAT_FORMAT
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val.i[0] = CONST_DOUBLE_LOW (c);
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val.i[1] = CONST_DOUBLE_HIGH (c);
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for (i = 0; i < 7; i ++)
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if (val.d == 1 << i || val.d == 1 / (1 << i))
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return 1;
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#endif
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return 0;
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}
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/* Return the cost in cycles of a memory address, relative to register
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indirect.
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Each of the following adds the indicated number of cycles:
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1 - symbolic address
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1 - pre-decrement
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1 - indexing and/or offset(register)
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2 - indirect */
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int vax_address_cost(addr)
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register rtx addr;
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{
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int reg = 0, indexed = 0, indir = 0, offset = 0, predec = 0;
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rtx plus_op0 = 0, plus_op1 = 0;
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restart:
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switch (GET_CODE (addr))
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{
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case PRE_DEC:
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predec = 1;
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case REG:
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case SUBREG:
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case POST_INC:
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reg = 1;
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break;
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case MULT:
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indexed = 1; /* 2 on VAX 2 */
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break;
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case CONST_INT:
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/* byte offsets cost nothing (on a VAX 2, they cost 1 cycle) */
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if (offset == 0)
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offset = (unsigned)(INTVAL(addr)+128) > 256;
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break;
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case CONST:
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case SYMBOL_REF:
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offset = 1; /* 2 on VAX 2 */
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break;
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case LABEL_REF: /* this is probably a byte offset from the pc */
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if (offset == 0)
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offset = 1;
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break;
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case PLUS:
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if (plus_op0)
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plus_op1 = XEXP (addr, 0);
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else
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plus_op0 = XEXP (addr, 0);
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addr = XEXP (addr, 1);
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goto restart;
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case MEM:
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indir = 2; /* 3 on VAX 2 */
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addr = XEXP (addr, 0);
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goto restart;
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}
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/* Up to 3 things can be added in an address. They are stored in
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plus_op0, plus_op1, and addr. */
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if (plus_op0)
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{
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addr = plus_op0;
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plus_op0 = 0;
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goto restart;
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}
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if (plus_op1)
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{
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addr = plus_op1;
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plus_op1 = 0;
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goto restart;
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}
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/* Indexing and register+offset can both be used (except on a VAX 2)
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without increasing execution time over either one alone. */
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if (reg && indexed && offset)
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return reg + indir + offset + predec;
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return reg + indexed + indir + offset + predec;
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}
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/* Cost of an expression on a VAX. This version has costs tuned for the
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CVAX chip (found in the VAX 3 series) with comments for variations on
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other models. */
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int
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vax_rtx_cost (x)
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register rtx x;
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{
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register enum rtx_code code = GET_CODE (x);
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enum machine_mode mode = GET_MODE (x);
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register int c;
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int i = 0; /* may be modified in switch */
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char *fmt = GET_RTX_FORMAT (code); /* may be modified in switch */
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switch (code)
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{
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case POST_INC:
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return 2;
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case PRE_DEC:
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return 3;
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case MULT:
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switch (mode)
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{
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case DFmode:
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c = 16; /* 4 on VAX 9000 */
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break;
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case SFmode:
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c = 9; /* 4 on VAX 9000, 12 on VAX 2 */
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break;
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case DImode:
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c = 16; /* 6 on VAX 9000, 28 on VAX 2 */
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break;
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case SImode:
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case HImode:
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case QImode:
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c = 10; /* 3-4 on VAX 9000, 20-28 on VAX 2 */
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break;
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}
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break;
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case UDIV:
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c = 17;
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break;
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case DIV:
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if (mode == DImode)
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c = 30; /* highly variable */
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else if (mode == DFmode)
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/* divide takes 28 cycles if the result is not zero, 13 otherwise */
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c = 24;
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else
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c = 11; /* 25 on VAX 2 */
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break;
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case MOD:
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c = 23;
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break;
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case UMOD:
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c = 29;
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break;
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case FLOAT:
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c = 6 + (mode == DFmode) + (GET_MODE (XEXP (x, 0)) != SImode);
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/* 4 on VAX 9000 */
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break;
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case FIX:
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c = 7; /* 17 on VAX 2 */
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break;
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case LSHIFT:
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case ASHIFT:
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case LSHIFTRT:
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case ASHIFTRT:
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if (mode == DImode)
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c = 12;
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else
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c = 10; /* 6 on VAX 9000 */
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break;
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case ROTATE:
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case ROTATERT:
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c = 6; /* 5 on VAX 2, 4 on VAX 9000 */
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if (GET_CODE (XEXP (x, 1)) == CONST_INT)
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fmt = "e"; /* all constant rotate counts are short */
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break;
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case PLUS:
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/* Check for small negative integer operand: subl2 can be used with
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a short positive constant instead. */
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if (GET_CODE (XEXP (x, 1)) == CONST_INT)
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if ((unsigned)(INTVAL (XEXP (x, 1)) + 63) < 127)
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fmt = "e";
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case MINUS:
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c = (mode == DFmode) ? 13 : 8; /* 6/8 on VAX 9000, 16/15 on VAX 2 */
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case IOR:
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case XOR:
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c = 3;
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break;
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case AND:
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/* AND is special because the first operand is complemented. */
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c = 3;
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if (GET_CODE (XEXP (x, 0)) == CONST_INT)
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{
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if ((unsigned)~INTVAL (XEXP (x, 0)) > 63)
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c = 4;
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fmt = "e";
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i = 1;
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}
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break;
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case NEG:
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if (mode == DFmode)
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return 9;
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else if (mode == SFmode)
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return 6;
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else if (mode == DImode)
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return 4;
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case NOT:
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return 2;
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case ZERO_EXTRACT:
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case SIGN_EXTRACT:
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c = 15;
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break;
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case MEM:
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if (mode == DImode || mode == DFmode)
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c = 5; /* 7 on VAX 2 */
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else
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c = 3; /* 4 on VAX 2 */
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x = XEXP (x, 0);
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if (GET_CODE (x) == REG || GET_CODE (x) == POST_INC)
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return c;
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return c + vax_address_cost (x);
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default:
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c = 3;
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break;
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}
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/* Now look inside the expression. Operands which are not registers or
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short constants add to the cost.
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FMT and I may have been adjusted in the switch above for instructions
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which require special handling */
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while (*fmt++ == 'e')
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{
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register rtx op = XEXP (x, i++);
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code = GET_CODE (op);
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/* A NOT is likely to be found as the first operand of an AND
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(in which case the relevant cost is of the operand inside
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the not) and not likely to be found anywhere else. */
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if (code == NOT)
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op = XEXP (op, 0), code = GET_CODE (op);
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switch (code)
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{
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case CONST_INT:
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if ((unsigned)INTVAL (op) > 63 && GET_MODE (x) != QImode)
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c += 1; /* 2 on VAX 2 */
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break;
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case CONST:
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case LABEL_REF:
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case SYMBOL_REF:
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c += 1; /* 2 on VAX 2 */
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break;
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case CONST_DOUBLE:
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if (GET_MODE_CLASS (GET_MODE (op)) == MODE_FLOAT)
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{
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/* Registers are faster than floating point constants -- even
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those constants which can be encoded in a single byte. */
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if (vax_float_literal (op))
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c++;
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else
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c += (GET_MODE (x) == DFmode) ? 3 : 2;
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}
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else
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{
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if (CONST_DOUBLE_HIGH (op) != 0
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|| (unsigned)CONST_DOUBLE_LOW (op) > 63)
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c += 2;
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}
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break;
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case MEM:
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c += 1; /* 2 on VAX 2 */
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if (GET_CODE (XEXP (op, 0)) != REG)
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c += vax_address_cost (XEXP (op, 0));
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break;
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case REG:
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case SUBREG:
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break;
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default:
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c += 1;
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break;
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}
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}
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return c;
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}
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