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cris.md: Remove lingering EGCS reference.
* config/cris/cris.md: Remove lingering EGCS reference. ("*extopqihi_side_biap"): For HI operation, match cris_additive_operand_extend_operator, not cris_operand_extend_operator. Adjust condition. ("*extopqihi_side", "*extopqihi"): Ditto. ("*extopqisi_side_biap"): Correct operand numbers in condition. ("*extophisi_side_biap", "*extopqisi_swap_side_biap"): Ditto. ("*extophisi_swap_side_biap", "*extopqisi_swap"): Ditto. ("*extophisi_swap"): Ditto. ("*extopqihi_swap_side_biap"): For HI operation, match a simple PLUS, not cris_operand_extend_operator. Adjust condition and output template. ("*extopqihi_swap_side", "*extopqihi_swap"): Ditto. * config/cris/cris.h (PREDICATE_CODES): Add cris_additive_operand_extend_operator. * config/cris/cris.c (cris_additive_operand_extend_operator): New predicate. From-SVN: r64174
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@ -1,3 +1,23 @@
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2003-03-11 Hans-Peter Nilsson <hp@axis.com>
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* config/cris/cris.md: Remove lingering EGCS reference.
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("*extopqihi_side_biap"): For HI operation, match
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cris_additive_operand_extend_operator, not
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cris_operand_extend_operator. Adjust condition.
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("*extopqihi_side", "*extopqihi"): Ditto.
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("*extopqisi_side_biap"): Correct operand numbers in condition.
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("*extophisi_side_biap", "*extopqisi_swap_side_biap"): Ditto.
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("*extophisi_swap_side_biap", "*extopqisi_swap"): Ditto.
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("*extophisi_swap"): Ditto.
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("*extopqihi_swap_side_biap"): For HI operation, match a simple
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PLUS, not cris_operand_extend_operator. Adjust condition and
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output template.
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("*extopqihi_swap_side", "*extopqihi_swap"): Ditto.
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* config/cris/cris.h (PREDICATE_CODES): Add
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cris_additive_operand_extend_operator.
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* config/cris/cris.c (cris_additive_operand_extend_operator):
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New predicate.
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2003-03-11 Hartmut Penner <hpenner@de.ibm.com>
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* df.c (read_modify_subreg_p): Change from static to global.
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@ -337,6 +337,22 @@ cris_operand_extend_operator (x, mode)
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&& (code == PLUS || code == MINUS || code == UMIN));
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}
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/* Check if MODE is same as mode for X, and X is PLUS or MINUS. */
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int
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cris_additive_operand_extend_operator (x, mode)
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rtx x;
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enum machine_mode mode;
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{
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enum rtx_code code = GET_CODE (x);
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if (mode == VOIDmode)
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mode = GET_MODE (x);
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return (GET_MODE (x) == mode
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&& (code == PLUS || code == MINUS));
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}
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/* Check to see if MODE is same as mode for X, and X is SIGN_EXTEND or
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ZERO_EXTEND. */
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@ -1643,6 +1643,8 @@ call_ ## FUNC (void) \
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{PLUS, IOR, AND, UMIN}}, \
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{"cris_operand_extend_operator", \
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{PLUS, MINUS, UMIN}}, \
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{"cris_additive_operand_extend_operator", \
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{PLUS, MINUS}}, \
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{"cris_extend_operator", \
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{ZERO_EXTEND, SIGN_EXTEND}}, \
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{"cris_plus_or_bound_operator", \
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@ -1,5 +1,5 @@
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;; GCC machine description for CRIS cpu cores.
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;; Copyright (C) 1998, 1999, 2000, 2001, 2002 Free Software Foundation, Inc.
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;; Copyright (C) 1998, 1999, 2000, 2001, 2002, 2003 Free Software Foundation, Inc.
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;; Contributed by Axis Communications.
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;; This file is part of GCC.
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@ -34,7 +34,7 @@
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;; gcc-2.7.2 (and problably not on gcc-2.8.1), relating to that when a
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;; constant is substituted into an operand, the actual mode must be
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;; deduced from the pattern. There is reasonable hope that that has been
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;; fixed in egcs post 1.1.1, so FIXME: try again.
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;; fixed, so FIXME: try again.
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;; You will notice that three-operand alternatives ("=r", "r", "!To")
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;; are marked with a "!" constraint modifier to avoid being reloaded
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@ -1886,7 +1886,7 @@
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(define_insn "*extopqihi_side_biap"
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[(set (match_operand:HI 0 "register_operand" "=r,r")
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(match_operator:HI
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6 "cris_operand_extend_operator"
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6 "cris_additive_operand_extend_operator"
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[(match_operand:HI 1 "register_operand" "0,0")
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(match_operator:HI
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7 "cris_extend_operator"
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@ -1898,8 +1898,7 @@
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(plus:SI (mult:SI (match_dup 2)
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(match_dup 3))
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(match_dup 4)))]
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"(GET_CODE (operands[5]) != UMIN || GET_CODE (operands[7]) == ZERO_EXTEND)
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&& cris_side_effect_mode_ok (MULT, operands, 5, 4, 2, 3, 0)"
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"cris_side_effect_mode_ok (MULT, operands, 5, 4, 2, 3, 0)"
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"@
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#
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%x6%e7.%m7 [%5=%4+%2%T3],%0")
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@ -1921,7 +1920,7 @@
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(plus:SI (mult:SI (match_dup 2)
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(match_dup 3))
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(match_dup 4)))]
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"(GET_CODE (operands[5]) != UMIN || GET_CODE (operands[7]) == ZERO_EXTEND)
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"(GET_CODE (operands[6]) != UMIN || GET_CODE (operands[7]) == ZERO_EXTEND)
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&& cris_side_effect_mode_ok (MULT, operands, 5, 4, 2, 3, 0)"
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"@
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#
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@ -1944,7 +1943,7 @@
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(plus:SI (mult:SI (match_dup 2)
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(match_dup 3))
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(match_dup 4)))]
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"(GET_CODE (operands[5]) != UMIN || GET_CODE (operands[7]) == ZERO_EXTEND)
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"(GET_CODE (operands[6]) != UMIN || GET_CODE (operands[7]) == ZERO_EXTEND)
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&& cris_side_effect_mode_ok (MULT, operands, 5, 4, 2, 3, 0)"
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"@
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#
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@ -1959,7 +1958,7 @@
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(define_insn "*extopqihi_side"
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[(set (match_operand:HI 0 "register_operand" "=r,r,r")
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(match_operator:HI
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5 "cris_operand_extend_operator"
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5 "cris_additive_operand_extend_operator"
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[(match_operand:HI 1 "register_operand" "0,0,0")
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(match_operator:HI
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6 "cris_extend_operator"
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@ -1970,8 +1969,7 @@
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(set (match_operand:SI 4 "register_operand" "=*2,r,r")
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(plus:SI (match_dup 2)
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(match_dup 3)))]
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"(GET_CODE (operands[5]) != UMIN || GET_CODE (operands[6]) == ZERO_EXTEND)
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&& cris_side_effect_mode_ok (PLUS, operands, 4, 2, 3, -1, 0)"
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"cris_side_effect_mode_ok (PLUS, operands, 4, 2, 3, -1, 0)"
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"*
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{
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if (which_alternative == 0
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@ -2053,28 +2051,25 @@
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;; QImode to HImode
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;; FIXME: GCC should widen.
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;; FIXME: These could have anonymous mode for operand 0.
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(define_insn "*extopqihi_swap_side_biap"
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[(set (match_operand:HI 0 "register_operand" "=r,r")
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(match_operator:HI
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7 "cris_plus_or_bound_operator"
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[(match_operator:HI
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6 "cris_extend_operator"
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[(mem:QI (plus:SI
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(mult:SI (match_operand:SI 2 "register_operand" "r,r")
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(match_operand:SI 3 "const_int_operand" "n,n"))
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(match_operand:SI 4 "register_operand" "r,r")))])
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(match_operand:HI 1 "register_operand" "0,0")]))
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(plus:HI
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(match_operator:HI
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6 "cris_extend_operator"
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[(mem:QI (plus:SI
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(mult:SI (match_operand:SI 2 "register_operand" "r,r")
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(match_operand:SI 3 "const_int_operand" "n,n"))
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(match_operand:SI 4 "register_operand" "r,r")))])
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(match_operand:HI 1 "register_operand" "0,0")))
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(set (match_operand:SI 5 "register_operand" "=*4,r")
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(plus:SI (mult:SI (match_dup 2)
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(match_dup 3))
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(match_dup 4)))]
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"(GET_CODE (operands[6]) != UMIN || GET_CODE (operands[6]) == ZERO_EXTEND)
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&& cris_side_effect_mode_ok (MULT, operands, 5, 4, 2, 3, 0)"
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"cris_side_effect_mode_ok (MULT, operands, 5, 4, 2, 3, 0)"
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"@
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#
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%x7%e6.%m6 [%5=%4+%2%T3],%0")
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add%e6.b [%5=%4+%2%T3],%0")
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;; QImode to SImode
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@ -2093,7 +2088,7 @@
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(plus:SI (mult:SI (match_dup 2)
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(match_dup 3))
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(match_dup 4)))]
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"(GET_CODE (operands[6]) != UMIN || GET_CODE (operands[6]) == ZERO_EXTEND)
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"(GET_CODE (operands[7]) != UMIN || GET_CODE (operands[6]) == ZERO_EXTEND)
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&& cris_side_effect_mode_ok (MULT, operands, 5, 4, 2, 3, 0)"
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"@
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#
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@ -2115,7 +2110,7 @@
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(plus:SI (mult:SI (match_dup 2)
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(match_dup 3))
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(match_dup 4)))]
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"(GET_CODE (operands[6]) != UMIN || GET_CODE (operands[6]) == ZERO_EXTEND)
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"(GET_CODE (operands[7]) != UMIN || GET_CODE (operands[6]) == ZERO_EXTEND)
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&& cris_side_effect_mode_ok (MULT, operands, 5, 4, 2, 3, 0)"
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"@
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#
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@ -2129,19 +2124,17 @@
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(define_insn "*extopqihi_swap_side"
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[(set (match_operand:HI 0 "register_operand" "=r,r,r")
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(match_operator:HI
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6 "cris_plus_or_bound_operator"
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[(match_operator:HI
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5 "cris_extend_operator"
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[(mem:QI (plus:SI
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(match_operand:SI 2 "cris_bdap_operand" "%r,r,r")
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(match_operand:SI 3 "cris_bdap_operand" "r>Ri,r,>Ri")))])
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(match_operand:HI 1 "register_operand" "0,0,0")]))
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(plus:HI
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(match_operator:HI
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5 "cris_extend_operator"
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[(mem:QI (plus:SI
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(match_operand:SI 2 "cris_bdap_operand" "%r,r,r")
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(match_operand:SI 3 "cris_bdap_operand" "r>Ri,r,>Ri")))])
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(match_operand:HI 1 "register_operand" "0,0,0")))
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(set (match_operand:SI 4 "register_operand" "=*2,r,r")
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(plus:SI (match_dup 2)
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(match_dup 3)))]
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"(GET_CODE (operands[6]) != UMIN || GET_CODE (operands[5]) == ZERO_EXTEND)
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&& cris_side_effect_mode_ok (PLUS, operands, 4, 2, 3, -1, 0)"
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"cris_side_effect_mode_ok (PLUS, operands, 4, 2, 3, -1, 0)"
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"*
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{
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if (which_alternative == 0
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@ -2151,7 +2144,7 @@
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|| CONST_OK_FOR_LETTER_P (INTVAL (operands[3]), 'N')
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|| CONST_OK_FOR_LETTER_P (INTVAL (operands[3]), 'J')))
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return \"#\";
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return \"%x6%e5.%m5 [%4=%2%S3],%0\";
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return \"add%e5.b [%4=%2%S3],%0\";
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}")
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;; QImode to SImode
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@ -2221,13 +2214,12 @@
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(define_insn "*extopqihi"
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[(set (match_operand:HI 0 "register_operand" "=r,r,r,r")
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(match_operator:HI
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3 "cris_operand_extend_operator"
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3 "cris_additive_operand_extend_operator"
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[(match_operand:HI 1 "register_operand" "0,0,0,r")
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(match_operator:HI
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4 "cris_extend_operator"
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[(match_operand:QI 2 "nonimmediate_operand" "r,Q>,m,!To")])]))]
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"(GET_CODE (operands[3]) != UMIN || GET_CODE (operands[4]) == ZERO_EXTEND)
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&& GET_MODE_SIZE (GET_MODE (operands[0])) <= UNITS_PER_WORD
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"GET_MODE_SIZE (GET_MODE (operands[0])) <= UNITS_PER_WORD
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&& (operands[1] != frame_pointer_rtx || GET_CODE (operands[3]) != PLUS)"
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"@
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%x3%e4.%m4 %2,%0
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@ -2285,20 +2277,17 @@
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(define_insn "*extopqihi_swap"
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[(set (match_operand:HI 0 "register_operand" "=r,r,r,r")
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(match_operator:HI
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4 "cris_plus_or_bound_operator"
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[(match_operator:HI
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3 "cris_extend_operator"
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[(match_operand:QI 2 "nonimmediate_operand" "r,Q>,m,!To")])
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(match_operand:HI 1 "register_operand" "0,0,0,r")]))]
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"(GET_CODE (operands[3]) != UMIN || GET_CODE (operands[4]) == ZERO_EXTEND)
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&& GET_MODE_SIZE (GET_MODE (operands[0])) <= UNITS_PER_WORD
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&& operands[1] != frame_pointer_rtx"
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(plus:HI
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(match_operator:HI
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3 "cris_extend_operator"
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[(match_operand:QI 2 "nonimmediate_operand" "r,Q>,m,!To")])
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(match_operand:HI 1 "register_operand" "0,0,0,r")))]
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"operands[1] != frame_pointer_rtx"
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"@
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%x4%e3.%m3 %2,%0
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%x4%e3.%m3 %2,%0
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%x4%e3.%m3 %2,%0
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%x4%e3.%m3 %2,%1,%0"
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add%e3.b %2,%0
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add%e3.b %2,%0
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add%e3.b %2,%0
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add%e3.b %2,%1,%0"
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[(set_attr "slottable" "yes,yes,no,no")
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(set_attr "cc" "clobber")])
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@ -2312,8 +2301,7 @@
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3 "cris_extend_operator"
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[(match_operand:QI 2 "nonimmediate_operand" "r,Q>,m,!To")])
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(match_operand:SI 1 "register_operand" "0,0,0,r")]))]
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"(GET_CODE (operands[3]) != UMIN || GET_CODE (operands[4]) == ZERO_EXTEND)
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&& GET_MODE_SIZE (GET_MODE (operands[0])) <= UNITS_PER_WORD
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"(GET_CODE (operands[4]) != UMIN || GET_CODE (operands[3]) == ZERO_EXTEND)
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&& operands[1] != frame_pointer_rtx"
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"@
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%x4%e3.%m3 %2,%0
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@ -2332,8 +2320,7 @@
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3 "cris_extend_operator"
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[(match_operand:HI 2 "nonimmediate_operand" "r,Q>,m,!To")])
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(match_operand:SI 1 "register_operand" "0,0,0,r")]))]
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"(GET_CODE (operands[3]) != UMIN || GET_CODE (operands[4]) == ZERO_EXTEND)
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&& GET_MODE_SIZE (GET_MODE (operands[0])) <= UNITS_PER_WORD
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"(GET_CODE (operands[4]) != UMIN || GET_CODE (operands[3]) == ZERO_EXTEND)
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&& operands[1] != frame_pointer_rtx"
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"@
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%x4%e3.%m3 %2,%0
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