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mn10300.h (REG_CLASS_FROM_LETTER): Return EXTENDED_REGS only if TARGET_AM33.
* config/mn10300/mn10300.h (REG_CLASS_FROM_LETTER): Return EXTENDED_REGS only if TARGET_AM33. * config/mn10300/mn10300.md (movsi, addsi): Avoid exposing SP_REGS to register allocation and reloading unless absolutely necessary. (movsi3): Remove special-case of adding non-constants to SP. From-SVN: r33429
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@ -1,3 +1,12 @@
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2000-04-25 Alexandre Oliva <aoliva@cygnus.com>
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* config/mn10300/mn10300.h (REG_CLASS_FROM_LETTER): Return
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EXTENDED_REGS only if TARGET_AM33.
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* config/mn10300/mn10300.md (movsi, addsi): Avoid exposing
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SP_REGS to register allocation and reloading unless absolutely
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necessary.
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(movsi3): Remove special-case of adding non-constants to SP.
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2000-04-25 Kaveh R. Ghazi <ghazi@caip.rutgers.edu>
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* aclocal.m4 (gcc_AC_NEED_DECLARATION): This macro now requires
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@ -287,8 +287,10 @@ enum reg_class {
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#define REG_CLASS_FROM_LETTER(C) \
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((C) == 'd' ? DATA_REGS : \
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(C) == 'a' ? ADDRESS_REGS : \
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(C) == 'y' ? SP_REGS : \
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! TARGET_AM33 ? NO_REGS : \
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(C) == 'x' ? EXTENDED_REGS : \
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(C) == 'y' ? SP_REGS : NO_REGS)
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NO_REGS)
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/* Macros to check register numbers against specific register classes. */
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@ -296,9 +296,9 @@
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(define_insn ""
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[(set (match_operand:SI 0 "general_operand"
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"=dx,ax,dx,a,dxm,dxm,axm,axm,dx,dx,ax,ax,axR,y")
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"=dx,ax,dx,a,dxm,dxm,axm,axm,dx,dx,ax,ax,axR,!*y")
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(match_operand:SI 1 "general_operand"
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"0,0,I,I,dx,ax,dx,ax,dixm,aixm,dixm,aixm,xy,axR"))]
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"0,0,I,I,dx,ax,dx,ax,dixm,aixm,dixm,aixm,!*y,axR"))]
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"register_operand (operands[0], SImode)
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|| register_operand (operands[1], SImode)"
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"*
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@ -744,23 +744,10 @@
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(plus:SI (match_operand:SI 1 "register_operand" "")
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(match_operand:SI 2 "nonmemory_operand" "")))]
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""
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"
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{
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/* We can't add a variable amount directly to the stack pointer;
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so do so via a temporary register. */
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if (operands[0] == stack_pointer_rtx
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&& GET_CODE (operands[1]) != CONST_INT
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&& GET_CODE (operands[2]) != CONST_INT)
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{
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rtx temp = gen_reg_rtx (SImode);
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emit_move_insn (temp, gen_rtx_PLUS (SImode, operands[1], operands[2]));
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emit_move_insn (operands[0], temp);
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DONE;
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}
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}")
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"")
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(define_insn ""
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[(set (match_operand:SI 0 "register_operand" "=dx,a,x,a,dax,xy,!dax")
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[(set (match_operand:SI 0 "register_operand" "=dx,a,x,a,dax,!*y,!dax")
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(plus:SI (match_operand:SI 1 "register_operand" "%0,0,0,0,0,0,dax")
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(match_operand:SI 2 "nonmemory_operand" "J,J,L,L,daxi,i,dax")))]
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"TARGET_AM33"
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@ -839,7 +826,7 @@
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[(set_attr "cc" "set_zn,none_0hit,set_zn,none_0hit,set_zn,none_0hit,set_zn")])
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(define_insn ""
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[(set (match_operand:SI 0 "register_operand" "=dx,a,a,dax,xy,!dax")
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[(set (match_operand:SI 0 "register_operand" "=dx,a,a,dax,!*y,!dax")
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(plus:SI (match_operand:SI 1 "register_operand" "%0,0,0,0,0,dax")
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(match_operand:SI 2 "nonmemory_operand" "J,J,L,daxi,i,dax")))]
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""
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