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i386.md (SWI48, SDWI, DWI): New mode iterators.
* config/i386/i386.md (SWI48, SDWI, DWI): New mode iterators.
(DWIH, g, di, doubleint_general_operand): New mode attributes.
(general_operand): Handle TI mode.
(add<mode>3): Macroize expander from add{qi,hi,si,di,ti}3 patterns
using SDWI mode iterator.
(*add<mode>3_doubleword): New insn_and_split pattern. Macroize
pattern from *add{di,ti}3_1 patterns and corresponding splitters
using SDWI mode iterator.
(add<mode>3_carry): Macroize insn from add{qi,hi,si,di}3_carry
patterns using SWI mode iterator.
(*add<mode>3_cc): Macroize insn from add{si,di}3_cc patterns
using SWI48 mode iterator.
(*add<mode>_1): Ditto from add{si,di}_1 patterns.
(*add<mode>_2): Ditto from add{si,di}_2 patterns.
(*add<mode>_3): Ditto from add{si,di}_3 patterns.
(*add<mode>_5): Ditto from add{si,di}_5 patterns.
(sub<mode>3): Macroize expander from sub{qi,hi,si,di,ti}3 patterns
using SDWI mode iterator.
(*sub<mode>3_doubleword): New insn_and_split pattern. Macroize
pattern from *sub{di,ti}3_1 patterns and corresponding splitters
using SDWI mode iterator.
(sub<mode>3_carry): Macroize insn from sub{qi,hi,si,di}3_carry
patterns using SWI mode iterator.
(*sub<mode>_1): Ditto from from sub{qi,hi,si,di}_1 patterns.
(*sub<mode>_2): Ditto from sub{qi,hi,si,di}_2 patterns.
(*sub<mode>_3): Ditto from sub{qi,hi,si,di}_3 patterns.
(<plusminus_insn>xf3): Macroize expander from addxf3 and subxf3
patterns using plusminus code iterator.
(<plusminus_insn><mode>3): Macroize expander from add<mode>3 and
sub<mode>3 patterns using plusminus code iterator.
* config/i386/i386.c (override_options): Update call to
gen_subdi_carry_rex64 for renamed function.
(ix86_expand_int_addcc): Update calls to gen_subdi3_carry_rex64
and gen_adddi3_carry_rex64 for renamed functions. Use indirect
calls to instruction expanders.
From-SVN: r152495
This commit is contained in:
Uros Bizjak
parent
7b7c01e739
commit
d2407a7aca
@ -1,3 +1,41 @@
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2009-10-06 Uros Bizjak <ubizjak@gmail.com>
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* config/i386/i386.md (SWI48, SDWI, DWI): New mode iterators.
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(DWIH, g, di, doubleint_general_operand): New mode attributes.
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(general_operand): Handle TI mode.
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(add<mode>3): Macroize expander from add{qi,hi,si,di,ti}3 patterns
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using SDWI mode iterator.
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(*add<mode>3_doubleword): New insn_and_split pattern. Macroize
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pattern from *add{di,ti}3_1 patterns and corresponding splitters
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using SDWI mode iterator.
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(add<mode>3_carry): Macroize insn from add{qi,hi,si,di}3_carry
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patterns using SWI mode iterator.
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(*add<mode>3_cc): Macroize insn from add{si,di}3_cc patterns
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using SWI48 mode iterator.
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(*add<mode>_1): Ditto from add{si,di}_1 patterns.
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(*add<mode>_2): Ditto from add{si,di}_2 patterns.
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(*add<mode>_3): Ditto from add{si,di}_3 patterns.
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(*add<mode>_5): Ditto from add{si,di}_5 patterns.
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(sub<mode>3): Macroize expander from sub{qi,hi,si,di,ti}3 patterns
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using SDWI mode iterator.
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(*sub<mode>3_doubleword): New insn_and_split pattern. Macroize
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pattern from *sub{di,ti}3_1 patterns and corresponding splitters
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using SDWI mode iterator.
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(sub<mode>3_carry): Macroize insn from sub{qi,hi,si,di}3_carry
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patterns using SWI mode iterator.
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(*sub<mode>_1): Ditto from from sub{qi,hi,si,di}_1 patterns.
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(*sub<mode>_2): Ditto from sub{qi,hi,si,di}_2 patterns.
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(*sub<mode>_3): Ditto from sub{qi,hi,si,di}_3 patterns.
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(<plusminus_insn>xf3): Macroize expander from addxf3 and subxf3
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patterns using plusminus code iterator.
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(<plusminus_insn><mode>3): Macroize expander from add<mode>3 and
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sub<mode>3 patterns using plusminus code iterator.
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* config/i386/i386.c (override_options): Update call to
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gen_subdi_carry_rex64 for renamed function.
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(ix86_expand_int_addcc): Update calls to gen_subdi3_carry_rex64
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and gen_adddi3_carry_rex64 for renamed functions. Use indirect
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calls to instruction expanders.
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2009-10-06 Martin Jambor <mjambor@suse.cz>
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PR bootstrap/41395
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@ -215,8 +253,8 @@
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2009-10-05 Ramana Radhakrishnan <ramana.radhakrishnan@arm.com>
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* config/arm/arm.c (arm_override_options): Really initialize
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flag_dwarf2_cfi_asm to 0.
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* config/arm/arm.c (arm_override_options): Really initialize
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flag_dwarf2_cfi_asm to 0.
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2009-10-05 Doug Kwan <dougkwan@google.com>
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@ -3394,7 +3394,7 @@ override_options (bool main_args_p)
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ix86_gen_pop1 = gen_popdi1;
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ix86_gen_add3 = gen_adddi3;
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ix86_gen_sub3 = gen_subdi3;
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ix86_gen_sub3_carry = gen_subdi3_carry_rex64;
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ix86_gen_sub3_carry = gen_subdi3_carry;
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ix86_gen_one_cmpl2 = gen_one_cmpldi2;
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ix86_gen_monitor = gen_sse3_monitor64;
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ix86_gen_andsp = gen_anddi3;
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@ -16171,6 +16171,7 @@ int
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ix86_expand_int_addcc (rtx operands[])
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{
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enum rtx_code code = GET_CODE (operands[1]);
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rtx (*insn)(rtx, rtx, rtx, rtx);
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rtx compare_op;
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rtx val = const0_rtx;
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bool fpcmp = false;
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@ -16211,16 +16212,16 @@ ix86_expand_int_addcc (rtx operands[])
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switch (GET_MODE (operands[0]))
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{
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case QImode:
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emit_insn (gen_subqi3_carry (operands[0], operands[2], val, compare_op));
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insn = gen_subqi3_carry;
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break;
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case HImode:
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emit_insn (gen_subhi3_carry (operands[0], operands[2], val, compare_op));
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insn = gen_subhi3_carry;
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break;
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case SImode:
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emit_insn (gen_subsi3_carry (operands[0], operands[2], val, compare_op));
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insn = gen_subsi3_carry;
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break;
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case DImode:
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emit_insn (gen_subdi3_carry_rex64 (operands[0], operands[2], val, compare_op));
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insn = gen_subdi3_carry;
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break;
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default:
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gcc_unreachable ();
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@ -16231,21 +16232,23 @@ ix86_expand_int_addcc (rtx operands[])
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switch (GET_MODE (operands[0]))
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{
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case QImode:
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emit_insn (gen_addqi3_carry (operands[0], operands[2], val, compare_op));
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insn = gen_addqi3_carry;
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break;
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case HImode:
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emit_insn (gen_addhi3_carry (operands[0], operands[2], val, compare_op));
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insn = gen_addhi3_carry;
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break;
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case SImode:
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emit_insn (gen_addsi3_carry (operands[0], operands[2], val, compare_op));
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insn = gen_addsi3_carry;
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break;
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case DImode:
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emit_insn (gen_adddi3_carry_rex64 (operands[0], operands[2], val, compare_op));
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insn = gen_adddi3_carry;
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break;
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default:
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gcc_unreachable ();
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}
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}
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emit_insn (insn (operands[0], operands[2], val, compare_op));
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return 1; /* DONE */
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}
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