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c-common.c (registered_builtin_types): New static.
* c-common.c (registered_builtin_types): New static. (c_common_type_for_mode): Consult registered_builtin_types. (c_register_builtin_type): Add type to registered_builtin_types. * optabs.c (init_floating_libfuncs): Initialize libfuncs for all MODE_FLOAT modes, not just the ones corresponding to float_type_node, double_type_node, and long_double_type_node. From-SVN: r72711
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@ -1,3 +1,12 @@
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2003-10-20 Zack Weinberg <zack@codesourcery.com>
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* c-common.c (registered_builtin_types): New static.
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(c_common_type_for_mode): Consult registered_builtin_types.
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(c_register_builtin_type): Add type to registered_builtin_types.
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* optabs.c (init_floating_libfuncs): Initialize libfuncs for
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all MODE_FLOAT modes, not just the ones corresponding to
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float_type_node, double_type_node, and long_double_type_node.
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2003-10-20 Richard Henderson <rth@redhat.com>
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* config/alpha/alpha.h (PREDICATE_CODES): Add normal_memory_operand.
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@ -5,15 +14,15 @@
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2003-10-20 Dorit Naishlos <dorit@il.ibm.com>
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* config/rs6000/rs6000.h: (rs6000_sched_insert_nops):
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* config/rs6000/rs6000.h: (rs6000_sched_insert_nops):
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support new flag -minsert-sched-nops.
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(DEFAULT_SCHED_FINISH_NOP_INSERTION_SCHEME): Define.
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* config/rs6000/rs6000.c: (rs6000_sched_insert_nops):
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support new flag -minsert-sched-nops.
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* config/rs6000/rs6000.c: (rs6000_sched_insert_nops):
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support new flag -minsert-sched-nops.
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(is_cracked_insn, is_microcoded_insn): New functions.
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(rs6000_sched_finish): New function.
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(rs6000_issue_rate): Return 5 for power4.
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(get_next_active_insn, insn_terminates_group_p): New
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(get_next_active_insn, insn_terminates_group_p): New
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functions.
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(is_costly_group, force_new_group): New functions.
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(redefine_groups, pad_groups): New functions.
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@ -53,7 +62,7 @@
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(TARGET_CPU_arm1136jf_s): Likewise.
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* doc/invoke.texi: Document new ARM cores and architecture
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variants.
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2003-10-19 Zdenek Dvorak <rakdver@atrey.karlin.mff.cuni.cz>
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* Makefile.in (toplev.o): Add value-prof.h dependency.
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@ -97,7 +106,7 @@
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conventions when profiling.
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2003-10-19 Eric Botcazou <ebotcazou@libertysurf.fr>
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Richard Henderson <rth@redhat.com>
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Richard Henderson <rth@redhat.com>
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PR optimization/8178
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* config/i386/i386.md (*movsi_zero): Delete.
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@ -145,12 +154,12 @@
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(print_operand): Use it to implement '%Y'.
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* config/s390/s390.h (EXTRA_ADDRESS_CONSTRAINT): Add 'Y' constraint.
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(PREDICATE_CODES): Add shift_count_operand.
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* config/s390/s390.md ("rotldi3"): Merge alternatives,
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* config/s390/s390.md ("rotldi3"): Merge alternatives,
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using "shift_count_operand" predicate and "Y" constraint,
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and "%Y" to output the combined shift count.
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("rotlsi3"): Likewise.
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("ashldi3", "*ashldi3_31", "*ashldi3_64"): Likewise.
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("ashrdi3", "*ashrdi3_31", "*ashrdi3_64", "*ashrdi3_cc_31",
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("ashrdi3", "*ashrdi3_31", "*ashrdi3_64", "*ashrdi3_cc_31",
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"*ashrdi3_cc_64", "*ashrdi3_cconly_31", "*ashrdi3_cconly_64"): Likewise.
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("ashlsi3", "ashrsi3", "*ashrsi3_cc", "*ashrsi3_cconly"): Likewise.
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("lshrdi3", "*lshrdi3_31", "*lshrdi3_64"): Likewise.
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@ -163,9 +172,9 @@
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2003-10-18 Fariborz Jahanian <fjahanian@apple.com>
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* rs6000.md: Separate TARGET_POWERPC64 patterns for TARGET_64BIT or TARGET_32BIT.
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(ashrdisi3_noppc64) Generate more efficient code for 32-bit right-shift of
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a "long long" argument.
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* rs6000.md: Separate TARGET_POWERPC64 patterns for TARGET_64BIT or TARGET_32BIT.
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(ashrdisi3_noppc64) Generate more efficient code for 32-bit right-shift of
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a "long long" argument.
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2003-10-18 Alexandre Oliva <aoliva@redhat.com>
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@ -262,7 +271,7 @@
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zsh not working. Change gcc to GCC.
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PR bootstrap/12546
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* doc/install.texi: Document that zsh does not work when
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* doc/install.texi: Document that zsh does not work when
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configuring gcc.
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2003-10-17 Nathanael Nerode <neroden@gcc.gnu.org>
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@ -373,7 +382,7 @@
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Define as 0.
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* config/mips/iris6.h (FUNCTION_NAME_ALREADY_DECLARED): Define
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depending on mips_abi.
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depending on mips_abi.
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* config/mips/linux.h (FUNCTION_NAME_ALREADY_DECLARED): Define as 1.
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* config/mips/mips.c (mips_output_function_prologue): Test
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FUNCTION_NAME_ALREADY_DECLARED at runtime.
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@ -382,7 +391,7 @@
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(build_mips16_call_stub): Likewise.
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* config/mips/mips.h (FUNCTION_NAME_ALREADY_DECLARED): Provide
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default.
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* config/mips/iris6.h (DWARF2_UNWIND_INFO): Don't define for native
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IRIX 6 O32 assembler.
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(SUBTARGET_CC1_SPEC): Enforce mips2 ISA with O32 ABI.
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@ -405,7 +414,7 @@
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(MUST_USE_SJLJ_EXCEPTIONS): Define.
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[_MIPS_SIM == _ABIO32 && !GAS] (CTORS_SECTION_ASM_OP,
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DTORS_SECTION_ASM_OP): Dummy definitions.
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(TARGET_ASM_NAMED_SECTION): Undef statically.
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(TARGET_ASM_NAMED_SECTION): Undef statically.
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(EH_FRAME_SECTION_NAME): Likewise.
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(ASM_OUTPUT_FILENAME): Integrate mips.h version.
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(LINK_SPEC): Only use default options -call_shared -no_unresolved
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@ -468,7 +477,7 @@
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* arm-modes.def (CC_Nmode): New condition code mode.
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* arm.c (thumb_condition_code): Delete.
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(arm_select_cc_mode): Handle single-bit test for Thumb.
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(arm_print_operand, cases 'd' and 'D'): Don't special case the
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(arm_print_operand, cases 'd' and 'D'): Don't special case the
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condition code logic for Thumb.
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(get_arm_condition_code): Handle CC_Nmode.
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(thumb_cbrch_target_operand): New function.
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@ -482,7 +491,7 @@
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(subsi3_cbranch, subsi3_cbranch_scratch): New Thumb patterns.
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(cbranchne_decr1): Re-work to use CC_Nmode.
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* arm.c (thumb_expand_epilogue): Add clobbers of registers restored
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* arm.c (thumb_expand_epilogue): Add clobbers of registers restored
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by the return instruction. Add a use of the link register if it
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wasn't stored.
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@ -1828,6 +1828,10 @@ c_common_type_for_size (unsigned int bits, int unsignedp)
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return 0;
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}
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/* Used for communication between c_common_type_for_mode and
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c_register_builtin_type. */
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static GTY(()) tree registered_builtin_types;
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/* Return a data type that has machine mode MODE.
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If the mode is an integer,
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then UNSIGNEDP selects between signed and unsigned types. */
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@ -1835,6 +1839,8 @@ c_common_type_for_size (unsigned int bits, int unsignedp)
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tree
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c_common_type_for_mode (enum machine_mode mode, int unsignedp)
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{
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tree t;
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if (mode == TYPE_MODE (integer_type_node))
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return unsignedp ? unsigned_type_node : integer_type_node;
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@ -1923,6 +1929,10 @@ c_common_type_for_mode (enum machine_mode mode, int unsignedp)
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break;
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}
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for (t = registered_builtin_types; t; t = TREE_CHAIN (t))
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if (TYPE_MODE (TREE_VALUE (t)) == mode)
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return TREE_VALUE (t);
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return 0;
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}
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@ -2051,6 +2061,8 @@ c_register_builtin_type (tree type, const char* name)
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if (!TYPE_NAME (type))
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TYPE_NAME (type) = decl;
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pushdecl (decl);
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registered_builtin_types = tree_cons (0, type, registered_builtin_types);
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}
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13
gcc/optabs.c
13
gcc/optabs.c
@ -5019,18 +5019,7 @@ init_integral_libfuncs (optab optable, const char *opname, int suffix)
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static void
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init_floating_libfuncs (optab optable, const char *opname, int suffix)
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{
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enum machine_mode fmode, dmode, lmode;
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fmode = float_type_node ? TYPE_MODE (float_type_node) : VOIDmode;
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dmode = double_type_node ? TYPE_MODE (double_type_node) : VOIDmode;
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lmode = long_double_type_node ? TYPE_MODE (long_double_type_node) : VOIDmode;
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if (fmode != VOIDmode)
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init_libfuncs (optable, fmode, fmode, opname, suffix);
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if (dmode != fmode && dmode != VOIDmode)
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init_libfuncs (optable, dmode, dmode, opname, suffix);
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if (lmode != dmode && lmode != VOIDmode)
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init_libfuncs (optable, lmode, lmode, opname, suffix);
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init_libfuncs (optable, MIN_MODE_FLOAT, MAX_MODE_FLOAT, opname, suffix);
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}
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/* Initialize the libfunc fields of an entire group of entries of an
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