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genopinit.c (vec_realign_store_optab): Initialization removed.
2004-12-09 Dorit Naishlos <dorit@il.ibm.com>
* genopinit.c (vec_realign_store_optab): Initialization removed.
* optabs.c (optab_for_tree_code): REALIGN_STORE_EXPR case removed.
* optabs.h (optab_index): OTI_vec_realign_store Removed.
(vec_realign_store_optab): Removed.
* target-def.h (TARGET_VECTORIZE_BUILTIN_MASK_FOR_STORE): Removed.
* target.h (builtin_mask_for_store): Removed.
* tree.def (REALIGN_STORE_EXPR): Removed.
* config/rs6000/rs6000.c (rs6000_builtin_mask_for_store): Removed.
(altivec_builtin_mask_for_store): Removed.
(altivec_init_builtins): Removed initialization of
altivec_builtin_mask_for_store.
* doc/tm.texi (TARGET_VECTORIZE_MISALIGNED_MEM_OK): New.
(TARGET_VECTORIZE_BUILTIN_MASK_FOR_LOAD): New.
From-SVN: r91932
This commit is contained in:
Dorit Naishlos
Dorit Nuzman
parent
08f2586c92
commit
d16b59fa0c
@ -1,3 +1,20 @@
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2004-12-09 Dorit Naishlos <dorit@il.ibm.com>
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* genopinit.c (vec_realign_store_optab): Initialization removed.
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* optabs.c (optab_for_tree_code): REALIGN_STORE_EXPR case removed.
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* optabs.h (optab_index): OTI_vec_realign_store Removed.
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(vec_realign_store_optab): Removed.
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* target-def.h (TARGET_VECTORIZE_BUILTIN_MASK_FOR_STORE): Removed.
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* target.h (builtin_mask_for_store): Removed.
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* tree.def (REALIGN_STORE_EXPR): Removed.
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* config/rs6000/rs6000.c (rs6000_builtin_mask_for_store): Removed.
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(altivec_builtin_mask_for_store): Removed.
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(altivec_init_builtins): Removed initialization of
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altivec_builtin_mask_for_store.
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* doc/tm.texi (TARGET_VECTORIZE_MISALIGNED_MEM_OK): New.
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(TARGET_VECTORIZE_BUILTIN_MASK_FOR_LOAD): New.
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2004-12-09 Nathan Sidwell <nathan@codesourcery.com>
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* tree.def (SET_TYPE): Remove.
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@ -147,8 +147,6 @@ enum rs6000_nop_insertion rs6000_sched_insert_nops;
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/* Support targetm.vectorize.builtin_mask_for_load. */
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static GTY(()) tree altivec_builtin_mask_for_load;
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/* Support targetm.vectorize.builtin_mask_for_store. */
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static GTY(()) tree altivec_builtin_mask_for_store;
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/* Size of long double */
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const char *rs6000_long_double_size_string;
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@ -693,7 +691,6 @@ static int pad_groups (FILE *, int, rtx, rtx);
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static void rs6000_sched_finish (FILE *, int);
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static int rs6000_use_sched_lookahead (void);
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static tree rs6000_builtin_mask_for_load (void);
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static tree rs6000_builtin_mask_for_store (void);
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static void rs6000_init_builtins (void);
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static rtx rs6000_expand_unop_builtin (enum insn_code, tree, rtx);
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@ -933,9 +930,6 @@ static const char alt_reg_names[][8] =
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#undef TARGET_VECTORIZE_BUILTIN_MASK_FOR_LOAD
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#define TARGET_VECTORIZE_BUILTIN_MASK_FOR_LOAD rs6000_builtin_mask_for_load
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#undef TARGET_VECTORIZE_BUILTIN_MASK_FOR_STORE
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#define TARGET_VECTORIZE_BUILTIN_MASK_FOR_STORE rs6000_builtin_mask_for_store
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#undef TARGET_INIT_BUILTINS
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#define TARGET_INIT_BUILTINS rs6000_init_builtins
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@ -1592,16 +1586,6 @@ rs6000_builtin_mask_for_load (void)
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return 0;
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}
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/* Implement targetm.vectorize.builtin_mask_for_store. */
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static tree
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rs6000_builtin_mask_for_store (void)
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{
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if (TARGET_ALTIVEC)
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return altivec_builtin_mask_for_store;
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else
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return 0;
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}
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/* Handle generic options of the form -mfoo=yes/no.
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NAME is the option name.
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VALUE is the option value.
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@ -8308,17 +8292,6 @@ altivec_init_builtins (void)
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BUILT_IN_MD, NULL, NULL_TREE);
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/* Record the decl. Will be used by rs6000_builtin_mask_for_load. */
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altivec_builtin_mask_for_load = decl;
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/* Initialize target builtin that implements
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targetm.vectorize.builtin_mask_for_store. */
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decl = lang_hooks.builtin_function ("__builtin_altivec_mask_for_store",
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v16qi_ftype_long_pcvoid,
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ALTIVEC_BUILTIN_MASK_FOR_STORE,
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BUILT_IN_MD, NULL, NULL_TREE);
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/* Record the decl. Will be used by rs6000_builtin_mask_for_store. */
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altivec_builtin_mask_for_store = decl;
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}
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}
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@ -5184,6 +5184,45 @@ holding the constant. This restriction is often true of addresses
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of TLS symbols for various targets.
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@end deftypefn
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@deftypefn {Target Hook} bool TARGET_VECTORIZE_MISALIGNED_MEM_OK (@var{mode})
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This hook should return true if a move* pattern to/from memory
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can be generated for machine_mode @var{mode} even if the memory location
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is unaligned.
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If a move* of data to/from unaligned memory locations is not supported for
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machine_mode @var{mode}, the hook should return false.
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This hook is used by the autovectorizer, and when expanding a
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@code{MISALIGNED_INDIRECT_REF} expression.
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@end deftypefn
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@deftypefn {Target Hook} tree TARGET_VECTORIZE_BUILTIN_MASK_FOR_LOAD (void)
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This hook should return the DECL of a function @var{f} that given an
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address @var{addr} as an argument returns a mask @var{m} that can be
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used to extract from two vectors the relevant data that resides in
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@var{addr} in case @var{addr} is not properly aligned.
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The autovectrizer, when vectorizing a load operation from an address
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@var{addr} that may be unaligned, will generate two vector loads from
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the two aligned addresses around @var{addr}. It then generates a
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@code{REALIGN_LOAD} operation to extract the relevant data from the
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two loaded vectors. The first two arguments to @code{REALIGN_LOAD},
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@var{v1} and @var{v2}, are the two vectors, each of size @var{VS}, and
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the third argument, @var{OFF}, defines how the data will be extracted
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from these two vectors: if @var{OFF} is 0, then the returned vector is
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@var{v2}; otherwise, the returned vector is composed from the last
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@var{VS}-@var{OFF} elements of @var{v1} concatenated to the first
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@var{OFF} elements of @var{v2}.
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If this hook is defined, the autovectorizer will generate a call
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to @var{f} (using the DECL tree that this hook returns) and will
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use the return value of @var{f} as the argument @var{OFF} to
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@code{REALIGN_LOAD}. Therefore, the mask @var{m} returned by @var{f}
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should comply with the semantics expected by @code{REALIGN_LOAD}
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described above.
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If this hook is not defined, then @var{addr} will be used as
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the argument @var{OFF} to @code{REALIGN_LOAD}, in which case the low
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log2(@var{VS})-1 bits of @var{addr} will be considered.
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@end deftypefn
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@node Condition Code
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@section Condition Code Status
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@cindex condition code status
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@ -170,7 +170,6 @@ static const char * const optabs[] =
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"vec_set_optab->handlers[$A].insn_code = CODE_FOR_$(vec_set$a$)",
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"vec_extract_optab->handlers[$A].insn_code = CODE_FOR_$(vec_extract$a$)",
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"vec_init_optab->handlers[$A].insn_code = CODE_FOR_$(vec_init$a$)",
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"vec_realign_store_optab->handlers[$A].insn_code = CODE_FOR_$(vec_realign_store_$a$)",
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"vec_realign_load_optab->handlers[$A].insn_code = CODE_FOR_$(vec_realign_load_$a$)",
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"vcond_gen_code[$A] = CODE_FOR_$(vcond$a$)",
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"vcondu_gen_code[$A] = CODE_FOR_$(vcondu$a$)" };
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@ -294,9 +294,6 @@ optab_for_tree_code (enum tree_code code, tree type)
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case MIN_EXPR:
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return TYPE_UNSIGNED (type) ? umin_optab : smin_optab;
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case REALIGN_STORE_EXPR:
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return vec_realign_store_optab;
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case REALIGN_LOAD_EXPR:
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return vec_realign_load_optab;
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@ -228,8 +228,6 @@ enum optab_index
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OTI_vec_extract,
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/* Initialize vector operand. */
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OTI_vec_init,
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/* Extract specified elements from vectors, for vector store. */
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OTI_vec_realign_store,
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/* Extract specified elements from vectors, for vector load. */
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OTI_vec_realign_load,
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@ -334,7 +332,6 @@ extern GTY(()) optab optab_table[OTI_MAX];
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#define vec_set_optab (optab_table[OTI_vec_set])
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#define vec_extract_optab (optab_table[OTI_vec_extract])
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#define vec_init_optab (optab_table[OTI_vec_init])
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#define vec_realign_store_optab (optab_table[OTI_vec_realign_store])
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#define vec_realign_load_optab (optab_table[OTI_vec_realign_load])
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/* Conversion optabs have their own table and indexes. */
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@ -277,12 +277,10 @@ Foundation, 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
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#define TARGET_VECTORIZE_MISALIGNED_MEM_OK default_vect_misaligned_mem_ok
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#endif
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#define TARGET_VECTORIZE_BUILTIN_MASK_FOR_LOAD 0
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#define TARGET_VECTORIZE_BUILTIN_MASK_FOR_STORE 0
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#define TARGET_VECTORIZE \
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{TARGET_VECTORIZE_MISALIGNED_MEM_OK, \
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TARGET_VECTORIZE_BUILTIN_MASK_FOR_LOAD, \
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TARGET_VECTORIZE_BUILTIN_MASK_FOR_STORE}
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TARGET_VECTORIZE_BUILTIN_MASK_FOR_LOAD}
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/* In except.c */
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#define TARGET_EH_RETURN_FILTER_MODE default_eh_return_filter_mode
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@ -286,17 +286,16 @@ struct gcc_target
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struct vectorize
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{
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/* The following member value is a pointer to a function called
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by the vectorizer, and when expanding a MISALIGNED_INDIREC_REF
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by te vectorizer, and when expanding a MISALIGNED_INDIRECT_REF
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expression. If the hook returns true (false) then a move* pattern
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to/from memory can (cannot) be generated for this mode even if the
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memory location is unaligned. */
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bool (* misaligned_mem_ok) (enum machine_mode);
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/* The following member values are pointers to functions called
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/* The following member value is a pointer to a function called
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by the vectorizer, and return the decl of the target builtin
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function. */
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tree (* builtin_mask_for_load) (void);
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tree (* builtin_mask_for_store) (void);
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} vectorize;
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/* Return machine mode for filter value. */
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11
gcc/tree.def
11
gcc/tree.def
@ -886,17 +886,6 @@ DEFTREECODE (WITH_SIZE_EXPR, "with_size_expr", tcc_expression, 2)
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generated by the builtin targetm.vectorize.mask_for_load_builtin_decl. */
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DEFTREECODE (REALIGN_LOAD_EXPR, "realign_load", tcc_expression, 3)
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/* Extract elements from two input vectors Operand 0 and Operand 1
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size VS, according to the offset OFF defined by Operand 2 as
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follows:
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If OFF > 0, the last OFF elements of vector OP0 are concatenated to
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the first VS - OFF elements of the vector OP1.
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If OFF == 0, then the returned vector is OP0.
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On different targets OFF may take different forms; It can be an address, in
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which case its low log2(VS)-1 bits define the offset, or it can be a mask
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generated by the builtin targetm.vectorize.mask_for_store_builtin_decl. */
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DEFTREECODE (REALIGN_STORE_EXPR, "realign_store", tcc_expression, 3)
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/*
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Local variables:
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mode:c
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