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sparc: Convert to atomic_load/store.

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* config/sparc/predicates.md (register_or_v9_zero_operand): New.
        * config/sparc/sparc.md (UNSPEC_ATOMIC): New.
        * config/sparc/sync.md (atomic_load<I>): New.
        (atomic_loaddi_1, atomic_store<I>, atomic_storedi_1): New.

From-SVN: r181849
This commit is contained in:
Richard Henderson 2011-11-30 07:48:13 -08:00 committed by Richard Henderson
parent 9a7389088f
commit cfe8fee796
4 changed files with 72 additions and 0 deletions
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7
gcc/ChangeLog
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@ -1,3 +1,10 @@
2011-11-30 Richard Henderson <rth@redhat.com>
* config/sparc/predicates.md (register_or_v9_zero_operand): New.
* config/sparc/sparc.md (UNSPEC_ATOMIC): New.
* config/sparc/sync.md (atomic_load<I>): New.
(atomic_loaddi_1, atomic_store<I>, atomic_storedi_1): New.
2011-11-30 Richard Henderson <rth@redhat.com>
* config/sparc/predicates.md (zero_or_v7_operand): New.

5
gcc/config/sparc/predicates.md
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@ -239,6 +239,11 @@
(ior (match_operand 0 "register_operand")
(match_operand 0 "const_zero_operand")))
(define_predicate "register_or_v9_zero_operand"
(ior (match_operand 0 "register_operand")
(and (match_test "TARGET_V9")
(match_operand 0 "const_zero_operand"))))
;; Return true if OP is either the zero constant, the all-ones
;; constant, or a register.
(define_predicate "register_or_zero_or_all_ones_operand"

1
gcc/config/sparc/sparc.md
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@ -41,6 +41,7 @@
(UNSPEC_MOVE_GOTDATA 19)
(UNSPEC_MEMBAR 20)
(UNSPEC_ATOMIC 21)
(UNSPEC_TLSGD 30)
(UNSPEC_TLSLDM 31)

59
gcc/config/sparc/sync.md
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@ -102,6 +102,65 @@
"membar\t%1"
[(set_attr "type" "multi")])
(define_expand "atomic_load<mode>"
[(match_operand:I 0 "register_operand" "")
(match_operand:I 1 "memory_operand" "")
(match_operand:SI 2 "const_int_operand" "")]
""
{
enum memmodel model = (enum memmodel) INTVAL (operands[2]);
sparc_emit_membar_for_model (model, 1, 1);
if (TARGET_ARCH64 || <MODE>mode != DImode)
emit_move_insn (operands[0], operands[1]);
else
emit_insn (gen_atomic_loaddi_1 (operands[0], operands[1]));
sparc_emit_membar_for_model (model, 1, 2);
DONE;
})
(define_insn "atomic_loaddi_1"
[(set (match_operand:DI 0 "register_operand" "=U,?*f")
(unspec:DI [(match_operand:DI 1 "memory_operand" "m,m")]
UNSPEC_ATOMIC))]
"!TARGET_ARCH64"
"ldd\t%1, %0"
[(set_attr "type" "load,fpload")])
(define_expand "atomic_store<mode>"
[(match_operand:I 0 "register_operand" "")
(match_operand:I 1 "memory_operand" "")
(match_operand:SI 2 "const_int_operand" "")]
""
{
enum memmodel model = (enum memmodel) INTVAL (operands[2]);
sparc_emit_membar_for_model (model, 2, 1);
if (TARGET_ARCH64 || <MODE>mode != DImode)
emit_move_insn (operands[0], operands[1]);
else
emit_insn (gen_atomic_storedi_1 (operands[0], operands[1]));
sparc_emit_membar_for_model (model, 2, 2);
DONE;
})
(define_insn "atomic_storedi_1"
[(set (match_operand:DI 0 "memory_operand" "=m,m,m")
(unspec:DI
[(match_operand:DI 1 "register_or_v9_zero_operand" "J,U,?*f")]
UNSPEC_ATOMIC))]
"!TARGET_ARCH64"
"@
stx\t%r1, %0
std\t%1, %0
std\t%1, %0"
[(set_attr "type" "store,store,fpstore")
(set_attr "cpu_feature" "v9,*,*")])
;;;;;;;;
(define_expand "sync_compare_and_swap<mode>"