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Remove compile time warnings when building arm.o
From-SVN: r34114
This commit is contained in:
Nick Clifton
Nick Clifton
parent
8ceaac3c6e
commit
cd2b33d005
@ -1,3 +1,19 @@
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2000-05-23 Nick Clifton <nickc@cygnus.com>
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* configure.in: Treat 'strongarm' as if it were 'arm' when
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determining cpu type.
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* configure: Regenerate.
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* config/arm/arm.c: Change 'char *' to 'const char *' for cases
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where constant strings are involved.
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* config/arm/arm.h (arm_condition_codes): Change type to 'const
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char *'.
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* config/arm/arm-protos.h: Change 'char *' to 'const char *' for
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cases where constant strings are involved.
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Tue May 23 15:08:31 2000 Clinton Popetz <cpopetz@cygnus.com>
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* config/sh/sh.c (gen_far_branch, split_branches): Update
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@ -27,7 +27,7 @@ extern int arm_process_pragma PARAMS ((int (*)(void), void (*) (int),
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char *));
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extern void arm_finalize_pic PARAMS ((void));
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extern int arm_volatile_func PARAMS ((void));
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extern char * arm_output_epilogue PARAMS ((int));
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extern const char * arm_output_epilogue PARAMS ((int));
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extern void output_func_epilogue PARAMS ((int));
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extern void arm_expand_prologue PARAMS ((void));
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/* Used in arm.md, but defined in output.c. */
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@ -40,7 +40,7 @@ extern int arm_valid_machine_decl_attribute PARAMS ((tree, tree, tree));
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extern int arm_comp_type_attributes PARAMS ((tree, tree));
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extern int arm_valid_type_attribute_p PARAMS ((tree, tree, tree, tree));
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extern void arm_set_default_type_attributes PARAMS ((tree));
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extern void arm_encode_call_attribute PARAMS ((tree, char));
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extern void arm_encode_call_attribute PARAMS ((tree, int));
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#endif
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#ifdef RTX_CODE
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extern int const_ok_for_arm PARAMS ((HOST_WIDE_INT));
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@ -93,10 +93,10 @@ extern RTX_CODE minmax_code PARAMS ((rtx));
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extern int adjacent_mem_locations PARAMS ((rtx, rtx));
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extern int load_multiple_sequence PARAMS ((rtx *, int, int *, int *,
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HOST_WIDE_INT *));
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extern char * emit_ldm_seq PARAMS ((rtx *, int));
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extern const char * emit_ldm_seq PARAMS ((rtx *, int));
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extern int store_multiple_sequence PARAMS ((rtx *, int, int *, int *,
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HOST_WIDE_INT *));
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extern char * emit_stm_seq PARAMS ((rtx *, int));
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extern const char * emit_stm_seq PARAMS ((rtx *, int));
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extern rtx arm_gen_load_multiple PARAMS ((int, int, rtx, int, int, int,
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int, int));
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extern rtx arm_gen_store_multiple PARAMS ((int, int, rtx, int, int, int,
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@ -108,20 +108,20 @@ extern rtx arm_gen_compare_reg PARAMS ((RTX_CODE, rtx, rtx));
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extern void arm_reload_in_hi PARAMS ((rtx *));
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extern void arm_reload_out_hi PARAMS ((rtx *));
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extern void arm_reorg PARAMS ((rtx));
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extern char * fp_immediate_constant PARAMS ((rtx));
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extern char * output_call PARAMS ((rtx *));
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extern char * output_call_mem PARAMS ((rtx *));
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extern char * output_mov_long_double_fpu_from_arm PARAMS ((rtx *));
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extern char * output_mov_long_double_arm_from_fpu PARAMS ((rtx *));
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extern char * output_mov_long_double_arm_from_arm PARAMS ((rtx *));
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extern char * output_mov_double_fpu_from_arm PARAMS ((rtx *));
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extern char * output_mov_double_arm_from_fpu PARAMS ((rtx *));
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extern char * output_move_double PARAMS ((rtx *));
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extern char * output_mov_immediate PARAMS ((rtx *));
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extern char * output_add_immediate PARAMS ((rtx *));
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extern char * arithmetic_instr PARAMS ((rtx, int));
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extern const char * fp_immediate_constant PARAMS ((rtx));
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extern const char * output_call PARAMS ((rtx *));
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extern const char * output_call_mem PARAMS ((rtx *));
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extern const char * output_mov_long_double_fpu_from_arm PARAMS ((rtx *));
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extern const char * output_mov_long_double_arm_from_fpu PARAMS ((rtx *));
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extern const char * output_mov_long_double_arm_from_arm PARAMS ((rtx *));
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extern const char * output_mov_double_fpu_from_arm PARAMS ((rtx *));
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extern const char * output_mov_double_arm_from_fpu PARAMS ((rtx *));
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extern const char * output_move_double PARAMS ((rtx *));
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extern const char * output_mov_immediate PARAMS ((rtx *));
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extern const char * output_add_immediate PARAMS ((rtx *));
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extern const char * arithmetic_instr PARAMS ((rtx, int));
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extern void output_ascii_pseudo_op PARAMS ((FILE *, const unsigned char *, int));
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extern char * output_return_instruction PARAMS ((rtx, int, int));
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extern const char * output_return_instruction PARAMS ((rtx, int, int));
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extern void arm_poke_function_name PARAMS ((FILE *, char *));
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extern void output_arm_prologue PARAMS ((FILE *, int));
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extern void arm_print_operand PARAMS ((FILE *, rtx, int));
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@ -152,19 +152,19 @@ extern void aof_dump_imports PARAMS ((FILE *));
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/* Thumb functions. */
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extern void arm_init_expanders PARAMS ((void));
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extern int thumb_far_jump_used_p PARAMS ((int));
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extern char * thumb_unexpanded_epilogue PARAMS ((void));
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extern const char * thumb_unexpanded_epilogue PARAMS ((void));
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extern void thumb_expand_prologue PARAMS ((void));
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extern void thumb_expand_epilogue PARAMS ((void));
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#ifdef TREE_CODE
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extern int is_called_in_ARM_mode PARAMS ((tree));
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#endif
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#ifdef RTX_CODE
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extern int thumb_shiftable_const PARAMS ((unsigned HOST_WIDE_INT));
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extern void thumb_final_prescan_insn PARAMS ((rtx));
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extern char * thumb_load_double_from_address
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PARAMS ((rtx *));
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extern void output_thumb_prologue PARAMS ((FILE *));
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extern char * thumb_output_move_mem_multiple
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#ifdef RTX_CODE
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extern void thumb_final_prescan_insn PARAMS ((rtx));
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extern const char * thumb_load_double_from_address
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PARAMS ((rtx *));
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extern const char * thumb_output_move_mem_multiple
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PARAMS ((int, rtx *));
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extern void thumb_expand_movstrqi PARAMS ((rtx *));
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extern int thumb_cmp_operand PARAMS ((rtx, enum machine_mode));
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@ -63,22 +63,22 @@ static int const_ok_for_op PARAMS ((Hint, enum rtx_code));
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static int eliminate_lr2ip PARAMS ((rtx *));
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static rtx emit_multi_reg_push PARAMS ((int));
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static rtx emit_sfm PARAMS ((int, int));
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static char * fp_const_from_val PARAMS ((REAL_VALUE_TYPE *));
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static const char * fp_const_from_val PARAMS ((REAL_VALUE_TYPE *));
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static arm_cc get_arm_condition_code PARAMS ((rtx));
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static void init_fpa_table PARAMS ((void));
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static Hint int_log2 PARAMS ((Hint));
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static rtx is_jump_table PARAMS ((rtx));
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static char * output_multi_immediate PARAMS ((rtx *, char *, char *, int, Hint));
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static void print_multi_reg PARAMS ((FILE *, char *, int, int, int));
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static const char * output_multi_immediate PARAMS ((rtx *, const char *, const char *, int, Hint));
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static void print_multi_reg PARAMS ((FILE *, const char *, int, int, int));
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static Mmode select_dominance_cc_mode PARAMS ((rtx, rtx, Hint));
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static char * shift_op PARAMS ((rtx, Hint *));
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static const char * shift_op PARAMS ((rtx, Hint *));
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static void arm_init_machine_status PARAMS ((struct function *));
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static void arm_mark_machine_status PARAMS ((struct function *));
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static int number_of_first_bit_set PARAMS ((int));
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static void replace_symbols_in_block PARAMS ((tree, rtx, rtx));
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static void thumb_exit PARAMS ((FILE *, int, rtx));
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static void thumb_pushpop PARAMS ((FILE *, int, int));
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static char * thumb_condition_code PARAMS ((rtx, int));
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static const char * thumb_condition_code PARAMS ((rtx, int));
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static rtx is_jump_table PARAMS ((rtx));
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static Hint get_jump_table_size PARAMS ((rtx));
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static Mnode * move_minipool_fix_forward_ref PARAMS ((Mnode *, Mnode *, Hint));
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@ -202,7 +202,7 @@ rtx arm_target_insn;
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int arm_target_label;
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/* The condition codes of the ARM, and the inverse function. */
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char * arm_condition_codes[] =
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const char * arm_condition_codes[] =
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{
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"eq", "ne", "cs", "cc", "mi", "pl", "vs", "vc",
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"hi", "ls", "ge", "lt", "gt", "le", "al", "nv"
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@ -214,7 +214,7 @@ char * arm_condition_codes[] =
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struct processors
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{
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char * name;
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const char * name;
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unsigned int flags;
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};
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@ -357,8 +357,8 @@ arm_override_options ()
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unsigned int sought;
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static struct cpu_default
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{
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int cpu;
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char * name;
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int cpu;
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const char * name;
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}
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cpu_defaults[] =
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{
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@ -599,7 +599,7 @@ arm_override_options ()
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&& (tune_flags & FL_MODE32) == 0)
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flag_schedule_insns = flag_schedule_insns_after_reload = 0;
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arm_prog_mode = TARGET_APCS_32 ? PROG_MODE_PROG32 : PROG_MODE_PROG26;
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arm_prgmode = TARGET_APCS_32 ? PROG_MODE_PROG32 : PROG_MODE_PROG26;
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if (structure_size_string != NULL)
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{
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@ -1704,7 +1704,7 @@ arm_comp_type_attributes (type1, type2)
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void
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arm_encode_call_attribute (decl, flag)
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tree decl;
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char flag;
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int flag;
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{
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const char * str = XSTR (XEXP (DECL_RTL (decl), 0), 0);
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int len = strlen (str);
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@ -2455,7 +2455,7 @@ arm_adjust_cost (insn, link, dep, cost)
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static int fpa_consts_inited = 0;
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char * strings_fpa[8] =
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static const char * strings_fpa[8] =
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{
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"0", "1", "2", "3",
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"4", "5", "0.5", "10"
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@ -3472,7 +3472,7 @@ load_multiple_sequence (operands, nops, regs, base, load_offset)
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|| const_ok_for_arm (-unsorted_offsets[order[0]])) ? 5 : 0;
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}
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char *
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const char *
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emit_ldm_seq (operands, nops)
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rtx * operands;
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int nops;
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@ -3669,7 +3669,7 @@ store_multiple_sequence (operands, nops, regs, base, load_offset)
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return 0;
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}
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char *
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const char *
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emit_stm_seq (operands, nops)
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rtx * operands;
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int nops;
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@ -5611,7 +5611,7 @@ arm_reorg (first)
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/* If the rtx is the correct value then return the string of the number.
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In this way we can ensure that valid double constants are generated even
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when cross compiling. */
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char *
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const char *
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fp_immediate_constant (x)
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rtx x;
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{
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@ -5630,7 +5630,7 @@ fp_immediate_constant (x)
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}
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/* As for fp_immediate_constant, but value is passed directly, not in rtx. */
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static char *
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static const char *
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fp_const_from_val (r)
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REAL_VALUE_TYPE * r;
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{
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@ -5654,7 +5654,7 @@ fp_const_from_val (r)
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static void
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print_multi_reg (stream, instr, reg, mask, hat)
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FILE * stream;
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char * instr;
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const char * instr;
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int reg;
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int mask;
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int hat;
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@ -5681,7 +5681,7 @@ print_multi_reg (stream, instr, reg, mask, hat)
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/* Output a 'call' insn. */
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char *
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const char *
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output_call (operands)
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rtx * operands;
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{
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@ -5739,7 +5739,7 @@ eliminate_lr2ip (x)
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/* Output a 'call' insn that is a reference in memory. */
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char *
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const char *
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output_call_mem (operands)
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rtx * operands;
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{
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@ -5768,7 +5768,7 @@ output_call_mem (operands)
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OPERANDS[0] is an fpu register.
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OPERANDS[1] is the first registers of an arm register pair. */
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char *
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const char *
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output_mov_long_double_fpu_from_arm (operands)
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rtx * operands;
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{
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@ -5792,7 +5792,7 @@ output_mov_long_double_fpu_from_arm (operands)
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OPERANDS[0] is the first registers of an arm register pair.
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OPERANDS[1] is an fpu register. */
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char *
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const char *
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output_mov_long_double_arm_from_fpu (operands)
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rtx * operands;
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{
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@ -5814,7 +5814,7 @@ output_mov_long_double_arm_from_fpu (operands)
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/* Output a move from arm registers to arm registers of a long double
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OPERANDS[0] is the destination.
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OPERANDS[1] is the source. */
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char *
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const char *
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output_mov_long_double_arm_from_arm (operands)
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rtx * operands;
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{
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@ -5851,7 +5851,7 @@ output_mov_long_double_arm_from_arm (operands)
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OPERANDS[0] is an fpu register.
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OPERANDS[1] is the first registers of an arm register pair. */
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char *
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const char *
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output_mov_double_fpu_from_arm (operands)
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rtx * operands;
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{
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@ -5872,7 +5872,7 @@ output_mov_double_fpu_from_arm (operands)
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OPERANDS[0] is the first registers of an arm register pair.
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OPERANDS[1] is an fpu register. */
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char *
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const char *
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output_mov_double_arm_from_fpu (operands)
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rtx * operands;
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{
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@ -5893,7 +5893,7 @@ output_mov_double_arm_from_fpu (operands)
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It must be REG<-REG, REG<-CONST_DOUBLE, REG<-CONST_INT, REG<-MEM
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or MEM<-REG and all MEMs must be offsettable addresses. */
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char *
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const char *
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output_move_double (operands)
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rtx * operands;
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{
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@ -6129,7 +6129,7 @@ output_move_double (operands)
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/* Output an arbitrary MOV reg, #n.
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OPERANDS[0] is a register. OPERANDS[1] is a const_int. */
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char *
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const char *
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output_mov_immediate (operands)
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rtx * operands;
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{
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@ -6170,7 +6170,7 @@ output_mov_immediate (operands)
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/* Output an ADD r, s, #n where n may be too big for one instruction. If
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adding zero to one register, output nothing. */
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char *
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const char *
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output_add_immediate (operands)
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rtx * operands;
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{
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@ -6198,10 +6198,11 @@ output_add_immediate (operands)
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IMMED_OP is the index of the constant slot in OPERANDS.
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N is the constant value. */
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static char *
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static const char *
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output_multi_immediate (operands, instr1, instr2, immed_op, n)
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rtx * operands;
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char * instr1, * instr2;
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const char * instr1;
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const char * instr2;
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int immed_op;
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HOST_WIDE_INT n;
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{
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@ -6217,7 +6218,7 @@ output_multi_immediate (operands, instr1, instr2, immed_op, n)
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else
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{
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int i;
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char *instr = instr1;
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const char * instr = instr1;
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/* Note that n is never zero here (which would give no output). */
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for (i = 0; i < 32; i += 2)
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@ -6231,6 +6232,7 @@ output_multi_immediate (operands, instr1, instr2, immed_op, n)
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}
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}
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}
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return "";
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}
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@ -6240,7 +6242,7 @@ output_multi_immediate (operands, instr1, instr2, immed_op, n)
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operation. SHIFT_FIRST_ARG is TRUE if the first argument of the operator
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was shifted. */
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char *
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const char *
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arithmetic_instr (op, shift_first_arg)
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rtx op;
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int shift_first_arg;
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@ -6274,12 +6276,12 @@ arithmetic_instr (op, shift_first_arg)
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On exit, *AMOUNTP will be -1 if the shift is by a register, or a constant
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shift. */
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static char *
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static const char *
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shift_op (op, amountp)
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rtx op;
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HOST_WIDE_INT *amountp;
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{
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char * mnem;
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const char * mnem;
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enum rtx_code code = GET_CODE (op);
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if (GET_CODE (XEXP (op, 1)) == REG || GET_CODE (XEXP (op, 1)) == SUBREG)
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@ -6447,7 +6449,7 @@ output_ascii_pseudo_op (stream, p, len)
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}
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char *
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const char *
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output_return_instruction (operand, really_return, reverse)
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rtx operand;
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int really_return;
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@ -6732,7 +6734,7 @@ output_arm_prologue (f, frame_size)
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#endif
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}
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char *
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const char *
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arm_output_epilogue (really_return)
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int really_return;
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{
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@ -7398,7 +7400,7 @@ arm_print_operand (stream, x, code)
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case 'S':
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{
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HOST_WIDE_INT val;
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char * shift = shift_op (x, & val);
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const char * shift = shift_op (x, & val);
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if (shift)
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{
|
||||
@ -8041,7 +8043,7 @@ arm_debugger_arg_offset (value, addr)
|
||||
|
||||
/* If we are using the frame pointer to point at the argument, then
|
||||
an offset of 0 is correct. */
|
||||
if (REGNO (addr) == HARD_FRAME_POINTER_REGNUM)
|
||||
if (REGNO (addr) == (unsigned) HARD_FRAME_POINTER_REGNUM)
|
||||
return 0;
|
||||
|
||||
/* If we are using the stack pointer to point at the
|
||||
@ -8087,7 +8089,7 @@ arm_debugger_arg_offset (value, addr)
|
||||
&& REGNO (XEXP (PATTERN (insn), 0)) == REGNO (addr)
|
||||
&& GET_CODE (XEXP (PATTERN (insn), 1)) == PLUS
|
||||
&& GET_CODE (XEXP (XEXP (PATTERN (insn), 1), 0)) == REG
|
||||
&& REGNO (XEXP (XEXP (PATTERN (insn), 1), 0)) == HARD_FRAME_POINTER_REGNUM
|
||||
&& REGNO (XEXP (XEXP (PATTERN (insn), 1), 0)) == (unsigned) HARD_FRAME_POINTER_REGNUM
|
||||
&& GET_CODE (XEXP (XEXP (PATTERN (insn), 1), 1)) == CONST_INT
|
||||
)
|
||||
{
|
||||
@ -8635,7 +8637,7 @@ is_called_in_ARM_mode (func)
|
||||
}
|
||||
|
||||
/* The bits which aren't usefully expanded as rtl. */
|
||||
char *
|
||||
const char *
|
||||
thumb_unexpanded_epilogue ()
|
||||
{
|
||||
int regno;
|
||||
@ -9250,7 +9252,7 @@ output_thumb_prologue (f)
|
||||
a computed memory address. The computed address may involve a
|
||||
register which is overwritten by the load. */
|
||||
|
||||
char *
|
||||
const char *
|
||||
thumb_load_double_from_address (operands)
|
||||
rtx * operands;
|
||||
{
|
||||
@ -9376,7 +9378,7 @@ thumb_load_double_from_address (operands)
|
||||
}
|
||||
|
||||
|
||||
char *
|
||||
const char *
|
||||
thumb_output_move_mem_multiple (n, operands)
|
||||
int n;
|
||||
rtx * operands;
|
||||
@ -9490,12 +9492,12 @@ thumb_cmp_operand (op, mode)
|
||||
|| register_operand (op, mode));
|
||||
}
|
||||
|
||||
static char *
|
||||
static const char *
|
||||
thumb_condition_code (x, invert)
|
||||
rtx x;
|
||||
int invert;
|
||||
{
|
||||
static char * conds[] =
|
||||
static const char * conds[] =
|
||||
{
|
||||
"eq", "ne", "cs", "cc", "mi", "pl", "vs", "vc",
|
||||
"hi", "ls", "ge", "lt", "gt", "le"
|
||||
|
||||
@ -59,7 +59,7 @@ typedef enum arm_cond_code
|
||||
arm_cc;
|
||||
|
||||
extern arm_cc arm_current_cc;
|
||||
extern char * arm_condition_codes[];
|
||||
extern const char * arm_condition_codes[];
|
||||
|
||||
#define ARM_INVERSE_CONDITION_CODE(X) ((arm_cc) (((int)X) ^ 1))
|
||||
|
||||
|
||||
3
gcc/configure
vendored
3
gcc/configure
vendored
@ -3437,6 +3437,9 @@ for machine in $build $host $target; do
|
||||
alpha*-*-*)
|
||||
cpu_type=alpha
|
||||
;;
|
||||
strongarm*-*-*)
|
||||
cpu_type=arm
|
||||
;;
|
||||
arm*-*-*)
|
||||
cpu_type=arm
|
||||
;;
|
||||
|
||||
@ -566,6 +566,9 @@ for machine in $build $host $target; do
|
||||
alpha*-*-*)
|
||||
cpu_type=alpha
|
||||
;;
|
||||
strongarm*-*-*)
|
||||
cpu_type=arm
|
||||
;;
|
||||
arm*-*-*)
|
||||
cpu_type=arm
|
||||
;;
|
||||
|
||||
Loading…
Reference in New Issue
Block a user