From cd28557ca20fb296bad6f5e77b5f1dcd0ee6829c Mon Sep 17 00:00:00 2001 From: Stephane Carrez Date: Fri, 15 Mar 2002 23:13:07 +0100 Subject: [PATCH] m68hc11.md ("logicalsi3_zexthi"): Fix constraints and split of AND operation to clear the upper bits. * config/m68hc11/m68hc11.md ("logicalsi3_zexthi"): Fix constraints and split of AND operation to clear the upper bits. ("*logicalsi3_zextqi"): Likewise. ("*logicallhi3_zexthi_ashift8"): Likewise. ("*logicalsi3_silshr16"): Likewise. ("logicalsi3_silshl16"): Likewise. ("anddi3", "iordi3", "xordi3" splits): Remove constraints. From-SVN: r50845 --- gcc/ChangeLog | 10 +++ gcc/config/m68hc11/m68hc11.md | 134 +++++++++++++++++++++------------- 2 files changed, 95 insertions(+), 49 deletions(-) diff --git a/gcc/ChangeLog b/gcc/ChangeLog index 2aa5993c4773..288c322cf353 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,3 +1,13 @@ +2002-03-15 Stephane Carrez + + * config/m68hc11/m68hc11.md ("logicalsi3_zexthi"): Fix constraints + and split of AND operation to clear the upper bits. + ("*logicalsi3_zextqi"): Likewise. + ("*logicallhi3_zexthi_ashift8"): Likewise. + ("*logicalsi3_silshr16"): Likewise. + ("logicalsi3_silshl16"): Likewise. + ("anddi3", "iordi3", "xordi3" splits): Remove constraints. + 2002-03-15 Stephane Carrez * config/m68hc11/m68hc11.c (m68hc11_symbolic_p): New function. diff --git a/gcc/config/m68hc11/m68hc11.md b/gcc/config/m68hc11/m68hc11.md index 1871d47e6d2e..306053fa6109 100644 --- a/gcc/config/m68hc11/m68hc11.md +++ b/gcc/config/m68hc11/m68hc11.md @@ -3617,11 +3617,11 @@ ;;-------------------------------------------------------------------- (define_insn "*logicalsi3_zexthi" - [(set (match_operand:SI 0 "register_operand" "=D,D") + [(set (match_operand:SI 0 "register_operand" "=D") (match_operator:SI 3 "m68hc11_logical_operator" [(zero_extend:SI - (match_operand:HI 1 "general_operand" "imdA,!udimA")) - (match_operand:SI 2 "general_operand" "Dimu,!Dimu")]))] + (match_operand:HI 1 "general_operand" "imudA")) + (match_operand:SI 2 "general_operand" "Dimu")]))] "" "#") @@ -3634,12 +3634,12 @@ "" "#") -(define_split - [(set (match_operand:SI 0 "register_operand" "=D,D") +(define_split /* logicalsi3_zextqi */ + [(set (match_operand:SI 0 "register_operand" "") (match_operator:SI 3 "m68hc11_logical_operator" [(zero_extend:SI - (match_operand:QI 1 "general_operand" "dxy,imu")) - (match_operand:SI 2 "general_operand" "imuD,imuD")]))] + (match_operand:QI 1 "general_operand" "")) + (match_operand:SI 2 "general_operand" "")]))] "z_replacement_completed == 2" [(set (reg:QI A_REGNUM) (match_dup 4)) (set (reg:QI D_REGNUM) (match_dup 7)) @@ -3661,15 +3661,21 @@ operands[5] = m68hc11_gen_lowpart (QImode, operands[4]); operands[4] = m68hc11_gen_highpart (QImode, operands[4]); operands[6] = m68hc11_gen_highpart (HImode, operands[2]); - } + } + /* For an AND, make sure the high 24-bit part is cleared. */ + if (GET_CODE (operands[3]) == AND) + { + operands[4] = const0_rtx; + operands[6] = const0_rtx; + } ") -(define_split - [(set (match_operand:SI 0 "register_operand" "=D,D") +(define_split /* logicalsi3_zexthi */ + [(set (match_operand:SI 0 "register_operand" "") (match_operator:SI 3 "m68hc11_logical_operator" [(zero_extend:SI - (match_operand:HI 1 "general_operand" "dA,imu")) - (match_operand:SI 2 "general_operand" "imuD,imuD")]))] + (match_operand:HI 1 "general_operand" "")) + (match_operand:SI 2 "general_operand" "")]))] "reload_completed" [(set (reg:HI D_REGNUM) (match_dup 4)) (set (reg:HI D_REGNUM) (match_op_dup 3 [(reg:HI D_REGNUM) (match_dup 5)])) @@ -3687,10 +3693,15 @@ operands[4] = operands[1]; operands[5] = m68hc11_gen_lowpart (HImode, operands[2]); operands[6] = m68hc11_gen_highpart (HImode, operands[2]); - } + } + /* For an AND, make sure the high 16-bit part is cleared. */ + if (GET_CODE (operands[3]) == AND) + { + operands[6] = const0_rtx; + } ") -(define_insn "*logicallhi3_zexthi_ashift8" +(define_insn "*logicalhi3_zexthi_ashift8" [(set (match_operand:HI 0 "register_operand" "=d") (match_operator:HI 3 "m68hc11_logical_operator" [(zero_extend:HI @@ -3710,12 +3721,12 @@ "" "#") -(define_split - [(set (match_operand:HI 0 "register_operand" "=d") +(define_split /* logicalhi3_zexthi */ + [(set (match_operand:HI 0 "register_operand" "") (match_operator:HI 3 "m68hc11_logical_operator" [(zero_extend:HI - (match_operand:QI 1 "general_operand" "imud")) - (match_operand:HI 2 "general_operand" "dimu")]))] + (match_operand:QI 1 "general_operand" "")) + (match_operand:HI 2 "general_operand" "")]))] "z_replacement_completed == 2" [(set (reg:QI B_REGNUM) (match_dup 6)) (set (reg:QI A_REGNUM) (match_dup 4)) @@ -3737,15 +3748,20 @@ else operands[6] = operands[1]; } + /* For an AND, make sure the high 8-bit part is cleared. */ + if (GET_CODE (operands[3]) == AND) + { + operands[4] = const0_rtx; + } ") -(define_split - [(set (match_operand:HI 0 "register_operand" "=d") +(define_split /* logicalhi3_zexthi_ashift8 */ + [(set (match_operand:HI 0 "register_operand" "") (match_operator:HI 3 "m68hc11_logical_operator" [(zero_extend:HI - (match_operand:QI 1 "general_operand" "imud")) + (match_operand:QI 1 "general_operand" "")) (ashift:HI - (match_operand:HI 2 "general_operand" "dimu") + (match_operand:HI 2 "general_operand" "") (const_int 8))]))] "z_replacement_completed == 2" [(set (reg:QI A_REGNUM) (match_dup 4)) @@ -3771,22 +3787,22 @@ ") (define_insn "*logicalsi3_silshr16" - [(set (match_operand:SI 0 "register_operand" "=D,D") + [(set (match_operand:SI 0 "register_operand" "=D,D,D") (match_operator:SI 3 "m68hc11_logical_operator" [(lshiftrt:SI - (match_operand:SI 1 "general_operand" "uim,?D") + (match_operand:SI 1 "general_operand" "uim,uim,?D") (const_int 16)) - (match_operand:SI 2 "general_operand" "uim,0")]))] + (match_operand:SI 2 "general_operand" "uim,0,0")]))] "" "#") -(define_split - [(set (match_operand:SI 0 "register_operand" "=D,D") +(define_split /* logicalsi3_silshr16 */ + [(set (match_operand:SI 0 "register_operand" "") (match_operator:SI 3 "m68hc11_logical_operator" [(lshiftrt:SI - (match_operand:SI 1 "general_operand" "uim,?D") + (match_operand:SI 1 "general_operand" "") (const_int 16)) - (match_operand:SI 2 "general_operand" "uim,0")]))] + (match_operand:SI 2 "general_operand" "")]))] "reload_completed" [(set (reg:HI D_REGNUM) (match_dup 4)) (set (reg:HI D_REGNUM) (match_op_dup 3 [(reg:HI D_REGNUM) (match_dup 5)])) @@ -3804,6 +3820,11 @@ } PUT_MODE (operands[3], HImode); + /* For an AND, make sure the high 16-bit part is cleared. */ + if (GET_CODE (operands[3]) == AND) + { + operands[6] = const0_rtx; + } ") (define_insn "*logicalsi3_silshl16" @@ -3816,21 +3837,24 @@ "" "#") -(define_split - [(set (match_operand:SI 0 "register_operand" "=D,D") +(define_split /* logicalsi3_silshl16 */ + [(set (match_operand:SI 0 "register_operand" "") (match_operator:SI 3 "m68hc11_logical_operator" [(ashift:SI - (match_operand:SI 1 "general_operand" "uim,?D") + (match_operand:SI 1 "general_operand" "") (const_int 16)) - (match_operand:SI 2 "general_operand" "0,0")]))] + (match_operand:SI 2 "general_operand" "")]))] "z_replacement_completed == 2" - [(parallel [(set (reg:HI D_REGNUM) (reg:HI X_REGNUM)) - (set (reg:HI X_REGNUM) (reg:HI D_REGNUM))]) - (set (reg:HI D_REGNUM) (match_op_dup 3 [(reg:HI D_REGNUM) (match_dup 4)])) - (parallel [(set (reg:HI D_REGNUM) (reg:HI X_REGNUM)) - (set (reg:HI X_REGNUM) (reg:HI D_REGNUM))])] + [(set (reg:HI X_REGNUM) (match_op_dup 3 [(reg:HI X_REGNUM) (match_dup 4)])) + (set (reg:HI D_REGNUM) (match_dup 5))] "operands[4] = m68hc11_gen_lowpart (HImode, operands[1]); - PUT_MODE (operands[3], HImode);") + PUT_MODE (operands[3], HImode); + + if (GET_CODE (operands[3]) == AND) + operands[5] = const0_rtx; + else + operands[5] = gen_rtx (REG, HImode, HARD_D_REGNUM); + ") ;;-------------------------------------------------------------------- @@ -3840,29 +3864,41 @@ ;; 16-bit logical patterns. ;;-------------------------------------------------------------------- -;; Split 64-bit logical operations (AND, OR, XOR). +;; Split 64-bit logical operations: anddi3, iordi3, xordi3 (define_split - [(set (match_operand:DI 0 "reg_or_some_mem_operand" "=mu") + [(set (match_operand:DI 0 "reg_or_some_mem_operand" "") (match_operator:DI 4 "m68hc11_logical_operator" - [(match_operand:DI 1 "reg_or_some_mem_operand" "%imu") - (match_operand:DI 2 "general_operand" "imu")])) - (clobber (match_scratch:HI 3 "=d"))] + [(match_operand:DI 1 "reg_or_some_mem_operand" "") + (match_operand:DI 2 "general_operand" "")])) + (clobber (match_scratch:HI 3 ""))] "reload_completed" [(const_int 0)] "m68hc11_split_logical (SImode, GET_CODE (operands[4]), operands); DONE;") -;; Split 32-bit logical operations (AND, OR, XOR). +;; Split 32-bit logical operations: andsi3, iorsi3, xorsi3 (define_split - [(set (match_operand:SI 0 "register_operand" "=D") + [(set (match_operand:SI 0 "register_operand" "") (match_operator:SI 3 "m68hc11_logical_operator" - [(match_operand:SI 1 "register_operand" "%0") - (match_operand:SI 2 "general_operand" "Dimu")]))] - "reload_completed" + [(match_operand:SI 1 "register_operand" "") + (match_operand:SI 2 "general_operand" "")]))] + "0 && reload_completed" [(const_int 0)] "m68hc11_split_logical (HImode, GET_CODE (operands[3]), operands); DONE;") +;; Split 32-bit logical operations: andsi3, iorsi3, xorsi3 +(define_split + [(set (match_operand:SI 0 "reg_or_some_mem_operand" "") + (match_operator:SI 4 "m68hc11_logical_operator" + [(match_operand:SI 1 "reg_or_some_mem_operand" "") + (match_operand:SI 2 "general_operand" "")])) + (clobber (match_scratch:HI 3 ""))] + "reload_completed" + [(const_int 0)] + "m68hc11_split_logical (HImode, GET_CODE (operands[4]), operands); + DONE;") + ;;-------------------------------------------------------------------- ;; 16-bit Arithmetic and logical operations on X and Y: ;;