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rs6000.md (ctrdi*): Add FPR constraint and associated splitter.
2002-04-02 Alan Modra <amodra@bigpond.net.au>
* config/rs6000/rs6000.md (ctrdi*): Add FPR constraint and
associated splitter. Remove MQ constraint.
(ctrdi_internal4): Correct CCmode clobber.
From-SVN: r51767
This commit is contained in:
Alan Modra
David Edelsohn
parent
c544921cc0
commit
c94ccb87d7
@ -1,3 +1,9 @@
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2002-04-02 Alan Modra <amodra@bigpond.net.au>
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* config/rs6000/rs6000.md (ctrdi*): Add FPR constraint and
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associated splitter. Remove MQ constraint.
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(ctrdi_internal4): Correct CCmode clobber.
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2002-04-02 John David Anglin <dave@hiauly1.hia.nrc.ca>
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* milli64.S ($$dyncall): New function.
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@ -13264,15 +13264,15 @@
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(define_insn "*ctrdi_internal1"
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[(set (pc)
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(if_then_else (ne (match_operand:DI 1 "register_operand" "c,*r,*r")
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(if_then_else (ne (match_operand:DI 1 "register_operand" "c,*r,*r,!*f")
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(const_int 1))
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(label_ref (match_operand 0 "" ""))
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(pc)))
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(set (match_operand:DI 2 "register_operand" "=1,*r,m*q*c*l")
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(set (match_operand:DI 2 "register_operand" "=1,*r,m*c*l,!*f")
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(plus:DI (match_dup 1)
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(const_int -1)))
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(clobber (match_scratch:CC 3 "=X,&x,&x"))
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(clobber (match_scratch:DI 4 "=X,X,r"))]
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(clobber (match_scratch:CC 3 "=X,&x,&x,&x"))
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(clobber (match_scratch:DI 4 "=X,X,r,r"))]
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"TARGET_POWERPC64"
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"*
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{
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@ -13284,19 +13284,19 @@
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return \"bdz $+8\;b %l0\";
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}"
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[(set_attr "type" "branch")
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(set_attr "length" "*,12,16")])
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(set_attr "length" "*,12,16,24")])
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(define_insn "*ctrdi_internal2"
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[(set (pc)
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(if_then_else (ne (match_operand:DI 1 "register_operand" "c,*r,*r")
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(if_then_else (ne (match_operand:DI 1 "register_operand" "c,*r,*r,!*f")
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(const_int 1))
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(pc)
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(label_ref (match_operand 0 "" ""))))
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(set (match_operand:DI 2 "register_operand" "=1,*r,m*q*c*l")
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(set (match_operand:DI 2 "register_operand" "=1,*r,m*c*l,!*f")
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(plus:DI (match_dup 1)
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(const_int -1)))
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(clobber (match_scratch:CC 3 "=X,&x,&x"))
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(clobber (match_scratch:DI 4 "=X,X,r"))]
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(clobber (match_scratch:CC 3 "=X,&x,&x,&x"))
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(clobber (match_scratch:DI 4 "=X,X,r,r"))]
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"TARGET_POWERPC64"
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"*
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{
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@ -13308,7 +13308,7 @@
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return \"{bdn|bdnz} $+8\;b %l0\";
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}"
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[(set_attr "type" "branch")
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(set_attr "length" "*,12,16")])
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(set_attr "length" "*,12,16,24")])
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;; Similar, but we can use GE since we have a REG_NONNEG.
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@ -13362,15 +13362,15 @@
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(define_insn "*ctrdi_internal3"
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[(set (pc)
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(if_then_else (ge (match_operand:DI 1 "register_operand" "c,*r,*r")
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(if_then_else (ge (match_operand:DI 1 "register_operand" "c,*r,*r,!*f")
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(const_int 0))
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(label_ref (match_operand 0 "" ""))
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(pc)))
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(set (match_operand:DI 2 "register_operand" "=1,*r,m*q*c*l")
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(set (match_operand:DI 2 "register_operand" "=1,*r,m*c*l,!*f")
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(plus:DI (match_dup 1)
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(const_int -1)))
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(clobber (match_scratch:CC 3 "=X,&x,&X"))
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(clobber (match_scratch:DI 4 "=X,X,r"))]
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(clobber (match_scratch:CC 3 "=X,&x,&x,&x"))
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(clobber (match_scratch:DI 4 "=X,X,r,r"))]
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"TARGET_POWERPC64 && find_reg_note (insn, REG_NONNEG, 0)"
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"*
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{
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@ -13382,19 +13382,19 @@
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return \"bdz $+8\;b %l0\";
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}"
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[(set_attr "type" "branch")
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(set_attr "length" "*,12,16")])
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(set_attr "length" "*,12,16,24")])
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(define_insn "*ctrdi_internal4"
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[(set (pc)
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(if_then_else (ge (match_operand:DI 1 "register_operand" "c,*r,*r")
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(if_then_else (ge (match_operand:DI 1 "register_operand" "c,*r,*r,!*f")
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(const_int 0))
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(pc)
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(label_ref (match_operand 0 "" ""))))
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(set (match_operand:DI 2 "register_operand" "=1,*r,m*q*c*l")
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(set (match_operand:DI 2 "register_operand" "=1,*r,m*c*l,!*f")
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(plus:DI (match_dup 1)
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(const_int -1)))
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(clobber (match_scratch:CC 3 "=X,&x,&X"))
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(clobber (match_scratch:DI 4 "=X,X,r"))]
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(clobber (match_scratch:CC 3 "=X,&x,&x,&x"))
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(clobber (match_scratch:DI 4 "=X,X,r,r"))]
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"TARGET_POWERPC64 && find_reg_note (insn, REG_NONNEG, 0)"
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"*
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{
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@ -13406,7 +13406,7 @@
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return \"{bdn|bdnz} $+8\;b %l0\";
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}"
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[(set_attr "type" "branch")
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(set_attr "length" "*,12,16")])
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(set_attr "length" "*,12,16,24")])
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;; Similar but use EQ
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@ -13460,15 +13460,15 @@
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(define_insn "*ctrdi_internal5"
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[(set (pc)
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(if_then_else (eq (match_operand:DI 1 "register_operand" "c,*r,*r")
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(if_then_else (eq (match_operand:DI 1 "register_operand" "c,*r,*r,!*f")
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(const_int 1))
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(label_ref (match_operand 0 "" ""))
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(pc)))
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(set (match_operand:DI 2 "register_operand" "=1,*r,m*q*c*l")
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(set (match_operand:DI 2 "register_operand" "=1,*r,m*c*l,!*f")
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(plus:DI (match_dup 1)
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(const_int -1)))
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(clobber (match_scratch:CC 3 "=X,&x,&x"))
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(clobber (match_scratch:DI 4 "=X,X,r"))]
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(clobber (match_scratch:CC 3 "=X,&x,&x,&x"))
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(clobber (match_scratch:DI 4 "=X,X,r,r"))]
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"TARGET_POWERPC64"
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"*
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{
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@ -13480,19 +13480,19 @@
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return \"{bdn|bdnz} $+8\;b %l0\";
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}"
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[(set_attr "type" "branch")
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(set_attr "length" "*,12,16")])
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(set_attr "length" "*,12,16,24")])
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(define_insn "*ctrdi_internal6"
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[(set (pc)
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(if_then_else (eq (match_operand:DI 1 "register_operand" "c,*r,*r")
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(if_then_else (eq (match_operand:DI 1 "register_operand" "c,*r,*r,!*f")
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(const_int 1))
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(pc)
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(label_ref (match_operand 0 "" ""))))
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(set (match_operand:DI 2 "register_operand" "=1,*r,m*q*c*l")
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(set (match_operand:DI 2 "register_operand" "=1,*r,m*c*l,!*f")
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(plus:DI (match_dup 1)
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(const_int -1)))
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(clobber (match_scratch:CC 3 "=X,&x,&x"))
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(clobber (match_scratch:DI 4 "=X,X,r"))]
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(clobber (match_scratch:CC 3 "=X,&x,&x,&x"))
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(clobber (match_scratch:DI 4 "=X,X,r,r"))]
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"TARGET_POWERPC64"
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"*
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{
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@ -13504,7 +13504,7 @@
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return \"bdz $+8\;b %l0\";
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}"
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[(set_attr "type" "branch")
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(set_attr "length" "*,12,16")])
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(set_attr "length" "*,12,16,24")])
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;; Now the splitters if we could not allocate the CTR register
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@ -13575,7 +13575,7 @@
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(const_int -1)))
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(clobber (match_scratch:CC 3 ""))
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(clobber (match_scratch:DI 4 ""))]
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"TARGET_POWERPC64 && reload_completed"
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"TARGET_POWERPC64 && reload_completed && INT_REGNO_P (REGNO (operands[0]))"
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[(parallel [(set (match_dup 3)
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(compare:CC (plus:DI (match_dup 1)
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(const_int -1))
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@ -13618,6 +13618,45 @@
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"
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{ operands[7] = gen_rtx (GET_CODE (operands[2]), VOIDmode, operands[3],
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const0_rtx); }")
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(define_split
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[(set (pc)
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(if_then_else (match_operator 2 "comparison_operator"
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[(match_operand:DI 1 "gpc_reg_operand" "")
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(const_int 1)])
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(match_operand 5 "" "")
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(match_operand 6 "" "")))
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(set (match_operand:DI 0 "gpc_reg_operand" "")
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(plus:DI (match_dup 1)
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(const_int -1)))
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(clobber (match_scratch:CC 3 ""))
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(clobber (match_scratch:DI 4 ""))]
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"TARGET_POWERPC64 && reload_completed && FP_REGNO_P (REGNO (operands[0]))"
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[(set (match_dup 8)
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(match_dup 1))
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(set (match_dup 4)
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(match_dup 8))
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(parallel [(set (match_dup 3)
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(compare:CC (plus:DI (match_dup 4)
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(const_int -1))
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(const_int 0)))
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(set (match_dup 4)
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(plus:DI (match_dup 4)
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(const_int -1)))])
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(set (match_dup 8)
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(match_dup 4))
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(set (match_dup 0)
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(match_dup 8))
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(set (pc) (if_then_else (match_dup 7)
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(match_dup 5)
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(match_dup 6)))]
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"
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{
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operands[7] = gen_rtx (GET_CODE (operands[2]), VOIDmode, operands[3],
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const0_rtx);
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operands[8] = assign_stack_temp (DImode, GET_MODE_SIZE (DImode), 0);
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}")
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(define_insn "trap"
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[(trap_if (const_int 1) (const_int 0))]
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