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coff.h: Replace Hitachi with Renesas.
* config/sh/coff.h: Replace Hitachi with Renesas. * config/sh/elf.h: Likewise. * config/sh/embed-elf.h: Likewise. * config/sh/lib1funcs.asm: Likewise. * config/sh/sh-protos.h: Likewise. * config/sh/sh.c: Likewise. * config/sh/sh.h: Likewise. * config/sh/sh.md: Likewise. From-SVN: r68107
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@ -1,3 +1,14 @@
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2003-06-17 Kazu Hirata <kazu@cs.umass.edu>
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* config/sh/coff.h: Replace Hitachi with Renesas.
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* config/sh/elf.h: Likewise.
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* config/sh/embed-elf.h: Likewise.
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* config/sh/lib1funcs.asm: Likewise.
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* config/sh/sh-protos.h: Likewise.
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* config/sh/sh.c: Likewise.
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* config/sh/sh.h: Likewise.
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* config/sh/sh.md: Likewise.
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2003-06-17 Kazu Hirata <kazu@cs.umass.edu>
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* ChangeLog.3: Fix comment typos.
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@ -1,4 +1,4 @@
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/* Definitions of target machine for gcc for Hitachi / SuperH SH using ELF.
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/* Definitions of target machine for gcc for Renesas / SuperH SH using ELF.
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Copyright (C) 1997, 1998, 2001, 2002 Free Software Foundation, Inc.
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Contributed by Jörn Rennecke <joern.rennecke@superh.com>.
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@ -1,4 +1,4 @@
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/* Definitions of target machine for gcc for Hitachi / SuperH SH using ELF.
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/* Definitions of target machine for gcc for Renesas / SuperH SH using ELF.
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Copyright (C) 1996, 1997, 2000, 2001, 2002 Free Software Foundation, Inc.
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Contributed by Ian Lance Taylor <ian@cygnus.com>.
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@ -1,4 +1,4 @@
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/* Definitions of target machine for GNU compiler for Hitachi / SuperH SH
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/* Definitions of target machine for GNU compiler for Renesas / SuperH SH
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non-Linux embedded targets.
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Copyright (C) 2002 Free Software Foundation, Inc.
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Contributed by J"orn Rennecke <joern.rennecke@superh.com>
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@ -25,7 +25,7 @@ along with this program; see the file COPYING. If not, write to
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the Free Software Foundation, 59 Temple Place - Suite 330,
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Boston, MA 02111-1307, USA. */
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!! libgcc routines for the Hitachi / SuperH SH CPUs.
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!! libgcc routines for the Renesas / SuperH SH CPUs.
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!! Contributed by Steve Chamberlain.
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!! sac@cygnus.com
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@ -998,7 +998,7 @@ hiset: sts macl,r0 ! r0 = bb*dd
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#endif /* ! __SH5__ */
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#ifdef L_sdivsi3_i4
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.title "SH DIVIDE"
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!! 4 byte integer Divide code for the Hitachi SH
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!! 4 byte integer Divide code for the Renesas SH
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#ifdef __SH4__
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!! args in r4 and r5, result in fpul, clobber dr0, dr2
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@ -1306,7 +1306,7 @@ div0: rts
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#ifdef L_udivsi3_i4
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.title "SH DIVIDE"
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!! 4 byte integer Divide code for the Hitachi SH
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!! 4 byte integer Divide code for the Renesas SH
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#ifdef __SH4__
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!! args in r4 and r5, result in fpul, clobber r0, r1, r4, r5, dr0, dr2, dr4,
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!! and t bit
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@ -1,4 +1,4 @@
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/* Definitions of target machine for GNU compiler for Hitachi / SuperH SH.
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/* Definitions of target machine for GNU compiler for Renesas / SuperH SH.
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Copyright (C) 1993, 1994, 1995, 1996, 1997, 1998, 1999, 2000, 2003
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Free Software Foundation, Inc.
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Contributed by Steve Chamberlain (sac@cygnus.com).
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@ -1,4 +1,4 @@
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/* Output routines for GCC for Hitachi / SuperH SH.
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/* Output routines for GCC for Renesas / SuperH SH.
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Copyright (C) 1993, 1994, 1995, 1997, 1997, 1998, 1999, 2000, 2001, 2002,
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2003 Free Software Foundation, Inc.
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Contributed by Steve Chamberlain (sac@cygnus.com).
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@ -6047,7 +6047,7 @@ initial_elimination_offset (from, to)
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abort ();
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}
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/* Handle machine specific pragmas to be semi-compatible with Hitachi
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/* Handle machine specific pragmas to be semi-compatible with Renesas
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compiler. */
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void
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@ -1,4 +1,4 @@
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/* Definitions of target machine for GNU compiler for Hitachi / SuperH SH.
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/* Definitions of target machine for GNU compiler for Renesas / SuperH SH.
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Copyright (C) 1993, 1994, 1995, 1996, 1997, 1998, 1999, 2000, 2001, 2002,
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2003 Free Software Foundation, Inc.
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Contributed by Steve Chamberlain (sac@cygnus.com).
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@ -102,7 +102,7 @@ do { \
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} \
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if (flag_pic) \
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fixed_regs[PIC_OFFSET_TABLE_REGNUM] = 1; \
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/* Hitachi saves and restores mac registers on call. */ \
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/* Renesas saves and restores mac registers on call. */ \
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if (TARGET_HITACHI && ! TARGET_NOMACSAVE) \
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{ \
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call_used_regs[MACH_REG] = 0; \
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@ -235,14 +235,14 @@ extern int target_flags;
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to do function call relaxing. */
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#define TARGET_RELAX (target_flags & RELAX_BIT)
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/* Nonzero if using Hitachi's calling convention. */
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/* Nonzero if using Renesas's calling convention. */
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#define TARGET_HITACHI (target_flags & HITACHI_BIT)
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/* Nonzero if not saving macl/mach when using -mhitachi */
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#define TARGET_NOMACSAVE (target_flags & NOMACSAVE_BIT)
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/* Nonzero if padding structures to a multiple of 4 bytes. This is
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incompatible with Hitachi's compiler, and gives unusual structure layouts
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incompatible with Renesas's compiler, and gives unusual structure layouts
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which confuse programmers.
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??? This option is not useful, but is retained in case there are people
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who are still relying on it. It may be deleted in the future. */
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@ -682,7 +682,7 @@ do { \
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/* Standard register usage. */
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/* Register allocation for the Hitachi calling convention:
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/* Register allocation for the Renesas calling convention:
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r0 arg return
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r1..r3 scratch
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@ -1119,7 +1119,7 @@ extern char sh_additional_register_names[ADDREGNAMES_SIZE] \
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where the address is passed. If it returns 0, the address is
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passed as an "invisible" first argument. */
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/* The Hitachi calling convention doesn't quite fit into this scheme since
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/* The Renesas calling convention doesn't quite fit into this scheme since
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the address is passed like an invisible argument, but one that is always
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passed in memory. */
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#define STRUCT_VALUE \
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@ -3280,7 +3280,7 @@ extern enum mdep_reorg_phase_e mdep_reorg_phase;
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#define TARGET_MEM_FUNCTIONS
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/* Handle Hitachi compiler's pragmas. */
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/* Handle Renesas compiler's pragmas. */
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#define REGISTER_TARGET_PRAGMAS() do { \
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c_register_pragma (0, "interrupt", sh_pr_interrupt); \
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c_register_pragma (0, "trapa", sh_pr_trapa); \
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@ -1,4 +1,4 @@
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;;- Machine description for Hitachi / SuperH SH.
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;;- Machine description for Renesas / SuperH SH.
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;; Copyright (C) 1993, 1994, 1995, 1996, 1997, 1998, 1999, 2000, 2001, 2002, 2003
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;; Free Software Foundation, Inc.
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;; Contributed by Steve Chamberlain (sac@cygnus.com).
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