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s390.c (s390_extract_part, [...]): Type cast added.
2005-08-12 Andreas Krebbel <krebbel1@de.ibm.com> * config/s390/s390.c (s390_extract_part, s390_single_part): Type cast added. (s390_const_ok_for_constraint_p): Added SImode to the N constraint. (s390_output_mi_thunk): Don't use lg on 31 bit. * config/s390/s390.md ("*movdi_31", "*movdf_31"): Added lmy and stmy. ("*llgt_sisi" and splitter): Replaced TARGET_64BIT with TARGET_ZARCH. From-SVN: r103027
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@ -1,3 +1,12 @@
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2005-08-12 Andreas Krebbel <krebbel1@de.ibm.com>
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* config/s390/s390.c (s390_extract_part, s390_single_part):
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Type cast added.
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(s390_const_ok_for_constraint_p): Added SImode to the N constraint.
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(s390_output_mi_thunk): Don't use lg on 31 bit.
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* config/s390/s390.md ("*movdi_31", "*movdf_31"): Added lmy and stmy.
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("*llgt_sisi" and splitter): Replaced TARGET_64BIT with TARGET_ZARCH.
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2005-08-12 Andreas Krebbel <krebbel1@de.ibm.com>
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* config/s390/s390.c (CONST_OK_FOR_J, CONST_OK_FOR_K): New macros.
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@ -947,7 +947,8 @@ s390_extract_part (rtx op, enum machine_mode mode, int def)
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unsigned HOST_WIDE_INT value = 0;
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int max_parts = HOST_BITS_PER_WIDE_INT / GET_MODE_BITSIZE (mode);
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int part_bits = GET_MODE_BITSIZE (mode);
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unsigned HOST_WIDE_INT part_mask = (1 << part_bits) - 1;
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unsigned HOST_WIDE_INT part_mask
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= ((unsigned HOST_WIDE_INT)1 << part_bits) - 1;
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int i;
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for (i = 0; i < max_parts; i++)
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@ -976,7 +977,8 @@ s390_single_part (rtx op,
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{
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unsigned HOST_WIDE_INT value = 0;
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int n_parts = GET_MODE_SIZE (mode) / GET_MODE_SIZE (part_mode);
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unsigned HOST_WIDE_INT part_mask = (1 << GET_MODE_BITSIZE (part_mode)) - 1;
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unsigned HOST_WIDE_INT part_mask
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= ((unsigned HOST_WIDE_INT)1 << GET_MODE_BITSIZE (part_mode)) - 1;
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int i, part = -1;
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if (GET_CODE (op) != CONST_INT)
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@ -1835,8 +1837,9 @@ s390_const_ok_for_constraint_p (HOST_WIDE_INT value,
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switch (str[2])
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{
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case 'H': part_mode = HImode; break;
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case 'Q': part_mode = QImode; break;
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case 'Q': part_mode = QImode; break;
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case 'H': part_mode = HImode; break;
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case 'S': part_mode = SImode; break;
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default: return 0;
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}
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@ -7780,12 +7783,12 @@ s390_output_mi_thunk (FILE *file, tree thunk ATTRIBUTE_UNUSED,
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{
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if (CONST_OK_FOR_J (vcall_offset))
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{
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output_asm_insn ("lg\t%4,0(%1)", op);
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output_asm_insn ("l\t%4,0(%1)", op);
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output_asm_insn ("a\t%1,%3(%4)", op);
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}
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else if (DISP_IN_RANGE (vcall_offset))
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{
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output_asm_insn ("lg\t%4,0(%1)", op);
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output_asm_insn ("l\t%4,0(%1)", op);
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output_asm_insn ("ay\t%1,%3(%4)", op);
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}
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else if (CONST_OK_FOR_K (vcall_offset))
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@ -933,12 +933,14 @@
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s390_split_access_reg (operands[0], &operands[3], &operands[4]);")
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(define_insn "*movdi_31"
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[(set (match_operand:DI 0 "nonimmediate_operand" "=d,Q,d,o,!*f,!*f,!*f,!R,!T,Q")
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(match_operand:DI 1 "general_operand" "Q,d,dKm,d,*f,R,T,*f,*f,Q"))]
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[(set (match_operand:DI 0 "nonimmediate_operand" "=d,d,Q,S,d,o,!*f,!*f,!*f,!R,!T,Q")
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(match_operand:DI 1 "general_operand" "Q,S,d,d,dKm,d,*f,R,T,*f,*f,Q"))]
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"!TARGET_64BIT"
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"@
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lm\t%0,%N0,%S1
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lmy\t%0,%N0,%S1
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stm\t%1,%N1,%S0
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stmy\t%1,%N1,%S0
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#
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#
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ldr\t%0,%1
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@ -947,8 +949,8 @@
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std\t%1,%0
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stdy\t%1,%0
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#"
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[(set_attr "op_type" "RS,RS,*,*,RR,RX,RXY,RX,RXY,SS")
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(set_attr "type" "lm,stm,*,*,floaddf,floaddf,floaddf,fstoredf,fstoredf,*")])
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[(set_attr "op_type" "RS,RSY,RS,RSY,*,*,RR,RX,RXY,RX,RXY,SS")
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(set_attr "type" "lm,lm,stm,stm,*,*,floaddf,floaddf,floaddf,fstoredf,fstoredf,*")])
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(define_split
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[(set (match_operand:DI 0 "nonimmediate_operand" "")
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@ -1393,8 +1395,8 @@
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(set_attr "type" "fsimpdf,floaddf,floaddf,floaddf,fstoredf,fstoredf,lr,load,store,*")])
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(define_insn "*movdf_31"
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[(set (match_operand:DF 0 "nonimmediate_operand" "=f,f,f,f,R,T,d,Q,d,o,Q")
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(match_operand:DF 1 "general_operand" "G,f,R,T,f,f,Q,d,dKm,d,Q"))]
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[(set (match_operand:DF 0 "nonimmediate_operand" "=f,f,f,f,R,T,d,d,Q,S,d,o,Q")
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(match_operand:DF 1 "general_operand" "G,f,R,T,f,f,Q,S,d,d,dPm,d,Q"))]
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"!TARGET_64BIT"
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"@
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lzdr\t%0
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@ -1404,12 +1406,15 @@
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std\t%1,%0
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stdy\t%1,%0
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lm\t%0,%N0,%S1
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lmy\t%0,%N0,%S1
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stm\t%1,%N1,%S0
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stmy\t%1,%N1,%S0
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#
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#
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#"
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[(set_attr "op_type" "RRE,RR,RX,RXY,RX,RXY,RS,RS,*,*,SS")
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(set_attr "type" "fsimpdf,floaddf,floaddf,floaddf,fstoredf,fstoredf,lm,stm,*,*,*")])
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[(set_attr "op_type" "RRE,RR,RX,RXY,RX,RXY,RS,RSY,RS,RSY,*,*,SS")
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(set_attr "type" "fsimpdf,floaddf,floaddf,floaddf,fstoredf,fstoredf,\
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lm,lm,stm,stm,*,*,*")])
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(define_split
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[(set (match_operand:DF 0 "nonimmediate_operand" "")
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@ -2604,7 +2609,7 @@
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[(set (match_operand:SI 0 "register_operand" "=d,d")
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(and:SI (match_operand:SI 1 "nonimmediate_operand" "d,m")
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(const_int 2147483647)))]
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"TARGET_64BIT"
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"TARGET_ZARCH"
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"@
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llgtr\t%0,%1
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llgt\t%0,%1"
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@ -2625,7 +2630,7 @@
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(and:GPR (match_operand:GPR 1 "nonimmediate_operand" "")
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(const_int 2147483647)))
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(clobber (reg:CC CC_REGNUM))]
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"TARGET_64BIT && reload_completed"
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"TARGET_ZARCH && reload_completed"
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[(set (match_dup 0)
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(and:GPR (match_dup 1)
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(const_int 2147483647)))]
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