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RISC-V: Simplify ASM checks in gcc.target/riscv/rvv/base/.
gcc/testsuite/ChangeLog: * gcc.target/riscv/rvv/base/mov-1.c: Simplify operand check. * gcc.target/riscv/rvv/base/mov-10.c: Ditto. * gcc.target/riscv/rvv/base/mov-11.c: Ditto. * gcc.target/riscv/rvv/base/mov-12.c: Ditto. * gcc.target/riscv/rvv/base/mov-2.c: Ditto. * gcc.target/riscv/rvv/base/mov-3.c: Ditto. * gcc.target/riscv/rvv/base/mov-4.c: Ditto. * gcc.target/riscv/rvv/base/mov-5.c: Ditto. * gcc.target/riscv/rvv/base/mov-6.c: Ditto. * gcc.target/riscv/rvv/base/mov-8.c: Ditto. * gcc.target/riscv/rvv/base/mov-9.c: Ditto. * gcc.target/riscv/rvv/base/vread_csr.c: Ditto. * gcc.target/riscv/rvv/base/vsetvl-1.c: Ditto. * gcc.target/riscv/rvv/base/vwrite_csr.c: Ditto.
This commit is contained in:
Kito Cheng
parent
9243c3d1b6
commit
c2c29fbebb
@ -6,9 +6,9 @@
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/*
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** mov1:
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** vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e8,\s*mf8,\s*t[au],\s*m[au]
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** vle8\.v\s+(?:v[0-9]|v[1-2][0-9]|v3[0-1]),0\s*\((?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7])\)
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** vse8\.v\s+(?:v[0-9]|v[1-2][0-9]|v3[0-1]),0\s*\((?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7])\)
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** vsetvli\s+[a-x0-9]+,\s*zero,\s*e8,\s*mf8,\s*t[au],\s*m[au]
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** vle8\.v\s+(?:v[0-9]|v[1-2][0-9]|v3[0-1]),0\s*\([a-x0-9]+\)
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** vse8\.v\s+(?:v[0-9]|v[1-2][0-9]|v3[0-1]),0\s*\([a-x0-9]+\)
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** ret
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*/
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void mov1 (int8_t *in, int8_t *out)
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@ -19,9 +19,9 @@ void mov1 (int8_t *in, int8_t *out)
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/*
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** mov2:
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** vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e8,\s*mf4,\s*t[au],\s*m[au]
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** vle8\.v\s+(?:v[0-9]|v[1-2][0-9]|v3[0-1]),0\s*\((?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7])\)
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** vse8\.v\s+(?:v[0-9]|v[1-2][0-9]|v3[0-1]),0\s*\((?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7])\)
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** vsetvli\s+[a-x0-9]+,\s*zero,\s*e8,\s*mf4,\s*t[au],\s*m[au]
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** vle8\.v\s+(?:v[0-9]|v[1-2][0-9]|v3[0-1]),0\s*\([a-x0-9]+\)
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** vse8\.v\s+(?:v[0-9]|v[1-2][0-9]|v3[0-1]),0\s*\([a-x0-9]+\)
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** ret
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*/
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void mov2 (int8_t *in, int8_t *out)
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@ -32,9 +32,9 @@ void mov2 (int8_t *in, int8_t *out)
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/*
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** mov3:
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** vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e8,\s*mf2,\s*t[au],\s*m[au]
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** vle8\.v\s+(?:v[0-9]|v[1-2][0-9]|v3[0-1]),0\s*\((?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7])\)
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** vse8\.v\s+(?:v[0-9]|v[1-2][0-9]|v3[0-1]),0\s*\((?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7])\)
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** vsetvli\s+[a-x0-9]+,\s*zero,\s*e8,\s*mf2,\s*t[au],\s*m[au]
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** vle8\.v\s+(?:v[0-9]|v[1-2][0-9]|v3[0-1]),0\s*\([a-x0-9]+\)
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** vse8\.v\s+(?:v[0-9]|v[1-2][0-9]|v3[0-1]),0\s*\([a-x0-9]+\)
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** ret
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*/
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void mov3 (int8_t *in, int8_t *out)
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@ -45,8 +45,8 @@ void mov3 (int8_t *in, int8_t *out)
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/*
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** mov4:
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** vl1re8\.v\s+(?:v[0-9]|v[1-2][0-9]|v3[0-1]),0\s*\((?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7])\)
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** vs1r\.v\s+(?:v[0-9]|v[1-2][0-9]|v3[0-1]),0\s*\((?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7])\)
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** vl1re8\.v\s+(?:v[0-9]|v[1-2][0-9]|v3[0-1]),0\s*\([a-x0-9]+\)
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** vs1r\.v\s+(?:v[0-9]|v[1-2][0-9]|v3[0-1]),0\s*\([a-x0-9]+\)
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** ret
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*/
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void mov4 (int8_t *in, int8_t *out)
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@ -57,8 +57,8 @@ void mov4 (int8_t *in, int8_t *out)
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/*
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** mov5:
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** vl2re8\.v\s+(?:v[0-9]|v[1-2][0-9]|v3[0-1]),0\s*\((?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7])\)
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** vs2r\.v\s+(?:v[0-9]|v[1-2][0-9]|v3[0-1]),0\s*\((?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7])\)
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** vl2re8\.v\s+(?:v[0-9]|v[1-2][0-9]|v3[0-1]),0\s*\([a-x0-9]+\)
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** vs2r\.v\s+(?:v[0-9]|v[1-2][0-9]|v3[0-1]),0\s*\([a-x0-9]+\)
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** ret
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*/
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void mov5 (int8_t *in, int8_t *out)
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@ -69,8 +69,8 @@ void mov5 (int8_t *in, int8_t *out)
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/*
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** mov6:
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** vl4re8\.v\s+(?:v[0-9]|v[1-2][0-9]|v3[0-1]),0\s*\((?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7])\)
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** vs4r\.v\s+(?:v[0-9]|v[1-2][0-9]|v3[0-1]),0\s*\((?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7])\)
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** vl4re8\.v\s+(?:v[0-9]|v[1-2][0-9]|v3[0-1]),0\s*\([a-x0-9]+\)
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** vs4r\.v\s+(?:v[0-9]|v[1-2][0-9]|v3[0-1]),0\s*\([a-x0-9]+\)
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** ret
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*/
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void mov6 (int8_t *in, int8_t *out)
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@ -81,8 +81,8 @@ void mov6 (int8_t *in, int8_t *out)
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/*
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** mov7:
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** vl8re8\.v\s+(?:v[0-9]|v[1-2][0-9]|v3[0-1]),0\s*\((?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7])\)
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** vs8r\.v\s+(?:v[0-9]|v[1-2][0-9]|v3[0-1]),0\s*\((?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7])\)
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** vl8re8\.v\s+(?:v[0-9]|v[1-2][0-9]|v3[0-1]),0\s*\([a-x0-9]+\)
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** vs8r\.v\s+(?:v[0-9]|v[1-2][0-9]|v3[0-1]),0\s*\([a-x0-9]+\)
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** ret
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*/
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void mov7 (int8_t *in, int8_t *out)
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@ -93,9 +93,9 @@ void mov7 (int8_t *in, int8_t *out)
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/*
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** mov8:
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** vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e8,\s*mf8,\s*t[au],\s*m[au]
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** vle8\.v\s+(?:v[0-9]|v[1-2][0-9]|v3[0-1]),0\s*\((?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7])\)
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** vse8\.v\s+(?:v[0-9]|v[1-2][0-9]|v3[0-1]),0\s*\((?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7])\)
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** vsetvli\s+[a-x0-9]+,\s*zero,\s*e8,\s*mf8,\s*t[au],\s*m[au]
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** vle8\.v\s+(?:v[0-9]|v[1-2][0-9]|v3[0-1]),0\s*\([a-x0-9]+\)
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** vse8\.v\s+(?:v[0-9]|v[1-2][0-9]|v3[0-1]),0\s*\([a-x0-9]+\)
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** ret
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*/
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void mov8 (uint8_t *in, uint8_t *out)
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@ -106,9 +106,9 @@ void mov8 (uint8_t *in, uint8_t *out)
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/*
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** mov9:
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** vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e8,\s*mf4,\s*t[au],\s*m[au]
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** vle8\.v\s+(?:v[0-9]|v[1-2][0-9]|v3[0-1]),0\s*\((?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7])\)
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** vse8\.v\s+(?:v[0-9]|v[1-2][0-9]|v3[0-1]),0\s*\((?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7])\)
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** vsetvli\s+[a-x0-9]+,\s*zero,\s*e8,\s*mf4,\s*t[au],\s*m[au]
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** vle8\.v\s+(?:v[0-9]|v[1-2][0-9]|v3[0-1]),0\s*\([a-x0-9]+\)
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** vse8\.v\s+(?:v[0-9]|v[1-2][0-9]|v3[0-1]),0\s*\([a-x0-9]+\)
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** ret
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*/
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void mov9 (uint8_t *in, uint8_t *out)
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@ -119,9 +119,9 @@ void mov9 (uint8_t *in, uint8_t *out)
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/*
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** mov10:
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** vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e8,\s*mf2,\s*t[au],\s*m[au]
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** vle8\.v\s+(?:v[0-9]|v[1-2][0-9]|v3[0-1]),0\s*\((?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7])\)
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** vse8\.v\s+(?:v[0-9]|v[1-2][0-9]|v3[0-1]),0\s*\((?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7])\)
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** vsetvli\s+[a-x0-9]+,\s*zero,\s*e8,\s*mf2,\s*t[au],\s*m[au]
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** vle8\.v\s+(?:v[0-9]|v[1-2][0-9]|v3[0-1]),0\s*\([a-x0-9]+\)
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** vse8\.v\s+(?:v[0-9]|v[1-2][0-9]|v3[0-1]),0\s*\([a-x0-9]+\)
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** ret
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*/
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void mov10 (uint8_t *in, uint8_t *out)
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@ -132,8 +132,8 @@ void mov10 (uint8_t *in, uint8_t *out)
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/*
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** mov11:
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** vl1re8\.v\s+(?:v[0-9]|v[1-2][0-9]|v3[0-1]),0\s*\((?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7])\)
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** vs1r\.v\s+(?:v[0-9]|v[1-2][0-9]|v3[0-1]),0\s*\((?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7])\)
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** vl1re8\.v\s+(?:v[0-9]|v[1-2][0-9]|v3[0-1]),0\s*\([a-x0-9]+\)
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** vs1r\.v\s+(?:v[0-9]|v[1-2][0-9]|v3[0-1]),0\s*\([a-x0-9]+\)
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** ret
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*/
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void mov11 (uint8_t *in, uint8_t *out)
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@ -144,8 +144,8 @@ void mov11 (uint8_t *in, uint8_t *out)
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/*
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** mov12:
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** vl2re8\.v\s+(?:v[0-9]|v[1-2][0-9]|v3[0-1]),0\s*\((?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7])\)
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** vs2r\.v\s+(?:v[0-9]|v[1-2][0-9]|v3[0-1]),0\s*\((?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7])\)
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** vl2re8\.v\s+(?:v[0-9]|v[1-2][0-9]|v3[0-1]),0\s*\([a-x0-9]+\)
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** vs2r\.v\s+(?:v[0-9]|v[1-2][0-9]|v3[0-1]),0\s*\([a-x0-9]+\)
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** ret
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*/
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void mov12 (uint8_t *in, uint8_t *out)
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@ -156,8 +156,8 @@ void mov12 (uint8_t *in, uint8_t *out)
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/*
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** mov13:
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** vl4re8\.v\s+(?:v[0-9]|v[1-2][0-9]|v3[0-1]),0\s*\((?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7])\)
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** vs4r\.v\s+(?:v[0-9]|v[1-2][0-9]|v3[0-1]),0\s*\((?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7])\)
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** vl4re8\.v\s+(?:v[0-9]|v[1-2][0-9]|v3[0-1]),0\s*\([a-x0-9]+\)
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** vs4r\.v\s+(?:v[0-9]|v[1-2][0-9]|v3[0-1]),0\s*\([a-x0-9]+\)
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** ret
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*/
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void mov13 (uint8_t *in, uint8_t *out)
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@ -168,8 +168,8 @@ void mov13 (uint8_t *in, uint8_t *out)
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/*
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** mov14:
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** vl8re8\.v\s+(?:v[0-9]|v[1-2][0-9]|v3[0-1]),0\s*\((?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7])\)
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** vs8r\.v\s+(?:v[0-9]|v[1-2][0-9]|v3[0-1]),0\s*\((?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7])\)
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** vl8re8\.v\s+(?:v[0-9]|v[1-2][0-9]|v3[0-1]),0\s*\([a-x0-9]+\)
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** vs8r\.v\s+(?:v[0-9]|v[1-2][0-9]|v3[0-1]),0\s*\([a-x0-9]+\)
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** ret
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*/
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void mov14 (uint8_t *in, uint8_t *out)
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@ -6,8 +6,8 @@
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/*
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** mov1:
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** vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e8,\s*mf8,\s*t[au],\s*m[au]
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** vle8\.v\tv1,0\s*\((?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7])\)
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** vsetvli\s+[a-x0-9]+,\s*zero,\s*e8,\s*mf8,\s*t[au],\s*m[au]
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** vle8\.v\tv1,0\s*\([a-x0-9]+\)
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** ...
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** vmv1r\.v\tv2,v1
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** ...
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@ -24,8 +24,8 @@ void mov1 (int8_t *in, int8_t *out)
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/*
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** mov2:
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** vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e8,\s*mf4,\s*t[au],\s*m[au]
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** vle8\.v\tv1,0\s*\((?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7])\)
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** vsetvli\s+[a-x0-9]+,\s*zero,\s*e8,\s*mf4,\s*t[au],\s*m[au]
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** vle8\.v\tv1,0\s*\([a-x0-9]+\)
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** ...
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** vmv1r\.v\tv2,v1
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** ...
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@ -42,8 +42,8 @@ void mov2 (int8_t *in, int8_t *out)
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/*
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** mov3:
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** vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e8,\s*mf2,\s*t[au],\s*m[au]
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** vle8\.v\tv1,0\s*\((?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7])\)
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** vsetvli\s+[a-x0-9]+,\s*zero,\s*e8,\s*mf2,\s*t[au],\s*m[au]
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** vle8\.v\tv1,0\s*\([a-x0-9]+\)
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** ...
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** vmv1r\.v\tv2,v1
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** ...
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@ -60,7 +60,7 @@ void mov3 (int8_t *in, int8_t *out)
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/*
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** mov4:
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** vl1re8\.v\tv1,0\s*\((?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7])\)
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** vl1re8\.v\tv1,0\s*\([a-x0-9]+\)
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** ...
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** vmv1r\.v\tv2,v1
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** ...
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@ -77,7 +77,7 @@ void mov4 (int8_t *in, int8_t *out)
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/*
|
||||
** mov5:
|
||||
** vl2re8\.v\tv2,0\s*\((?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7])\)
|
||||
** vl2re8\.v\tv2,0\s*\([a-x0-9]+\)
|
||||
** ...
|
||||
** vmv2r\.v\tv4,v2
|
||||
** ...
|
||||
@ -94,7 +94,7 @@ void mov5 (int8_t *in, int8_t *out)
|
||||
|
||||
/*
|
||||
** mov6:
|
||||
** vl4re8\.v\tv4,0\s*\((?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7])\)
|
||||
** vl4re8\.v\tv4,0\s*\([a-x0-9]+\)
|
||||
** ...
|
||||
** vmv4r\.v\tv8,v4
|
||||
** ...
|
||||
@ -111,7 +111,7 @@ void mov6 (int8_t *in, int8_t *out)
|
||||
|
||||
/*
|
||||
** mov7:
|
||||
** vl8re8\.v\tv8,0\s*\((?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7])\)
|
||||
** vl8re8\.v\tv8,0\s*\([a-x0-9]+\)
|
||||
** ...
|
||||
** vmv8r\.v\tv16,v8
|
||||
** ...
|
||||
@ -128,8 +128,8 @@ void mov7 (int8_t *in, int8_t *out)
|
||||
|
||||
/*
|
||||
** mov8:
|
||||
** vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e16,\s*mf4,\s*t[au],\s*m[au]
|
||||
** vle16\.v\tv1,0\s*\((?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7])\)
|
||||
** vsetvli\s+[a-x0-9]+,\s*zero,\s*e16,\s*mf4,\s*t[au],\s*m[au]
|
||||
** vle16\.v\tv1,0\s*\([a-x0-9]+\)
|
||||
** ...
|
||||
** vmv1r\.v\tv2,v1
|
||||
** ...
|
||||
@ -146,8 +146,8 @@ void mov8 (int16_t *in, int16_t *out)
|
||||
|
||||
/*
|
||||
** mov9:
|
||||
** vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e16,\s*mf2,\s*t[au],\s*m[au]
|
||||
** vle16\.v\tv1,0\s*\((?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7])\)
|
||||
** vsetvli\s+[a-x0-9]+,\s*zero,\s*e16,\s*mf2,\s*t[au],\s*m[au]
|
||||
** vle16\.v\tv1,0\s*\([a-x0-9]+\)
|
||||
** ...
|
||||
** vmv1r\.v\tv2,v1
|
||||
** ...
|
||||
@ -164,7 +164,7 @@ void mov9 (int16_t *in, int16_t *out)
|
||||
|
||||
/*
|
||||
** mov10:
|
||||
** vl1re16\.v\tv1,0\s*\((?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7])\)
|
||||
** vl1re16\.v\tv1,0\s*\([a-x0-9]+\)
|
||||
** ...
|
||||
** vmv1r\.v\tv2,v1
|
||||
** ...
|
||||
@ -181,7 +181,7 @@ void mov10 (int16_t *in, int16_t *out)
|
||||
|
||||
/*
|
||||
** mov11:
|
||||
** vl2re16\.v\tv2,0\s*\((?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7])\)
|
||||
** vl2re16\.v\tv2,0\s*\([a-x0-9]+\)
|
||||
** ...
|
||||
** vmv2r\.v\tv4,v2
|
||||
** ...
|
||||
@ -198,7 +198,7 @@ void mov11 (int16_t *in, int16_t *out)
|
||||
|
||||
/*
|
||||
** mov12:
|
||||
** vl4re16\.v\tv4,0\s*\((?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7])\)
|
||||
** vl4re16\.v\tv4,0\s*\([a-x0-9]+\)
|
||||
** ...
|
||||
** vmv4r\.v\tv8,v4
|
||||
** ...
|
||||
@ -215,7 +215,7 @@ void mov12 (int16_t *in, int16_t *out)
|
||||
|
||||
/*
|
||||
** mov13:
|
||||
** vl8re16\.v\tv8,0\s*\((?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7])\)
|
||||
** vl8re16\.v\tv8,0\s*\([a-x0-9]+\)
|
||||
** ...
|
||||
** vmv8r\.v\tv16,v8
|
||||
** ...
|
||||
@ -232,8 +232,8 @@ void mov13 (int32_t *in, int32_t *out)
|
||||
|
||||
/*
|
||||
** mov14:
|
||||
** vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e32,\s*mf2,\s*t[au],\s*m[au]
|
||||
** vle32\.v\tv1,0\s*\((?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7])\)
|
||||
** vsetvli\s+[a-x0-9]+,\s*zero,\s*e32,\s*mf2,\s*t[au],\s*m[au]
|
||||
** vle32\.v\tv1,0\s*\([a-x0-9]+\)
|
||||
** ...
|
||||
** vmv1r\.v\tv2,v1
|
||||
** ...
|
||||
@ -250,7 +250,7 @@ void mov14 (int32_t *in, int32_t *out)
|
||||
|
||||
/*
|
||||
** mov15:
|
||||
** vl1re32\.v\tv1,0\s*\((?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7])\)
|
||||
** vl1re32\.v\tv1,0\s*\([a-x0-9]+\)
|
||||
** ...
|
||||
** vmv1r\.v\tv2,v1
|
||||
** ...
|
||||
@ -267,7 +267,7 @@ void mov15 (int32_t *in, int32_t *out)
|
||||
|
||||
/*
|
||||
** mov16:
|
||||
** vl2re32\.v\tv2,0\s*\((?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7])\)
|
||||
** vl2re32\.v\tv2,0\s*\([a-x0-9]+\)
|
||||
** ...
|
||||
** vmv2r\.v\tv4,v2
|
||||
** ...
|
||||
@ -284,7 +284,7 @@ void mov16 (int32_t *in, int32_t *out)
|
||||
|
||||
/*
|
||||
** mov17:
|
||||
** vl4re32\.v\tv4,0\s*\((?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7])\)
|
||||
** vl4re32\.v\tv4,0\s*\([a-x0-9]+\)
|
||||
** ...
|
||||
** vmv4r\.v\tv8,v4
|
||||
** ...
|
||||
@ -301,7 +301,7 @@ void mov17 (int32_t *in, int32_t *out)
|
||||
|
||||
/*
|
||||
** mov18:
|
||||
** vl8re32\.v\tv8,0\s*\((?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7])\)
|
||||
** vl8re32\.v\tv8,0\s*\([a-x0-9]+\)
|
||||
** ...
|
||||
** vmv8r\.v\tv16,v8
|
||||
** ...
|
||||
@ -318,7 +318,7 @@ void mov18 (int32_t *in, int32_t *out)
|
||||
|
||||
/*
|
||||
** mov19:
|
||||
** vl1re64\.v\tv1,0\s*\((?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7])\)
|
||||
** vl1re64\.v\tv1,0\s*\([a-x0-9]+\)
|
||||
** ...
|
||||
** vmv1r\.v\tv2,v1
|
||||
** ...
|
||||
@ -335,7 +335,7 @@ void mov19 (int64_t *in, int64_t *out)
|
||||
|
||||
/*
|
||||
** mov20:
|
||||
** vl2re64\.v\tv2,0\s*\((?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7])\)
|
||||
** vl2re64\.v\tv2,0\s*\([a-x0-9]+\)
|
||||
** ...
|
||||
** vmv2r\.v\tv4,v2
|
||||
** ...
|
||||
@ -352,7 +352,7 @@ void mov20 (int64_t *in, int64_t *out)
|
||||
|
||||
/*
|
||||
** mov21:
|
||||
** vl4re64\.v\tv4,0\s*\((?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7])\)
|
||||
** vl4re64\.v\tv4,0\s*\([a-x0-9]+\)
|
||||
** ...
|
||||
** vmv4r\.v\tv8,v4
|
||||
** ...
|
||||
@ -369,7 +369,7 @@ void mov21 (int64_t *in, int64_t *out)
|
||||
|
||||
/*
|
||||
** mov22:
|
||||
** vl8re64\.v\tv8,0\s*\((?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7])\)
|
||||
** vl8re64\.v\tv8,0\s*\([a-x0-9]+\)
|
||||
** ...
|
||||
** vmv8r\.v\tv16,v8
|
||||
** ...
|
||||
|
||||
@ -6,8 +6,8 @@
|
||||
|
||||
/*
|
||||
** mov1:
|
||||
** vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e8,\s*mf8,\s*t[au],\s*m[au]
|
||||
** vle8\.v\tv1,0\s*\((?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7])\)
|
||||
** vsetvli\s+[a-x0-9]+,\s*zero,\s*e8,\s*mf8,\s*t[au],\s*m[au]
|
||||
** vle8\.v\tv1,0\s*\([a-x0-9]+\)
|
||||
** ...
|
||||
** vmv1r\.v\tv2,v1
|
||||
** ...
|
||||
@ -24,8 +24,8 @@ void mov1 (uint8_t *in, uint8_t *out)
|
||||
|
||||
/*
|
||||
** mov2:
|
||||
** vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e8,\s*mf4,\s*t[au],\s*m[au]
|
||||
** vle8\.v\tv1,0\s*\((?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7])\)
|
||||
** vsetvli\s+[a-x0-9]+,\s*zero,\s*e8,\s*mf4,\s*t[au],\s*m[au]
|
||||
** vle8\.v\tv1,0\s*\([a-x0-9]+\)
|
||||
** ...
|
||||
** vmv1r\.v\tv2,v1
|
||||
** ...
|
||||
@ -42,8 +42,8 @@ void mov2 (uint8_t *in, uint8_t *out)
|
||||
|
||||
/*
|
||||
** mov3:
|
||||
** vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e8,\s*mf2,\s*t[au],\s*m[au]
|
||||
** vle8\.v\tv1,0\s*\((?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7])\)
|
||||
** vsetvli\s+[a-x0-9]+,\s*zero,\s*e8,\s*mf2,\s*t[au],\s*m[au]
|
||||
** vle8\.v\tv1,0\s*\([a-x0-9]+\)
|
||||
** ...
|
||||
** vmv1r\.v\tv2,v1
|
||||
** ...
|
||||
@ -60,7 +60,7 @@ void mov3 (uint8_t *in, uint8_t *out)
|
||||
|
||||
/*
|
||||
** mov4:
|
||||
** vl1re8\.v\tv1,0\s*\((?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7])\)
|
||||
** vl1re8\.v\tv1,0\s*\([a-x0-9]+\)
|
||||
** ...
|
||||
** vmv1r\.v\tv2,v1
|
||||
** ...
|
||||
@ -77,7 +77,7 @@ void mov4 (uint8_t *in, uint8_t *out)
|
||||
|
||||
/*
|
||||
** mov5:
|
||||
** vl2re8\.v\tv2,0\s*\((?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7])\)
|
||||
** vl2re8\.v\tv2,0\s*\([a-x0-9]+\)
|
||||
** ...
|
||||
** vmv2r\.v\tv4,v2
|
||||
** ...
|
||||
@ -94,7 +94,7 @@ void mov5 (uint8_t *in, uint8_t *out)
|
||||
|
||||
/*
|
||||
** mov6:
|
||||
** vl4re8\.v\tv4,0\s*\((?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7])\)
|
||||
** vl4re8\.v\tv4,0\s*\([a-x0-9]+\)
|
||||
** ...
|
||||
** vmv4r\.v\tv8,v4
|
||||
** ...
|
||||
@ -111,7 +111,7 @@ void mov6 (uint8_t *in, uint8_t *out)
|
||||
|
||||
/*
|
||||
** mov7:
|
||||
** vl8re8\.v\tv8,0\s*\((?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7])\)
|
||||
** vl8re8\.v\tv8,0\s*\([a-x0-9]+\)
|
||||
** ...
|
||||
** vmv8r\.v\tv16,v8
|
||||
** ...
|
||||
@ -128,8 +128,8 @@ void mov7 (uint8_t *in, uint8_t *out)
|
||||
|
||||
/*
|
||||
** mov8:
|
||||
** vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e16,\s*mf4,\s*t[au],\s*m[au]
|
||||
** vle16\.v\tv1,0\s*\((?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7])\)
|
||||
** vsetvli\s+[a-x0-9]+,\s*zero,\s*e16,\s*mf4,\s*t[au],\s*m[au]
|
||||
** vle16\.v\tv1,0\s*\([a-x0-9]+\)
|
||||
** ...
|
||||
** vmv1r\.v\tv2,v1
|
||||
** ...
|
||||
@ -146,8 +146,8 @@ void mov8 (uint16_t *in, uint16_t *out)
|
||||
|
||||
/*
|
||||
** mov9:
|
||||
** vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e16,\s*mf2,\s*t[au],\s*m[au]
|
||||
** vle16\.v\tv1,0\s*\((?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7])\)
|
||||
** vsetvli\s+[a-x0-9]+,\s*zero,\s*e16,\s*mf2,\s*t[au],\s*m[au]
|
||||
** vle16\.v\tv1,0\s*\([a-x0-9]+\)
|
||||
** ...
|
||||
** vmv1r\.v\tv2,v1
|
||||
** ...
|
||||
@ -164,7 +164,7 @@ void mov9 (uint16_t *in, uint16_t *out)
|
||||
|
||||
/*
|
||||
** mov10:
|
||||
** vl1re16\.v\tv1,0\s*\((?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7])\)
|
||||
** vl1re16\.v\tv1,0\s*\([a-x0-9]+\)
|
||||
** ...
|
||||
** vmv1r\.v\tv2,v1
|
||||
** ...
|
||||
@ -181,7 +181,7 @@ void mov10 (uint16_t *in, uint16_t *out)
|
||||
|
||||
/*
|
||||
** mov11:
|
||||
** vl2re16\.v\tv2,0\s*\((?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7])\)
|
||||
** vl2re16\.v\tv2,0\s*\([a-x0-9]+\)
|
||||
** ...
|
||||
** vmv2r\.v\tv4,v2
|
||||
** ...
|
||||
@ -198,7 +198,7 @@ void mov11 (uint16_t *in, uint16_t *out)
|
||||
|
||||
/*
|
||||
** mov12:
|
||||
** vl4re16\.v\tv4,0\s*\((?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7])\)
|
||||
** vl4re16\.v\tv4,0\s*\([a-x0-9]+\)
|
||||
** ...
|
||||
** vmv4r\.v\tv8,v4
|
||||
** ...
|
||||
@ -215,7 +215,7 @@ void mov12 (uint16_t *in, uint16_t *out)
|
||||
|
||||
/*
|
||||
** mov13:
|
||||
** vl8re16\.v\tv8,0\s*\((?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7])\)
|
||||
** vl8re16\.v\tv8,0\s*\([a-x0-9]+\)
|
||||
** ...
|
||||
** vmv8r\.v\tv16,v8
|
||||
** ...
|
||||
@ -232,8 +232,8 @@ void mov13 (uint32_t *in, uint32_t *out)
|
||||
|
||||
/*
|
||||
** mov14:
|
||||
** vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e32,\s*mf2,\s*t[au],\s*m[au]
|
||||
** vle32\.v\tv1,0\s*\((?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7])\)
|
||||
** vsetvli\s+[a-x0-9]+,\s*zero,\s*e32,\s*mf2,\s*t[au],\s*m[au]
|
||||
** vle32\.v\tv1,0\s*\([a-x0-9]+\)
|
||||
** ...
|
||||
** vmv1r\.v\tv2,v1
|
||||
** ...
|
||||
@ -250,7 +250,7 @@ void mov14 (uint32_t *in, uint32_t *out)
|
||||
|
||||
/*
|
||||
** mov15:
|
||||
** vl1re32\.v\tv1,0\s*\((?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7])\)
|
||||
** vl1re32\.v\tv1,0\s*\([a-x0-9]+\)
|
||||
** ...
|
||||
** vmv1r\.v\tv2,v1
|
||||
** ...
|
||||
@ -267,7 +267,7 @@ void mov15 (uint32_t *in, uint32_t *out)
|
||||
|
||||
/*
|
||||
** mov16:
|
||||
** vl2re32\.v\tv2,0\s*\((?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7])\)
|
||||
** vl2re32\.v\tv2,0\s*\([a-x0-9]+\)
|
||||
** ...
|
||||
** vmv2r\.v\tv4,v2
|
||||
** ...
|
||||
@ -284,7 +284,7 @@ void mov16 (uint32_t *in, uint32_t *out)
|
||||
|
||||
/*
|
||||
** mov17:
|
||||
** vl4re32\.v\tv4,0\s*\((?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7])\)
|
||||
** vl4re32\.v\tv4,0\s*\([a-x0-9]+\)
|
||||
** ...
|
||||
** vmv4r\.v\tv8,v4
|
||||
** ...
|
||||
@ -301,7 +301,7 @@ void mov17 (uint32_t *in, uint32_t *out)
|
||||
|
||||
/*
|
||||
** mov18:
|
||||
** vl8re32\.v\tv8,0\s*\((?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7])\)
|
||||
** vl8re32\.v\tv8,0\s*\([a-x0-9]+\)
|
||||
** ...
|
||||
** vmv8r\.v\tv16,v8
|
||||
** ...
|
||||
@ -318,7 +318,7 @@ void mov18 (uint32_t *in, uint32_t *out)
|
||||
|
||||
/*
|
||||
** mov19:
|
||||
** vl1re64\.v\tv1,0\s*\((?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7])\)
|
||||
** vl1re64\.v\tv1,0\s*\([a-x0-9]+\)
|
||||
** ...
|
||||
** vmv1r\.v\tv2,v1
|
||||
** ...
|
||||
@ -335,7 +335,7 @@ void mov19 (uint64_t *in, uint64_t *out)
|
||||
|
||||
/*
|
||||
** mov20:
|
||||
** vl2re64\.v\tv2,0\s*\((?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7])\)
|
||||
** vl2re64\.v\tv2,0\s*\([a-x0-9]+\)
|
||||
** ...
|
||||
** vmv2r\.v\tv4,v2
|
||||
** ...
|
||||
@ -352,7 +352,7 @@ void mov20 (uint64_t *in, uint64_t *out)
|
||||
|
||||
/*
|
||||
** mov21:
|
||||
** vl4re64\.v\tv4,0\s*\((?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7])\)
|
||||
** vl4re64\.v\tv4,0\s*\([a-x0-9]+\)
|
||||
** ...
|
||||
** vmv4r\.v\tv8,v4
|
||||
** ...
|
||||
@ -369,7 +369,7 @@ void mov21 (uint64_t *in, uint64_t *out)
|
||||
|
||||
/*
|
||||
** mov22:
|
||||
** vl8re64\.v\tv8,0\s*\((?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7])\)
|
||||
** vl8re64\.v\tv8,0\s*\([a-x0-9]+\)
|
||||
** ...
|
||||
** vmv8r\.v\tv16,v8
|
||||
** ...
|
||||
|
||||
@ -6,8 +6,8 @@
|
||||
|
||||
/*
|
||||
** mov14:
|
||||
** vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e32,\s*mf2,\s*t[au],\s*m[au]
|
||||
** vle32\.v\tv1,0\s*\((?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7])\)
|
||||
** vsetvli\s+[a-x0-9]+,\s*zero,\s*e32,\s*mf2,\s*t[au],\s*m[au]
|
||||
** vle32\.v\tv1,0\s*\([a-x0-9]+\)
|
||||
** ...
|
||||
** vmv1r\.v\tv2,v1
|
||||
** ...
|
||||
@ -24,7 +24,7 @@ void mov14 (float *in, float *out)
|
||||
|
||||
/*
|
||||
** mov15:
|
||||
** vl1re32\.v\tv1,0\s*\((?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7])\)
|
||||
** vl1re32\.v\tv1,0\s*\([a-x0-9]+\)
|
||||
** ...
|
||||
** vmv1r\.v\tv2,v1
|
||||
** ...
|
||||
@ -41,7 +41,7 @@ void mov15 (float *in, float *out)
|
||||
|
||||
/*
|
||||
** mov16:
|
||||
** vl2re32\.v\tv2,0\s*\((?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7])\)
|
||||
** vl2re32\.v\tv2,0\s*\([a-x0-9]+\)
|
||||
** ...
|
||||
** vmv2r\.v\tv4,v2
|
||||
** ...
|
||||
@ -58,7 +58,7 @@ void mov16 (float *in, float *out)
|
||||
|
||||
/*
|
||||
** mov17:
|
||||
** vl4re32\.v\tv4,0\s*\((?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7])\)
|
||||
** vl4re32\.v\tv4,0\s*\([a-x0-9]+\)
|
||||
** ...
|
||||
** vmv4r\.v\tv8,v4
|
||||
** ...
|
||||
@ -75,7 +75,7 @@ void mov17 (float *in, float *out)
|
||||
|
||||
/*
|
||||
** mov18:
|
||||
** vl8re32\.v\tv8,0\s*\((?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7])\)
|
||||
** vl8re32\.v\tv8,0\s*\([a-x0-9]+\)
|
||||
** ...
|
||||
** vmv8r\.v\tv16,v8
|
||||
** ...
|
||||
@ -92,7 +92,7 @@ void mov18 (float *in, float *out)
|
||||
|
||||
/*
|
||||
** mov19:
|
||||
** vl1re64\.v\tv1,0\s*\((?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7])\)
|
||||
** vl1re64\.v\tv1,0\s*\([a-x0-9]+\)
|
||||
** ...
|
||||
** vmv1r\.v\tv2,v1
|
||||
** ...
|
||||
@ -109,7 +109,7 @@ void mov19 (uint64_t *in, uint64_t *out)
|
||||
|
||||
/*
|
||||
** mov20:
|
||||
** vl2re64\.v\tv2,0\s*\((?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7])\)
|
||||
** vl2re64\.v\tv2,0\s*\([a-x0-9]+\)
|
||||
** ...
|
||||
** vmv2r\.v\tv4,v2
|
||||
** ...
|
||||
@ -126,7 +126,7 @@ void mov20 (uint64_t *in, uint64_t *out)
|
||||
|
||||
/*
|
||||
** mov21:
|
||||
** vl4re64\.v\tv4,0\s*\((?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7])\)
|
||||
** vl4re64\.v\tv4,0\s*\([a-x0-9]+\)
|
||||
** ...
|
||||
** vmv4r\.v\tv8,v4
|
||||
** ...
|
||||
@ -143,7 +143,7 @@ void mov21 (uint64_t *in, uint64_t *out)
|
||||
|
||||
/*
|
||||
** mov22:
|
||||
** vl8re64\.v\tv8,0\s*\((?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7])\)
|
||||
** vl8re64\.v\tv8,0\s*\([a-x0-9]+\)
|
||||
** ...
|
||||
** vmv8r\.v\tv16,v8
|
||||
** ...
|
||||
|
||||
@ -6,9 +6,9 @@
|
||||
|
||||
/*
|
||||
** mov2:
|
||||
** vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e16,\s*mf4,\s*t[au],\s*m[au]
|
||||
** vle16\.v\s+(?:v[0-9]|v[1-2][0-9]|v3[0-1]),0\s*\((?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7])\)
|
||||
** vse16\.v\s+(?:v[0-9]|v[1-2][0-9]|v3[0-1]),0\s*\((?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7])\)
|
||||
** vsetvli\s+[a-x0-9]+,\s*zero,\s*e16,\s*mf4,\s*t[au],\s*m[au]
|
||||
** vle16\.v\s+(?:v[0-9]|v[1-2][0-9]|v3[0-1]),0\s*\([a-x0-9]+\)
|
||||
** vse16\.v\s+(?:v[0-9]|v[1-2][0-9]|v3[0-1]),0\s*\([a-x0-9]+\)
|
||||
** ret
|
||||
*/
|
||||
void mov2 (int16_t *in, int16_t *out)
|
||||
@ -19,9 +19,9 @@ void mov2 (int16_t *in, int16_t *out)
|
||||
|
||||
/*
|
||||
** mov3:
|
||||
** vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e16,\s*mf2,\s*t[au],\s*m[au]
|
||||
** vle16\.v\s+(?:v[0-9]|v[1-2][0-9]|v3[0-1]),0\s*\((?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7])\)
|
||||
** vse16\.v\s+(?:v[0-9]|v[1-2][0-9]|v3[0-1]),0\s*\((?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7])\)
|
||||
** vsetvli\s+[a-x0-9]+,\s*zero,\s*e16,\s*mf2,\s*t[au],\s*m[au]
|
||||
** vle16\.v\s+(?:v[0-9]|v[1-2][0-9]|v3[0-1]),0\s*\([a-x0-9]+\)
|
||||
** vse16\.v\s+(?:v[0-9]|v[1-2][0-9]|v3[0-1]),0\s*\([a-x0-9]+\)
|
||||
** ret
|
||||
*/
|
||||
void mov3 (int16_t *in, int16_t *out)
|
||||
@ -32,8 +32,8 @@ void mov3 (int16_t *in, int16_t *out)
|
||||
|
||||
/*
|
||||
** mov4:
|
||||
** vl1re16\.v\s+(?:v[0-9]|v[1-2][0-9]|v3[0-1]),0\s*\((?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7])\)
|
||||
** vs1r\.v\s+(?:v[0-9]|v[1-2][0-9]|v3[0-1]),0\s*\((?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7])\)
|
||||
** vl1re16\.v\s+(?:v[0-9]|v[1-2][0-9]|v3[0-1]),0\s*\([a-x0-9]+\)
|
||||
** vs1r\.v\s+(?:v[0-9]|v[1-2][0-9]|v3[0-1]),0\s*\([a-x0-9]+\)
|
||||
** ret
|
||||
*/
|
||||
void mov4 (int16_t *in, int16_t *out)
|
||||
@ -44,8 +44,8 @@ void mov4 (int16_t *in, int16_t *out)
|
||||
|
||||
/*
|
||||
** mov5:
|
||||
** vl2re16\.v\s+(?:v[0-9]|v[1-2][0-9]|v3[0-1]),0\s*\((?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7])\)
|
||||
** vs2r\.v\s+(?:v[0-9]|v[1-2][0-9]|v3[0-1]),0\s*\((?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7])\)
|
||||
** vl2re16\.v\s+(?:v[0-9]|v[1-2][0-9]|v3[0-1]),0\s*\([a-x0-9]+\)
|
||||
** vs2r\.v\s+(?:v[0-9]|v[1-2][0-9]|v3[0-1]),0\s*\([a-x0-9]+\)
|
||||
** ret
|
||||
*/
|
||||
void mov5 (int16_t *in, int16_t *out)
|
||||
@ -56,8 +56,8 @@ void mov5 (int16_t *in, int16_t *out)
|
||||
|
||||
/*
|
||||
** mov6:
|
||||
** vl4re16\.v\s+(?:v[0-9]|v[1-2][0-9]|v3[0-1]),0\s*\((?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7])\)
|
||||
** vs4r\.v\s+(?:v[0-9]|v[1-2][0-9]|v3[0-1]),0\s*\((?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7])\)
|
||||
** vl4re16\.v\s+(?:v[0-9]|v[1-2][0-9]|v3[0-1]),0\s*\([a-x0-9]+\)
|
||||
** vs4r\.v\s+(?:v[0-9]|v[1-2][0-9]|v3[0-1]),0\s*\([a-x0-9]+\)
|
||||
** ret
|
||||
*/
|
||||
void mov6 (int16_t *in, int16_t *out)
|
||||
@ -68,8 +68,8 @@ void mov6 (int16_t *in, int16_t *out)
|
||||
|
||||
/*
|
||||
** mov7:
|
||||
** vl8re16\.v\s+(?:v[0-9]|v[1-2][0-9]|v3[0-1]),0\s*\((?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7])\)
|
||||
** vs8r\.v\s+(?:v[0-9]|v[1-2][0-9]|v3[0-1]),0\s*\((?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7])\)
|
||||
** vl8re16\.v\s+(?:v[0-9]|v[1-2][0-9]|v3[0-1]),0\s*\([a-x0-9]+\)
|
||||
** vs8r\.v\s+(?:v[0-9]|v[1-2][0-9]|v3[0-1]),0\s*\([a-x0-9]+\)
|
||||
** ret
|
||||
*/
|
||||
void mov7 (int16_t *in, int16_t *out)
|
||||
@ -80,9 +80,9 @@ void mov7 (int16_t *in, int16_t *out)
|
||||
|
||||
/*
|
||||
** mov8:
|
||||
** vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e16,\s*mf4,\s*t[au],\s*m[au]
|
||||
** vle16\.v\s+(?:v[0-9]|v[1-2][0-9]|v3[0-1]),0\s*\((?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7])\)
|
||||
** vse16\.v\s+(?:v[0-9]|v[1-2][0-9]|v3[0-1]),0\s*\((?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7])\)
|
||||
** vsetvli\s+[a-x0-9]+,\s*zero,\s*e16,\s*mf4,\s*t[au],\s*m[au]
|
||||
** vle16\.v\s+(?:v[0-9]|v[1-2][0-9]|v3[0-1]),0\s*\([a-x0-9]+\)
|
||||
** vse16\.v\s+(?:v[0-9]|v[1-2][0-9]|v3[0-1]),0\s*\([a-x0-9]+\)
|
||||
** ret
|
||||
*/
|
||||
void mov8 (uint16_t *in, uint16_t *out)
|
||||
@ -93,9 +93,9 @@ void mov8 (uint16_t *in, uint16_t *out)
|
||||
|
||||
/*
|
||||
** mov9:
|
||||
** vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e16,\s*mf2,\s*t[au],\s*m[au]
|
||||
** vle16\.v\s+(?:v[0-9]|v[1-2][0-9]|v3[0-1]),0\s*\((?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7])\)
|
||||
** vse16\.v\s+(?:v[0-9]|v[1-2][0-9]|v3[0-1]),0\s*\((?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7])\)
|
||||
** vsetvli\s+[a-x0-9]+,\s*zero,\s*e16,\s*mf2,\s*t[au],\s*m[au]
|
||||
** vle16\.v\s+(?:v[0-9]|v[1-2][0-9]|v3[0-1]),0\s*\([a-x0-9]+\)
|
||||
** vse16\.v\s+(?:v[0-9]|v[1-2][0-9]|v3[0-1]),0\s*\([a-x0-9]+\)
|
||||
** ret
|
||||
*/
|
||||
void mov9 (uint16_t *in, uint16_t *out)
|
||||
@ -106,8 +106,8 @@ void mov9 (uint16_t *in, uint16_t *out)
|
||||
|
||||
/*
|
||||
** mov10:
|
||||
** vl1re16\.v\s+(?:v[0-9]|v[1-2][0-9]|v3[0-1]),0\s*\((?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7])\)
|
||||
** vs1r\.v\s+(?:v[0-9]|v[1-2][0-9]|v3[0-1]),0\s*\((?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7])\)
|
||||
** vl1re16\.v\s+(?:v[0-9]|v[1-2][0-9]|v3[0-1]),0\s*\([a-x0-9]+\)
|
||||
** vs1r\.v\s+(?:v[0-9]|v[1-2][0-9]|v3[0-1]),0\s*\([a-x0-9]+\)
|
||||
** ret
|
||||
*/
|
||||
void mov10 (uint16_t *in, uint16_t *out)
|
||||
@ -118,8 +118,8 @@ void mov10 (uint16_t *in, uint16_t *out)
|
||||
|
||||
/*
|
||||
** mov11:
|
||||
** vl2re16\.v\s+(?:v[0-9]|v[1-2][0-9]|v3[0-1]),0\s*\((?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7])\)
|
||||
** vs2r\.v\s+(?:v[0-9]|v[1-2][0-9]|v3[0-1]),0\s*\((?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7])\)
|
||||
** vl2re16\.v\s+(?:v[0-9]|v[1-2][0-9]|v3[0-1]),0\s*\([a-x0-9]+\)
|
||||
** vs2r\.v\s+(?:v[0-9]|v[1-2][0-9]|v3[0-1]),0\s*\([a-x0-9]+\)
|
||||
** ret
|
||||
*/
|
||||
void mov11 (uint16_t *in, uint16_t *out)
|
||||
@ -130,8 +130,8 @@ void mov11 (uint16_t *in, uint16_t *out)
|
||||
|
||||
/*
|
||||
** mov12:
|
||||
** vl4re16\.v\s+(?:v[0-9]|v[1-2][0-9]|v3[0-1]),0\s*\((?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7])\)
|
||||
** vs4r\.v\s+(?:v[0-9]|v[1-2][0-9]|v3[0-1]),0\s*\((?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7])\)
|
||||
** vl4re16\.v\s+(?:v[0-9]|v[1-2][0-9]|v3[0-1]),0\s*\([a-x0-9]+\)
|
||||
** vs4r\.v\s+(?:v[0-9]|v[1-2][0-9]|v3[0-1]),0\s*\([a-x0-9]+\)
|
||||
** ret
|
||||
*/
|
||||
void mov12 (uint16_t *in, uint16_t *out)
|
||||
@ -142,8 +142,8 @@ void mov12 (uint16_t *in, uint16_t *out)
|
||||
|
||||
/*
|
||||
** mov13:
|
||||
** vl8re16\.v\s+(?:v[0-9]|v[1-2][0-9]|v3[0-1]),0\s*\((?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7])\)
|
||||
** vs8r\.v\s+(?:v[0-9]|v[1-2][0-9]|v3[0-1]),0\s*\((?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7])\)
|
||||
** vl8re16\.v\s+(?:v[0-9]|v[1-2][0-9]|v3[0-1]),0\s*\([a-x0-9]+\)
|
||||
** vs8r\.v\s+(?:v[0-9]|v[1-2][0-9]|v3[0-1]),0\s*\([a-x0-9]+\)
|
||||
** ret
|
||||
*/
|
||||
void mov13 (uint16_t *in, uint16_t *out)
|
||||
|
||||
@ -6,9 +6,9 @@
|
||||
|
||||
/*
|
||||
** mov3:
|
||||
** vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e32,\s*mf2,\s*t[au],\s*m[au]
|
||||
** vle32\.v\s+(?:v[0-9]|v[1-2][0-9]|v3[0-1]),0\s*\((?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7])\)
|
||||
** vse32\.v\s+(?:v[0-9]|v[1-2][0-9]|v3[0-1]),0\s*\((?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7])\)
|
||||
** vsetvli\s+[a-x0-9]+,\s*zero,\s*e32,\s*mf2,\s*t[au],\s*m[au]
|
||||
** vle32\.v\s+(?:v[0-9]|v[1-2][0-9]|v3[0-1]),0\s*\([a-x0-9]+\)
|
||||
** vse32\.v\s+(?:v[0-9]|v[1-2][0-9]|v3[0-1]),0\s*\([a-x0-9]+\)
|
||||
** ret
|
||||
*/
|
||||
void mov3 (int32_t *in, int32_t *out)
|
||||
@ -19,8 +19,8 @@ void mov3 (int32_t *in, int32_t *out)
|
||||
|
||||
/*
|
||||
** mov4:
|
||||
** vl1re32\.v\s+(?:v[0-9]|v[1-2][0-9]|v3[0-1]),0\s*\((?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7])\)
|
||||
** vs1r\.v\s+(?:v[0-9]|v[1-2][0-9]|v3[0-1]),0\s*\((?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7])\)
|
||||
** vl1re32\.v\s+(?:v[0-9]|v[1-2][0-9]|v3[0-1]),0\s*\([a-x0-9]+\)
|
||||
** vs1r\.v\s+(?:v[0-9]|v[1-2][0-9]|v3[0-1]),0\s*\([a-x0-9]+\)
|
||||
** ret
|
||||
*/
|
||||
void mov4 (int32_t *in, int32_t *out)
|
||||
@ -31,8 +31,8 @@ void mov4 (int32_t *in, int32_t *out)
|
||||
|
||||
/*
|
||||
** mov5:
|
||||
** vl2re32\.v\s+(?:v[0-9]|v[1-2][0-9]|v3[0-1]),0\s*\((?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7])\)
|
||||
** vs2r\.v\s+(?:v[0-9]|v[1-2][0-9]|v3[0-1]),0\s*\((?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7])\)
|
||||
** vl2re32\.v\s+(?:v[0-9]|v[1-2][0-9]|v3[0-1]),0\s*\([a-x0-9]+\)
|
||||
** vs2r\.v\s+(?:v[0-9]|v[1-2][0-9]|v3[0-1]),0\s*\([a-x0-9]+\)
|
||||
** ret
|
||||
*/
|
||||
void mov5 (int32_t *in, int32_t *out)
|
||||
@ -43,8 +43,8 @@ void mov5 (int32_t *in, int32_t *out)
|
||||
|
||||
/*
|
||||
** mov6:
|
||||
** vl4re32\.v\s+(?:v[0-9]|v[1-2][0-9]|v3[0-1]),0\s*\((?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7])\)
|
||||
** vs4r\.v\s+(?:v[0-9]|v[1-2][0-9]|v3[0-1]),0\s*\((?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7])\)
|
||||
** vl4re32\.v\s+(?:v[0-9]|v[1-2][0-9]|v3[0-1]),0\s*\([a-x0-9]+\)
|
||||
** vs4r\.v\s+(?:v[0-9]|v[1-2][0-9]|v3[0-1]),0\s*\([a-x0-9]+\)
|
||||
** ret
|
||||
*/
|
||||
void mov6 (int32_t *in, int32_t *out)
|
||||
@ -55,8 +55,8 @@ void mov6 (int32_t *in, int32_t *out)
|
||||
|
||||
/*
|
||||
** mov7:
|
||||
** vl8re32\.v\s+(?:v[0-9]|v[1-2][0-9]|v3[0-1]),0\s*\((?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7])\)
|
||||
** vs8r\.v\s+(?:v[0-9]|v[1-2][0-9]|v3[0-1]),0\s*\((?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7])\)
|
||||
** vl8re32\.v\s+(?:v[0-9]|v[1-2][0-9]|v3[0-1]),0\s*\([a-x0-9]+\)
|
||||
** vs8r\.v\s+(?:v[0-9]|v[1-2][0-9]|v3[0-1]),0\s*\([a-x0-9]+\)
|
||||
** ret
|
||||
*/
|
||||
void mov7 (int32_t *in, int32_t *out)
|
||||
@ -67,9 +67,9 @@ void mov7 (int32_t *in, int32_t *out)
|
||||
|
||||
/*
|
||||
** mov8:
|
||||
** vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e32,\s*mf2,\s*t[au],\s*m[au]
|
||||
** vle32\.v\s+(?:v[0-9]|v[1-2][0-9]|v3[0-1]),0\s*\((?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7])\)
|
||||
** vse32\.v\s+(?:v[0-9]|v[1-2][0-9]|v3[0-1]),0\s*\((?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7])\)
|
||||
** vsetvli\s+[a-x0-9]+,\s*zero,\s*e32,\s*mf2,\s*t[au],\s*m[au]
|
||||
** vle32\.v\s+(?:v[0-9]|v[1-2][0-9]|v3[0-1]),0\s*\([a-x0-9]+\)
|
||||
** vse32\.v\s+(?:v[0-9]|v[1-2][0-9]|v3[0-1]),0\s*\([a-x0-9]+\)
|
||||
** ret
|
||||
*/
|
||||
void mov8 (uint32_t *in, uint32_t *out)
|
||||
@ -80,8 +80,8 @@ void mov8 (uint32_t *in, uint32_t *out)
|
||||
|
||||
/*
|
||||
** mov9:
|
||||
** vl1re32\.v\s+(?:v[0-9]|v[1-2][0-9]|v3[0-1]),0\s*\((?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7])\)
|
||||
** vs1r\.v\s+(?:v[0-9]|v[1-2][0-9]|v3[0-1]),0\s*\((?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7])\)
|
||||
** vl1re32\.v\s+(?:v[0-9]|v[1-2][0-9]|v3[0-1]),0\s*\([a-x0-9]+\)
|
||||
** vs1r\.v\s+(?:v[0-9]|v[1-2][0-9]|v3[0-1]),0\s*\([a-x0-9]+\)
|
||||
** ret
|
||||
*/
|
||||
void mov9 (uint32_t *in, uint32_t *out)
|
||||
@ -92,8 +92,8 @@ void mov9 (uint32_t *in, uint32_t *out)
|
||||
|
||||
/*
|
||||
** mov10:
|
||||
** vl2re32\.v\s+(?:v[0-9]|v[1-2][0-9]|v3[0-1]),0\s*\((?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7])\)
|
||||
** vs2r\.v\s+(?:v[0-9]|v[1-2][0-9]|v3[0-1]),0\s*\((?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7])\)
|
||||
** vl2re32\.v\s+(?:v[0-9]|v[1-2][0-9]|v3[0-1]),0\s*\([a-x0-9]+\)
|
||||
** vs2r\.v\s+(?:v[0-9]|v[1-2][0-9]|v3[0-1]),0\s*\([a-x0-9]+\)
|
||||
** ret
|
||||
*/
|
||||
void mov10 (uint32_t *in, uint32_t *out)
|
||||
@ -104,8 +104,8 @@ void mov10 (uint32_t *in, uint32_t *out)
|
||||
|
||||
/*
|
||||
** mov11:
|
||||
** vl4re32\.v\s+(?:v[0-9]|v[1-2][0-9]|v3[0-1]),0\s*\((?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7])\)
|
||||
** vs4r\.v\s+(?:v[0-9]|v[1-2][0-9]|v3[0-1]),0\s*\((?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7])\)
|
||||
** vl4re32\.v\s+(?:v[0-9]|v[1-2][0-9]|v3[0-1]),0\s*\([a-x0-9]+\)
|
||||
** vs4r\.v\s+(?:v[0-9]|v[1-2][0-9]|v3[0-1]),0\s*\([a-x0-9]+\)
|
||||
** ret
|
||||
*/
|
||||
void mov11 (uint32_t *in, uint32_t *out)
|
||||
@ -116,8 +116,8 @@ void mov11 (uint32_t *in, uint32_t *out)
|
||||
|
||||
/*
|
||||
** mov12:
|
||||
** vl8re32\.v\s+(?:v[0-9]|v[1-2][0-9]|v3[0-1]),0\s*\((?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7])\)
|
||||
** vs8r\.v\s+(?:v[0-9]|v[1-2][0-9]|v3[0-1]),0\s*\((?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7])\)
|
||||
** vl8re32\.v\s+(?:v[0-9]|v[1-2][0-9]|v3[0-1]),0\s*\([a-x0-9]+\)
|
||||
** vs8r\.v\s+(?:v[0-9]|v[1-2][0-9]|v3[0-1]),0\s*\([a-x0-9]+\)
|
||||
** ret
|
||||
*/
|
||||
void mov12 (uint32_t *in, uint32_t *out)
|
||||
|
||||
@ -6,8 +6,8 @@
|
||||
|
||||
/*
|
||||
** mov4:
|
||||
** vl1re64\.v\s+(?:v[0-9]|v[1-2][0-9]|v3[0-1]),0\s*\((?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7])\)
|
||||
** vs1r\.v\s+(?:v[0-9]|v[1-2][0-9]|v3[0-1]),0\s*\((?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7])\)
|
||||
** vl1re64\.v\s+(?:v[0-9]|v[1-2][0-9]|v3[0-1]),0\s*\([a-x0-9]+\)
|
||||
** vs1r\.v\s+(?:v[0-9]|v[1-2][0-9]|v3[0-1]),0\s*\([a-x0-9]+\)
|
||||
** ret
|
||||
*/
|
||||
void mov4 (int64_t *in, int64_t *out)
|
||||
@ -18,8 +18,8 @@ void mov4 (int64_t *in, int64_t *out)
|
||||
|
||||
/*
|
||||
** mov5:
|
||||
** vl2re64\.v\s+(?:v[0-9]|v[1-2][0-9]|v3[0-1]),0\s*\((?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7])\)
|
||||
** vs2r\.v\s+(?:v[0-9]|v[1-2][0-9]|v3[0-1]),0\s*\((?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7])\)
|
||||
** vl2re64\.v\s+(?:v[0-9]|v[1-2][0-9]|v3[0-1]),0\s*\([a-x0-9]+\)
|
||||
** vs2r\.v\s+(?:v[0-9]|v[1-2][0-9]|v3[0-1]),0\s*\([a-x0-9]+\)
|
||||
** ret
|
||||
*/
|
||||
void mov5 (int64_t *in, int64_t *out)
|
||||
@ -30,8 +30,8 @@ void mov5 (int64_t *in, int64_t *out)
|
||||
|
||||
/*
|
||||
** mov6:
|
||||
** vl4re64\.v\s+(?:v[0-9]|v[1-2][0-9]|v3[0-1]),0\s*\((?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7])\)
|
||||
** vs4r\.v\s+(?:v[0-9]|v[1-2][0-9]|v3[0-1]),0\s*\((?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7])\)
|
||||
** vl4re64\.v\s+(?:v[0-9]|v[1-2][0-9]|v3[0-1]),0\s*\([a-x0-9]+\)
|
||||
** vs4r\.v\s+(?:v[0-9]|v[1-2][0-9]|v3[0-1]),0\s*\([a-x0-9]+\)
|
||||
** ret
|
||||
*/
|
||||
void mov6 (int64_t *in, int64_t *out)
|
||||
@ -42,8 +42,8 @@ void mov6 (int64_t *in, int64_t *out)
|
||||
|
||||
/*
|
||||
** mov7:
|
||||
** vl8re64\.v\s+(?:v[0-9]|v[1-2][0-9]|v3[0-1]),0\s*\((?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7])\)
|
||||
** vs8r\.v\s+(?:v[0-9]|v[1-2][0-9]|v3[0-1]),0\s*\((?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7])\)
|
||||
** vl8re64\.v\s+(?:v[0-9]|v[1-2][0-9]|v3[0-1]),0\s*\([a-x0-9]+\)
|
||||
** vs8r\.v\s+(?:v[0-9]|v[1-2][0-9]|v3[0-1]),0\s*\([a-x0-9]+\)
|
||||
** ret
|
||||
*/
|
||||
void mov7 (int64_t *in, int64_t *out)
|
||||
@ -54,8 +54,8 @@ void mov7 (int64_t *in, int64_t *out)
|
||||
|
||||
/*
|
||||
** mov8:
|
||||
** vl1re64\.v\s+(?:v[0-9]|v[1-2][0-9]|v3[0-1]),0\s*\((?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7])\)
|
||||
** vs1r\.v\s+(?:v[0-9]|v[1-2][0-9]|v3[0-1]),0\s*\((?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7])\)
|
||||
** vl1re64\.v\s+(?:v[0-9]|v[1-2][0-9]|v3[0-1]),0\s*\([a-x0-9]+\)
|
||||
** vs1r\.v\s+(?:v[0-9]|v[1-2][0-9]|v3[0-1]),0\s*\([a-x0-9]+\)
|
||||
** ret
|
||||
*/
|
||||
void mov8 (uint64_t *in, uint64_t *out)
|
||||
@ -66,8 +66,8 @@ void mov8 (uint64_t *in, uint64_t *out)
|
||||
|
||||
/*
|
||||
** mov9:
|
||||
** vl2re64\.v\s+(?:v[0-9]|v[1-2][0-9]|v3[0-1]),0\s*\((?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7])\)
|
||||
** vs2r\.v\s+(?:v[0-9]|v[1-2][0-9]|v3[0-1]),0\s*\((?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7])\)
|
||||
** vl2re64\.v\s+(?:v[0-9]|v[1-2][0-9]|v3[0-1]),0\s*\([a-x0-9]+\)
|
||||
** vs2r\.v\s+(?:v[0-9]|v[1-2][0-9]|v3[0-1]),0\s*\([a-x0-9]+\)
|
||||
** ret
|
||||
*/
|
||||
void mov9 (uint64_t *in, uint64_t *out)
|
||||
@ -78,8 +78,8 @@ void mov9 (uint64_t *in, uint64_t *out)
|
||||
|
||||
/*
|
||||
** mov10:
|
||||
** vl4re64\.v\s+(?:v[0-9]|v[1-2][0-9]|v3[0-1]),0\s*\((?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7])\)
|
||||
** vs4r\.v\s+(?:v[0-9]|v[1-2][0-9]|v3[0-1]),0\s*\((?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7])\)
|
||||
** vl4re64\.v\s+(?:v[0-9]|v[1-2][0-9]|v3[0-1]),0\s*\([a-x0-9]+\)
|
||||
** vs4r\.v\s+(?:v[0-9]|v[1-2][0-9]|v3[0-1]),0\s*\([a-x0-9]+\)
|
||||
** ret
|
||||
*/
|
||||
void mov10 (uint64_t *in, uint64_t *out)
|
||||
@ -90,8 +90,8 @@ void mov10 (uint64_t *in, uint64_t *out)
|
||||
|
||||
/*
|
||||
** mov11:
|
||||
** vl8re64\.v\s+(?:v[0-9]|v[1-2][0-9]|v3[0-1]),0\s*\((?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7])\)
|
||||
** vs8r\.v\s+(?:v[0-9]|v[1-2][0-9]|v3[0-1]),0\s*\((?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7])\)
|
||||
** vl8re64\.v\s+(?:v[0-9]|v[1-2][0-9]|v3[0-1]),0\s*\([a-x0-9]+\)
|
||||
** vs8r\.v\s+(?:v[0-9]|v[1-2][0-9]|v3[0-1]),0\s*\([a-x0-9]+\)
|
||||
** ret
|
||||
*/
|
||||
void mov11 (uint64_t *in, uint64_t *out)
|
||||
|
||||
@ -6,9 +6,9 @@
|
||||
|
||||
/*
|
||||
** mov3:
|
||||
** vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e32,\s*mf2,\s*t[au],\s*m[au]
|
||||
** vle32\.v\s+(?:v[0-9]|v[1-2][0-9]|v3[0-1]),0\s*\((?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7])\)
|
||||
** vse32\.v\s+(?:v[0-9]|v[1-2][0-9]|v3[0-1]),0\s*\((?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7])\)
|
||||
** vsetvli\s+[a-x0-9]+,\s*zero,\s*e32,\s*mf2,\s*t[au],\s*m[au]
|
||||
** vle32\.v\s+(?:v[0-9]|v[1-2][0-9]|v3[0-1]),0\s*\([a-x0-9]+\)
|
||||
** vse32\.v\s+(?:v[0-9]|v[1-2][0-9]|v3[0-1]),0\s*\([a-x0-9]+\)
|
||||
** ret
|
||||
*/
|
||||
void mov3 (float *in, float *out)
|
||||
@ -19,8 +19,8 @@ void mov3 (float *in, float *out)
|
||||
|
||||
/*
|
||||
** mov4:
|
||||
** vl1re32\.v\s+(?:v[0-9]|v[1-2][0-9]|v3[0-1]),0\s*\((?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7])\)
|
||||
** vs1r\.v\s+(?:v[0-9]|v[1-2][0-9]|v3[0-1]),0\s*\((?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7])\)
|
||||
** vl1re32\.v\s+(?:v[0-9]|v[1-2][0-9]|v3[0-1]),0\s*\([a-x0-9]+\)
|
||||
** vs1r\.v\s+(?:v[0-9]|v[1-2][0-9]|v3[0-1]),0\s*\([a-x0-9]+\)
|
||||
** ret
|
||||
*/
|
||||
void mov4 (float *in, float *out)
|
||||
@ -31,8 +31,8 @@ void mov4 (float *in, float *out)
|
||||
|
||||
/*
|
||||
** mov5:
|
||||
** vl2re32\.v\s+(?:v[0-9]|v[1-2][0-9]|v3[0-1]),0\s*\((?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7])\)
|
||||
** vs2r\.v\s+(?:v[0-9]|v[1-2][0-9]|v3[0-1]),0\s*\((?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7])\)
|
||||
** vl2re32\.v\s+(?:v[0-9]|v[1-2][0-9]|v3[0-1]),0\s*\([a-x0-9]+\)
|
||||
** vs2r\.v\s+(?:v[0-9]|v[1-2][0-9]|v3[0-1]),0\s*\([a-x0-9]+\)
|
||||
** ret
|
||||
*/
|
||||
void mov5 (float *in, float *out)
|
||||
@ -43,8 +43,8 @@ void mov5 (float *in, float *out)
|
||||
|
||||
/*
|
||||
** mov6:
|
||||
** vl4re32\.v\s+(?:v[0-9]|v[1-2][0-9]|v3[0-1]),0\s*\((?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7])\)
|
||||
** vs4r\.v\s+(?:v[0-9]|v[1-2][0-9]|v3[0-1]),0\s*\((?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7])\)
|
||||
** vl4re32\.v\s+(?:v[0-9]|v[1-2][0-9]|v3[0-1]),0\s*\([a-x0-9]+\)
|
||||
** vs4r\.v\s+(?:v[0-9]|v[1-2][0-9]|v3[0-1]),0\s*\([a-x0-9]+\)
|
||||
** ret
|
||||
*/
|
||||
void mov6 (float *in, float *out)
|
||||
@ -55,8 +55,8 @@ void mov6 (float *in, float *out)
|
||||
|
||||
/*
|
||||
** mov7:
|
||||
** vl8re32\.v\s+(?:v[0-9]|v[1-2][0-9]|v3[0-1]),0\s*\((?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7])\)
|
||||
** vs8r\.v\s+(?:v[0-9]|v[1-2][0-9]|v3[0-1]),0\s*\((?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7])\)
|
||||
** vl8re32\.v\s+(?:v[0-9]|v[1-2][0-9]|v3[0-1]),0\s*\([a-x0-9]+\)
|
||||
** vs8r\.v\s+(?:v[0-9]|v[1-2][0-9]|v3[0-1]),0\s*\([a-x0-9]+\)
|
||||
** ret
|
||||
*/
|
||||
void mov7 (float *in, float *out)
|
||||
|
||||
@ -6,8 +6,8 @@
|
||||
|
||||
/*
|
||||
** mov4:
|
||||
** vl1re64\.v\s+(?:v[0-9]|v[1-2][0-9]|v3[0-1]),0\s*\((?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7])\)
|
||||
** vs1r\.v\s+(?:v[0-9]|v[1-2][0-9]|v3[0-1]),0\s*\((?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7])\)
|
||||
** vl1re64\.v\s+(?:v[0-9]|v[1-2][0-9]|v3[0-1]),0\s*\([a-x0-9]+\)
|
||||
** vs1r\.v\s+(?:v[0-9]|v[1-2][0-9]|v3[0-1]),0\s*\([a-x0-9]+\)
|
||||
** ret
|
||||
*/
|
||||
void mov4 (double *in, double *out)
|
||||
@ -18,8 +18,8 @@ void mov4 (double *in, double *out)
|
||||
|
||||
/*
|
||||
** mov5:
|
||||
** vl2re64\.v\s+(?:v[0-9]|v[1-2][0-9]|v3[0-1]),0\s*\((?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7])\)
|
||||
** vs2r\.v\s+(?:v[0-9]|v[1-2][0-9]|v3[0-1]),0\s*\((?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7])\)
|
||||
** vl2re64\.v\s+(?:v[0-9]|v[1-2][0-9]|v3[0-1]),0\s*\([a-x0-9]+\)
|
||||
** vs2r\.v\s+(?:v[0-9]|v[1-2][0-9]|v3[0-1]),0\s*\([a-x0-9]+\)
|
||||
** ret
|
||||
*/
|
||||
void mov5 (double *in, double *out)
|
||||
@ -30,8 +30,8 @@ void mov5 (double *in, double *out)
|
||||
|
||||
/*
|
||||
** mov6:
|
||||
** vl4re64\.v\s+(?:v[0-9]|v[1-2][0-9]|v3[0-1]),0\s*\((?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7])\)
|
||||
** vs4r\.v\s+(?:v[0-9]|v[1-2][0-9]|v3[0-1]),0\s*\((?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7])\)
|
||||
** vl4re64\.v\s+(?:v[0-9]|v[1-2][0-9]|v3[0-1]),0\s*\([a-x0-9]+\)
|
||||
** vs4r\.v\s+(?:v[0-9]|v[1-2][0-9]|v3[0-1]),0\s*\([a-x0-9]+\)
|
||||
** ret
|
||||
*/
|
||||
void mov6 (double *in, double *out)
|
||||
@ -42,8 +42,8 @@ void mov6 (double *in, double *out)
|
||||
|
||||
/*
|
||||
** mov7:
|
||||
** vl8re64\.v\s+(?:v[0-9]|v[1-2][0-9]|v3[0-1]),0\s*\((?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7])\)
|
||||
** vs8r\.v\s+(?:v[0-9]|v[1-2][0-9]|v3[0-1]),0\s*\((?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7])\)
|
||||
** vl8re64\.v\s+(?:v[0-9]|v[1-2][0-9]|v3[0-1]),0\s*\([a-x0-9]+\)
|
||||
** vs8r\.v\s+(?:v[0-9]|v[1-2][0-9]|v3[0-1]),0\s*\([a-x0-9]+\)
|
||||
** ret
|
||||
*/
|
||||
void mov7 (double *in, double *out)
|
||||
|
||||
@ -6,9 +6,9 @@
|
||||
|
||||
/*
|
||||
** mov1:
|
||||
** vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e8,\s*mf8,\s*t[au],\s*m[au]
|
||||
** vlm\.v\s+(?:v[0-9]|v[1-2][0-9]|v3[0-1]),0\s*\((?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7])\)
|
||||
** vsm\.v\s+(?:v[0-9]|v[1-2][0-9]|v3[0-1]),0\s*\((?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7])\)
|
||||
** vsetvli\s+[a-x0-9]+,\s*zero,\s*e8,\s*mf8,\s*t[au],\s*m[au]
|
||||
** vlm\.v\s+(?:v[0-9]|v[1-2][0-9]|v3[0-1]),0\s*\([a-x0-9]+\)
|
||||
** vsm\.v\s+(?:v[0-9]|v[1-2][0-9]|v3[0-1]),0\s*\([a-x0-9]+\)
|
||||
** ret
|
||||
*/
|
||||
void mov1 (int8_t *in, int8_t *out)
|
||||
@ -19,9 +19,9 @@ void mov1 (int8_t *in, int8_t *out)
|
||||
|
||||
/*
|
||||
** mov2:
|
||||
** vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e8,\s*mf4,\s*t[au],\s*m[au]
|
||||
** vlm\.v\s+(?:v[0-9]|v[1-2][0-9]|v3[0-1]),0\s*\((?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7])\)
|
||||
** vsm\.v\s+(?:v[0-9]|v[1-2][0-9]|v3[0-1]),0\s*\((?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7])\)
|
||||
** vsetvli\s+[a-x0-9]+,\s*zero,\s*e8,\s*mf4,\s*t[au],\s*m[au]
|
||||
** vlm\.v\s+(?:v[0-9]|v[1-2][0-9]|v3[0-1]),0\s*\([a-x0-9]+\)
|
||||
** vsm\.v\s+(?:v[0-9]|v[1-2][0-9]|v3[0-1]),0\s*\([a-x0-9]+\)
|
||||
** ret
|
||||
*/
|
||||
void mov2 (int8_t *in, int8_t *out)
|
||||
@ -32,9 +32,9 @@ void mov2 (int8_t *in, int8_t *out)
|
||||
|
||||
/*
|
||||
** mov3:
|
||||
** vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e8,\s*mf2,\s*t[au],\s*m[au]
|
||||
** vlm\.v\s+(?:v[0-9]|v[1-2][0-9]|v3[0-1]),0\s*\((?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7])\)
|
||||
** vsm\.v\s+(?:v[0-9]|v[1-2][0-9]|v3[0-1]),0\s*\((?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7])\)
|
||||
** vsetvli\s+[a-x0-9]+,\s*zero,\s*e8,\s*mf2,\s*t[au],\s*m[au]
|
||||
** vlm\.v\s+(?:v[0-9]|v[1-2][0-9]|v3[0-1]),0\s*\([a-x0-9]+\)
|
||||
** vsm\.v\s+(?:v[0-9]|v[1-2][0-9]|v3[0-1]),0\s*\([a-x0-9]+\)
|
||||
** ret
|
||||
*/
|
||||
void mov3 (int8_t *in, int8_t *out)
|
||||
@ -45,9 +45,9 @@ void mov3 (int8_t *in, int8_t *out)
|
||||
|
||||
/*
|
||||
** mov4:
|
||||
** vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e8,\s*m1,\s*t[au],\s*m[au]
|
||||
** vlm\.v\s+(?:v[0-9]|v[1-2][0-9]|v3[0-1]),0\s*\((?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7])\)
|
||||
** vsm\.v\s+(?:v[0-9]|v[1-2][0-9]|v3[0-1]),0\s*\((?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7])\)
|
||||
** vsetvli\s+[a-x0-9]+,\s*zero,\s*e8,\s*m1,\s*t[au],\s*m[au]
|
||||
** vlm\.v\s+(?:v[0-9]|v[1-2][0-9]|v3[0-1]),0\s*\([a-x0-9]+\)
|
||||
** vsm\.v\s+(?:v[0-9]|v[1-2][0-9]|v3[0-1]),0\s*\([a-x0-9]+\)
|
||||
** ret
|
||||
*/
|
||||
void mov4 (int8_t *in, int8_t *out)
|
||||
@ -58,9 +58,9 @@ void mov4 (int8_t *in, int8_t *out)
|
||||
|
||||
/*
|
||||
** mov5:
|
||||
** vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e8,\s*m2,\s*t[au],\s*m[au]
|
||||
** vlm\.v\s+(?:v[0-9]|v[1-2][0-9]|v3[0-1]),0\s*\((?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7])\)
|
||||
** vsm\.v\s+(?:v[0-9]|v[1-2][0-9]|v3[0-1]),0\s*\((?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7])\)
|
||||
** vsetvli\s+[a-x0-9]+,\s*zero,\s*e8,\s*m2,\s*t[au],\s*m[au]
|
||||
** vlm\.v\s+(?:v[0-9]|v[1-2][0-9]|v3[0-1]),0\s*\([a-x0-9]+\)
|
||||
** vsm\.v\s+(?:v[0-9]|v[1-2][0-9]|v3[0-1]),0\s*\([a-x0-9]+\)
|
||||
** ret
|
||||
*/
|
||||
void mov5 (int8_t *in, int8_t *out)
|
||||
@ -71,9 +71,9 @@ void mov5 (int8_t *in, int8_t *out)
|
||||
|
||||
/*
|
||||
** mov6:
|
||||
** vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e8,\s*m4,\s*t[au],\s*m[au]
|
||||
** vlm\.v\s+(?:v[0-9]|v[1-2][0-9]|v3[0-1]),0\s*\((?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7])\)
|
||||
** vsm\.v\s+(?:v[0-9]|v[1-2][0-9]|v3[0-1]),0\s*\((?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7])\)
|
||||
** vsetvli\s+[a-x0-9]+,\s*zero,\s*e8,\s*m4,\s*t[au],\s*m[au]
|
||||
** vlm\.v\s+(?:v[0-9]|v[1-2][0-9]|v3[0-1]),0\s*\([a-x0-9]+\)
|
||||
** vsm\.v\s+(?:v[0-9]|v[1-2][0-9]|v3[0-1]),0\s*\([a-x0-9]+\)
|
||||
** ret
|
||||
*/
|
||||
void mov6 (int8_t *in, int8_t *out)
|
||||
@ -84,9 +84,9 @@ void mov6 (int8_t *in, int8_t *out)
|
||||
|
||||
/*
|
||||
** mov7:
|
||||
** vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e8,\s*m8,\s*t[au],\s*m[au]
|
||||
** vlm\.v\s+(?:v[0-9]|v[1-2][0-9]|v3[0-1]),0\s*\((?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7])\)
|
||||
** vsm\.v\s+(?:v[0-9]|v[1-2][0-9]|v3[0-1]),0\s*\((?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7])\)
|
||||
** vsetvli\s+[a-x0-9]+,\s*zero,\s*e8,\s*m8,\s*t[au],\s*m[au]
|
||||
** vlm\.v\s+(?:v[0-9]|v[1-2][0-9]|v3[0-1]),0\s*\([a-x0-9]+\)
|
||||
** vsm\.v\s+(?:v[0-9]|v[1-2][0-9]|v3[0-1]),0\s*\([a-x0-9]+\)
|
||||
** ret
|
||||
*/
|
||||
void mov7 (int8_t *in, int8_t *out)
|
||||
|
||||
@ -7,13 +7,13 @@
|
||||
/* Test tieable of RVV types with same LMUL. */
|
||||
/*
|
||||
** mov1:
|
||||
** vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e8,\s*mf2,\s*t[au],\s*m[au]
|
||||
** vle8\.v\s+(?:v[0-9]|v[1-2][0-9]|v3[0-1]),0\s*\((?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7])\)
|
||||
** vse8\.v\s+(?:v[0-9]|v[1-2][0-9]|v3[0-1]),0\s*\((?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7])\)
|
||||
** addi\t(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),1
|
||||
** vse8\.v\s+(?:v[0-9]|v[1-2][0-9]|v3[0-1]),0\s*\((?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7])\)
|
||||
** addi\t(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),2
|
||||
** vse8\.v\s+(?:v[0-9]|v[1-2][0-9]|v3[0-1]),0\s*\((?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7])\)
|
||||
** vsetvli\s+[a-x0-9]+,\s*zero,\s*e8,\s*mf2,\s*t[au],\s*m[au]
|
||||
** vle8\.v\s+(?:v[0-9]|v[1-2][0-9]|v3[0-1]),0\s*\([a-x0-9]+\)
|
||||
** vse8\.v\s+(?:v[0-9]|v[1-2][0-9]|v3[0-1]),0\s*\([a-x0-9]+\)
|
||||
** addi\t[a-x0-9]+,[a-x0-9]+,1
|
||||
** vse8\.v\s+(?:v[0-9]|v[1-2][0-9]|v3[0-1]),0\s*\([a-x0-9]+\)
|
||||
** addi\t[a-x0-9]+,[a-x0-9]+,2
|
||||
** vse8\.v\s+(?:v[0-9]|v[1-2][0-9]|v3[0-1]),0\s*\([a-x0-9]+\)
|
||||
** ret
|
||||
*/
|
||||
void mov1 (int8_t *in, int8_t *out, int M)
|
||||
@ -28,11 +28,11 @@ void mov1 (int8_t *in, int8_t *out, int M)
|
||||
|
||||
/*
|
||||
** mov2:
|
||||
** vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e8,\s*mf4,\s*t[au],\s*m[au]
|
||||
** vle8\.v\s+(?:v[0-9]|v[1-2][0-9]|v3[0-1]),0\s*\((?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7])\)
|
||||
** vse8\.v\s+(?:v[0-9]|v[1-2][0-9]|v3[0-1]),0\s*\((?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7])\)
|
||||
** addi\t(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),1
|
||||
** vse8\.v\s+(?:v[0-9]|v[1-2][0-9]|v3[0-1]),0\s*\((?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7])\)
|
||||
** vsetvli\s+[a-x0-9]+,\s*zero,\s*e8,\s*mf4,\s*t[au],\s*m[au]
|
||||
** vle8\.v\s+(?:v[0-9]|v[1-2][0-9]|v3[0-1]),0\s*\([a-x0-9]+\)
|
||||
** vse8\.v\s+(?:v[0-9]|v[1-2][0-9]|v3[0-1]),0\s*\([a-x0-9]+\)
|
||||
** addi\t[a-x0-9]+,[a-x0-9]+,1
|
||||
** vse8\.v\s+(?:v[0-9]|v[1-2][0-9]|v3[0-1]),0\s*\([a-x0-9]+\)
|
||||
** ret
|
||||
*/
|
||||
void mov2 (int8_t *in, int8_t *out, int M)
|
||||
|
||||
@ -19,7 +19,7 @@ unsigned long vread_csr_vcsr(void) {
|
||||
return vread_csr(RVV_VCSR);
|
||||
}
|
||||
|
||||
/* { dg-final { scan-assembler-times {csrr\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*vstart} 1 } } */
|
||||
/* { dg-final { scan-assembler-times {csrr\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*vxsat} 1 } } */
|
||||
/* { dg-final { scan-assembler-times {csrr\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*vxrm} 1 } } */
|
||||
/* { dg-final { scan-assembler-times {csrr\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*vcsr} 1 } } */
|
||||
/* { dg-final { scan-assembler-times {csrr\s+[a-x0-9]+,\s*vstart} 1 } } */
|
||||
/* { dg-final { scan-assembler-times {csrr\s+[a-x0-9]+,\s*vxsat} 1 } } */
|
||||
/* { dg-final { scan-assembler-times {csrr\s+[a-x0-9]+,\s*vxrm} 1 } } */
|
||||
/* { dg-final { scan-assembler-times {csrr\s+[a-x0-9]+,\s*vcsr} 1 } } */
|
||||
|
||||
@ -660,91 +660,91 @@ size_t test_vsetvlmax_e64m8()
|
||||
return vl;
|
||||
}
|
||||
|
||||
/* { dg-final { scan-assembler-times {vsetivli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*0,\s*e8,\s*mf8,\s*ta,\s*mu} 1 } } */
|
||||
/* { dg-final { scan-assembler-times {vsetivli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*31,\s*e8,\s*mf8,\s*ta,\s*mu} 1 } } */
|
||||
/* { dg-final { scan-assembler-times {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*e8,\s*mf8,\s*ta,\s*mu} 2 } } */
|
||||
/* { dg-final { scan-assembler-times {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e8,\s*mf8,\s*ta,\s*mu} 1 } } */
|
||||
/* { dg-final { scan-assembler-times {vsetivli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*0,\s*e8,\s*mf4,\s*ta,\s*mu} 1 } } */
|
||||
/* { dg-final { scan-assembler-times {vsetivli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*31,\s*e8,\s*mf4,\s*ta,\s*mu} 1 } } */
|
||||
/* { dg-final { scan-assembler-times {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*e8,\s*mf4,\s*ta,\s*mu} 2 } } */
|
||||
/* { dg-final { scan-assembler-times {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e8,\s*mf4,\s*ta,\s*mu} 1 } } */
|
||||
/* { dg-final { scan-assembler-times {vsetivli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*0,\s*e8,\s*mf2,\s*ta,\s*mu} 1 } } */
|
||||
/* { dg-final { scan-assembler-times {vsetivli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*31,\s*e8,\s*mf2,\s*ta,\s*mu} 1 } } */
|
||||
/* { dg-final { scan-assembler-times {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*e8,\s*mf2,\s*ta,\s*mu} 2 } } */
|
||||
/* { dg-final { scan-assembler-times {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e8,\s*mf2,\s*ta,\s*mu} 1 } } */
|
||||
/* { dg-final { scan-assembler-times {vsetivli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*0,\s*e8,\s*m1,\s*ta,\s*mu} 1 } } */
|
||||
/* { dg-final { scan-assembler-times {vsetivli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*31,\s*e8,\s*m1,\s*ta,\s*mu} 1 } } */
|
||||
/* { dg-final { scan-assembler-times {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*e8,\s*m1,\s*ta,\s*mu} 2 } } */
|
||||
/* { dg-final { scan-assembler-times {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e8,\s*m1,\s*ta,\s*mu} 1 } } */
|
||||
/* { dg-final { scan-assembler-times {vsetivli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*0,\s*e8,\s*m2,\s*ta,\s*mu} 1 } } */
|
||||
/* { dg-final { scan-assembler-times {vsetivli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*31,\s*e8,\s*m2,\s*ta,\s*mu} 1 } } */
|
||||
/* { dg-final { scan-assembler-times {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*e8,\s*m2,\s*ta,\s*mu} 2 } } */
|
||||
/* { dg-final { scan-assembler-times {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e8,\s*m2,\s*ta,\s*mu} 1 } } */
|
||||
/* { dg-final { scan-assembler-times {vsetivli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*0,\s*e8,\s*m4,\s*ta,\s*mu} 1 } } */
|
||||
/* { dg-final { scan-assembler-times {vsetivli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*31,\s*e8,\s*m4,\s*ta,\s*mu} 1 } } */
|
||||
/* { dg-final { scan-assembler-times {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*e8,\s*m4,\s*ta,\s*mu} 2 } } */
|
||||
/* { dg-final { scan-assembler-times {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e8,\s*m4,\s*ta,\s*mu} 1 } } */
|
||||
/* { dg-final { scan-assembler-times {vsetivli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*0,\s*e8,\s*m8,\s*ta,\s*mu} 1 } } */
|
||||
/* { dg-final { scan-assembler-times {vsetivli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*31,\s*e8,\s*m8,\s*ta,\s*mu} 1 } } */
|
||||
/* { dg-final { scan-assembler-times {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*e8,\s*m8,\s*ta,\s*mu} 2 } } */
|
||||
/* { dg-final { scan-assembler-times {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e8,\s*m8,\s*ta,\s*mu} 1 } } */
|
||||
/* { dg-final { scan-assembler-times {vsetivli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*0,\s*e16,\s*mf4,\s*ta,\s*mu} 1 } } */
|
||||
/* { dg-final { scan-assembler-times {vsetivli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*31,\s*e16,\s*mf4,\s*ta,\s*mu} 1 } } */
|
||||
/* { dg-final { scan-assembler-times {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*e16,\s*mf4,\s*ta,\s*mu} 2 } } */
|
||||
/* { dg-final { scan-assembler-times {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e16,\s*mf4,\s*ta,\s*mu} 1 } } */
|
||||
/* { dg-final { scan-assembler-times {vsetivli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*0,\s*e16,\s*mf2,\s*ta,\s*mu} 1 } } */
|
||||
/* { dg-final { scan-assembler-times {vsetivli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*31,\s*e16,\s*mf2,\s*ta,\s*mu} 1 } } */
|
||||
/* { dg-final { scan-assembler-times {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*e16,\s*mf2,\s*ta,\s*mu} 2 } } */
|
||||
/* { dg-final { scan-assembler-times {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e16,\s*mf2,\s*ta,\s*mu} 1 } } */
|
||||
/* { dg-final { scan-assembler-times {vsetivli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*0,\s*e16,\s*m1,\s*ta,\s*mu} 1 } } */
|
||||
/* { dg-final { scan-assembler-times {vsetivli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*31,\s*e16,\s*m1,\s*ta,\s*mu} 1 } } */
|
||||
/* { dg-final { scan-assembler-times {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*e16,\s*m1,\s*ta,\s*mu} 2 } } */
|
||||
/* { dg-final { scan-assembler-times {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e16,\s*m1,\s*ta,\s*mu} 1 } } */
|
||||
/* { dg-final { scan-assembler-times {vsetivli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*0,\s*e16,\s*m2,\s*ta,\s*mu} 1 } } */
|
||||
/* { dg-final { scan-assembler-times {vsetivli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*31,\s*e16,\s*m2,\s*ta,\s*mu} 1 } } */
|
||||
/* { dg-final { scan-assembler-times {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*e16,\s*m2,\s*ta,\s*mu} 2 } } */
|
||||
/* { dg-final { scan-assembler-times {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e16,\s*m2,\s*ta,\s*mu} 1 } } */
|
||||
/* { dg-final { scan-assembler-times {vsetivli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*0,\s*e16,\s*m4,\s*ta,\s*mu} 1 } } */
|
||||
/* { dg-final { scan-assembler-times {vsetivli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*31,\s*e16,\s*m4,\s*ta,\s*mu} 1 } } */
|
||||
/* { dg-final { scan-assembler-times {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*e16,\s*m4,\s*ta,\s*mu} 2 } } */
|
||||
/* { dg-final { scan-assembler-times {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e16,\s*m4,\s*ta,\s*mu} 1 } } */
|
||||
/* { dg-final { scan-assembler-times {vsetivli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*0,\s*e16,\s*m8,\s*ta,\s*mu} 1 } } */
|
||||
/* { dg-final { scan-assembler-times {vsetivli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*31,\s*e16,\s*m8,\s*ta,\s*mu} 1 } } */
|
||||
/* { dg-final { scan-assembler-times {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*e16,\s*m8,\s*ta,\s*mu} 2 } } */
|
||||
/* { dg-final { scan-assembler-times {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e16,\s*m8,\s*ta,\s*mu} 1 } } */
|
||||
/* { dg-final { scan-assembler-times {vsetivli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*0,\s*e32,\s*mf2,\s*ta,\s*mu} 1 } } */
|
||||
/* { dg-final { scan-assembler-times {vsetivli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*31,\s*e32,\s*mf2,\s*ta,\s*mu} 1 } } */
|
||||
/* { dg-final { scan-assembler-times {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*e32,\s*mf2,\s*ta,\s*mu} 2 } } */
|
||||
/* { dg-final { scan-assembler-times {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e32,\s*mf2,\s*ta,\s*mu} 1 } } */
|
||||
/* { dg-final { scan-assembler-times {vsetivli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*0,\s*e32,\s*m1,\s*ta,\s*mu} 1 } } */
|
||||
/* { dg-final { scan-assembler-times {vsetivli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*31,\s*e32,\s*m1,\s*ta,\s*mu} 1 } } */
|
||||
/* { dg-final { scan-assembler-times {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*e32,\s*m1,\s*ta,\s*mu} 2 } } */
|
||||
/* { dg-final { scan-assembler-times {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e32,\s*m1,\s*ta,\s*mu} 1 } } */
|
||||
/* { dg-final { scan-assembler-times {vsetivli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*0,\s*e32,\s*m2,\s*ta,\s*mu} 1 } } */
|
||||
/* { dg-final { scan-assembler-times {vsetivli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*31,\s*e32,\s*m2,\s*ta,\s*mu} 1 } } */
|
||||
/* { dg-final { scan-assembler-times {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*e32,\s*m2,\s*ta,\s*mu} 2 } } */
|
||||
/* { dg-final { scan-assembler-times {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e32,\s*m2,\s*ta,\s*mu} 1 } } */
|
||||
/* { dg-final { scan-assembler-times {vsetivli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*0,\s*e32,\s*m4,\s*ta,\s*mu} 1 } } */
|
||||
/* { dg-final { scan-assembler-times {vsetivli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*31,\s*e32,\s*m4,\s*ta,\s*mu} 1 } } */
|
||||
/* { dg-final { scan-assembler-times {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*e32,\s*m4,\s*ta,\s*mu} 2 } } */
|
||||
/* { dg-final { scan-assembler-times {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e32,\s*m4,\s*ta,\s*mu} 1 } } */
|
||||
/* { dg-final { scan-assembler-times {vsetivli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*0,\s*e32,\s*m8,\s*ta,\s*mu} 1 } } */
|
||||
/* { dg-final { scan-assembler-times {vsetivli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*31,\s*e32,\s*m8,\s*ta,\s*mu} 1 } } */
|
||||
/* { dg-final { scan-assembler-times {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*e32,\s*m8,\s*ta,\s*mu} 2 } } */
|
||||
/* { dg-final { scan-assembler-times {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e32,\s*m8,\s*ta,\s*mu} 1 } } */
|
||||
/* { dg-final { scan-assembler-times {vsetivli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*0,\s*e64,\s*m1,\s*ta,\s*mu} 1 } } */
|
||||
/* { dg-final { scan-assembler-times {vsetivli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*31,\s*e64,\s*m1,\s*ta,\s*mu} 1 } } */
|
||||
/* { dg-final { scan-assembler-times {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*e64,\s*m1,\s*ta,\s*mu} 2 } } */
|
||||
/* { dg-final { scan-assembler-times {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e64,\s*m1,\s*ta,\s*mu} 1 } } */
|
||||
/* { dg-final { scan-assembler-times {vsetivli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*0,\s*e64,\s*m2,\s*ta,\s*mu} 1 } } */
|
||||
/* { dg-final { scan-assembler-times {vsetivli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*31,\s*e64,\s*m2,\s*ta,\s*mu} 1 } } */
|
||||
/* { dg-final { scan-assembler-times {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*e64,\s*m2,\s*ta,\s*mu} 2 } } */
|
||||
/* { dg-final { scan-assembler-times {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e64,\s*m2,\s*ta,\s*mu} 1 } } */
|
||||
/* { dg-final { scan-assembler-times {vsetivli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*0,\s*e64,\s*m4,\s*ta,\s*mu} 1 } } */
|
||||
/* { dg-final { scan-assembler-times {vsetivli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*31,\s*e64,\s*m4,\s*ta,\s*mu} 1 } } */
|
||||
/* { dg-final { scan-assembler-times {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*e64,\s*m4,\s*ta,\s*mu} 2 } } */
|
||||
/* { dg-final { scan-assembler-times {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e64,\s*m4,\s*ta,\s*mu} 1 } } */
|
||||
/* { dg-final { scan-assembler-times {vsetivli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*0,\s*e64,\s*m8,\s*ta,\s*mu} 1 } } */
|
||||
/* { dg-final { scan-assembler-times {vsetivli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*31,\s*e64,\s*m8,\s*ta,\s*mu} 1 } } */
|
||||
/* { dg-final { scan-assembler-times {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*e64,\s*m8,\s*ta,\s*mu} 2 } } */
|
||||
/* { dg-final { scan-assembler-times {vsetvli\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*zero,\s*e64,\s*m8,\s*ta,\s*mu} 1 } } */
|
||||
/* { dg-final { scan-assembler-times {vsetivli\s+[a-x0-9]+,\s*0,\s*e8,\s*mf8,\s*ta,\s*mu} 1 } } */
|
||||
/* { dg-final { scan-assembler-times {vsetivli\s+[a-x0-9]+,\s*31,\s*e8,\s*mf8,\s*ta,\s*mu} 1 } } */
|
||||
/* { dg-final { scan-assembler-times {vsetvli\s+[a-x0-9]+,\s*[a-x0-9]+,\s*e8,\s*mf8,\s*ta,\s*mu} 2 } } */
|
||||
/* { dg-final { scan-assembler-times {vsetvli\s+[a-x0-9]+,\s*zero,\s*e8,\s*mf8,\s*ta,\s*mu} 1 } } */
|
||||
/* { dg-final { scan-assembler-times {vsetivli\s+[a-x0-9]+,\s*0,\s*e8,\s*mf4,\s*ta,\s*mu} 1 } } */
|
||||
/* { dg-final { scan-assembler-times {vsetivli\s+[a-x0-9]+,\s*31,\s*e8,\s*mf4,\s*ta,\s*mu} 1 } } */
|
||||
/* { dg-final { scan-assembler-times {vsetvli\s+[a-x0-9]+,\s*[a-x0-9]+,\s*e8,\s*mf4,\s*ta,\s*mu} 2 } } */
|
||||
/* { dg-final { scan-assembler-times {vsetvli\s+[a-x0-9]+,\s*zero,\s*e8,\s*mf4,\s*ta,\s*mu} 1 } } */
|
||||
/* { dg-final { scan-assembler-times {vsetivli\s+[a-x0-9]+,\s*0,\s*e8,\s*mf2,\s*ta,\s*mu} 1 } } */
|
||||
/* { dg-final { scan-assembler-times {vsetivli\s+[a-x0-9]+,\s*31,\s*e8,\s*mf2,\s*ta,\s*mu} 1 } } */
|
||||
/* { dg-final { scan-assembler-times {vsetvli\s+[a-x0-9]+,\s*[a-x0-9]+,\s*e8,\s*mf2,\s*ta,\s*mu} 2 } } */
|
||||
/* { dg-final { scan-assembler-times {vsetvli\s+[a-x0-9]+,\s*zero,\s*e8,\s*mf2,\s*ta,\s*mu} 1 } } */
|
||||
/* { dg-final { scan-assembler-times {vsetivli\s+[a-x0-9]+,\s*0,\s*e8,\s*m1,\s*ta,\s*mu} 1 } } */
|
||||
/* { dg-final { scan-assembler-times {vsetivli\s+[a-x0-9]+,\s*31,\s*e8,\s*m1,\s*ta,\s*mu} 1 } } */
|
||||
/* { dg-final { scan-assembler-times {vsetvli\s+[a-x0-9]+,\s*[a-x0-9]+,\s*e8,\s*m1,\s*ta,\s*mu} 2 } } */
|
||||
/* { dg-final { scan-assembler-times {vsetvli\s+[a-x0-9]+,\s*zero,\s*e8,\s*m1,\s*ta,\s*mu} 1 } } */
|
||||
/* { dg-final { scan-assembler-times {vsetivli\s+[a-x0-9]+,\s*0,\s*e8,\s*m2,\s*ta,\s*mu} 1 } } */
|
||||
/* { dg-final { scan-assembler-times {vsetivli\s+[a-x0-9]+,\s*31,\s*e8,\s*m2,\s*ta,\s*mu} 1 } } */
|
||||
/* { dg-final { scan-assembler-times {vsetvli\s+[a-x0-9]+,\s*[a-x0-9]+,\s*e8,\s*m2,\s*ta,\s*mu} 2 } } */
|
||||
/* { dg-final { scan-assembler-times {vsetvli\s+[a-x0-9]+,\s*zero,\s*e8,\s*m2,\s*ta,\s*mu} 1 } } */
|
||||
/* { dg-final { scan-assembler-times {vsetivli\s+[a-x0-9]+,\s*0,\s*e8,\s*m4,\s*ta,\s*mu} 1 } } */
|
||||
/* { dg-final { scan-assembler-times {vsetivli\s+[a-x0-9]+,\s*31,\s*e8,\s*m4,\s*ta,\s*mu} 1 } } */
|
||||
/* { dg-final { scan-assembler-times {vsetvli\s+[a-x0-9]+,\s*[a-x0-9]+,\s*e8,\s*m4,\s*ta,\s*mu} 2 } } */
|
||||
/* { dg-final { scan-assembler-times {vsetvli\s+[a-x0-9]+,\s*zero,\s*e8,\s*m4,\s*ta,\s*mu} 1 } } */
|
||||
/* { dg-final { scan-assembler-times {vsetivli\s+[a-x0-9]+,\s*0,\s*e8,\s*m8,\s*ta,\s*mu} 1 } } */
|
||||
/* { dg-final { scan-assembler-times {vsetivli\s+[a-x0-9]+,\s*31,\s*e8,\s*m8,\s*ta,\s*mu} 1 } } */
|
||||
/* { dg-final { scan-assembler-times {vsetvli\s+[a-x0-9]+,\s*[a-x0-9]+,\s*e8,\s*m8,\s*ta,\s*mu} 2 } } */
|
||||
/* { dg-final { scan-assembler-times {vsetvli\s+[a-x0-9]+,\s*zero,\s*e8,\s*m8,\s*ta,\s*mu} 1 } } */
|
||||
/* { dg-final { scan-assembler-times {vsetivli\s+[a-x0-9]+,\s*0,\s*e16,\s*mf4,\s*ta,\s*mu} 1 } } */
|
||||
/* { dg-final { scan-assembler-times {vsetivli\s+[a-x0-9]+,\s*31,\s*e16,\s*mf4,\s*ta,\s*mu} 1 } } */
|
||||
/* { dg-final { scan-assembler-times {vsetvli\s+[a-x0-9]+,\s*[a-x0-9]+,\s*e16,\s*mf4,\s*ta,\s*mu} 2 } } */
|
||||
/* { dg-final { scan-assembler-times {vsetvli\s+[a-x0-9]+,\s*zero,\s*e16,\s*mf4,\s*ta,\s*mu} 1 } } */
|
||||
/* { dg-final { scan-assembler-times {vsetivli\s+[a-x0-9]+,\s*0,\s*e16,\s*mf2,\s*ta,\s*mu} 1 } } */
|
||||
/* { dg-final { scan-assembler-times {vsetivli\s+[a-x0-9]+,\s*31,\s*e16,\s*mf2,\s*ta,\s*mu} 1 } } */
|
||||
/* { dg-final { scan-assembler-times {vsetvli\s+[a-x0-9]+,\s*[a-x0-9]+,\s*e16,\s*mf2,\s*ta,\s*mu} 2 } } */
|
||||
/* { dg-final { scan-assembler-times {vsetvli\s+[a-x0-9]+,\s*zero,\s*e16,\s*mf2,\s*ta,\s*mu} 1 } } */
|
||||
/* { dg-final { scan-assembler-times {vsetivli\s+[a-x0-9]+,\s*0,\s*e16,\s*m1,\s*ta,\s*mu} 1 } } */
|
||||
/* { dg-final { scan-assembler-times {vsetivli\s+[a-x0-9]+,\s*31,\s*e16,\s*m1,\s*ta,\s*mu} 1 } } */
|
||||
/* { dg-final { scan-assembler-times {vsetvli\s+[a-x0-9]+,\s*[a-x0-9]+,\s*e16,\s*m1,\s*ta,\s*mu} 2 } } */
|
||||
/* { dg-final { scan-assembler-times {vsetvli\s+[a-x0-9]+,\s*zero,\s*e16,\s*m1,\s*ta,\s*mu} 1 } } */
|
||||
/* { dg-final { scan-assembler-times {vsetivli\s+[a-x0-9]+,\s*0,\s*e16,\s*m2,\s*ta,\s*mu} 1 } } */
|
||||
/* { dg-final { scan-assembler-times {vsetivli\s+[a-x0-9]+,\s*31,\s*e16,\s*m2,\s*ta,\s*mu} 1 } } */
|
||||
/* { dg-final { scan-assembler-times {vsetvli\s+[a-x0-9]+,\s*[a-x0-9]+,\s*e16,\s*m2,\s*ta,\s*mu} 2 } } */
|
||||
/* { dg-final { scan-assembler-times {vsetvli\s+[a-x0-9]+,\s*zero,\s*e16,\s*m2,\s*ta,\s*mu} 1 } } */
|
||||
/* { dg-final { scan-assembler-times {vsetivli\s+[a-x0-9]+,\s*0,\s*e16,\s*m4,\s*ta,\s*mu} 1 } } */
|
||||
/* { dg-final { scan-assembler-times {vsetivli\s+[a-x0-9]+,\s*31,\s*e16,\s*m4,\s*ta,\s*mu} 1 } } */
|
||||
/* { dg-final { scan-assembler-times {vsetvli\s+[a-x0-9]+,\s*[a-x0-9]+,\s*e16,\s*m4,\s*ta,\s*mu} 2 } } */
|
||||
/* { dg-final { scan-assembler-times {vsetvli\s+[a-x0-9]+,\s*zero,\s*e16,\s*m4,\s*ta,\s*mu} 1 } } */
|
||||
/* { dg-final { scan-assembler-times {vsetivli\s+[a-x0-9]+,\s*0,\s*e16,\s*m8,\s*ta,\s*mu} 1 } } */
|
||||
/* { dg-final { scan-assembler-times {vsetivli\s+[a-x0-9]+,\s*31,\s*e16,\s*m8,\s*ta,\s*mu} 1 } } */
|
||||
/* { dg-final { scan-assembler-times {vsetvli\s+[a-x0-9]+,\s*[a-x0-9]+,\s*e16,\s*m8,\s*ta,\s*mu} 2 } } */
|
||||
/* { dg-final { scan-assembler-times {vsetvli\s+[a-x0-9]+,\s*zero,\s*e16,\s*m8,\s*ta,\s*mu} 1 } } */
|
||||
/* { dg-final { scan-assembler-times {vsetivli\s+[a-x0-9]+,\s*0,\s*e32,\s*mf2,\s*ta,\s*mu} 1 } } */
|
||||
/* { dg-final { scan-assembler-times {vsetivli\s+[a-x0-9]+,\s*31,\s*e32,\s*mf2,\s*ta,\s*mu} 1 } } */
|
||||
/* { dg-final { scan-assembler-times {vsetvli\s+[a-x0-9]+,\s*[a-x0-9]+,\s*e32,\s*mf2,\s*ta,\s*mu} 2 } } */
|
||||
/* { dg-final { scan-assembler-times {vsetvli\s+[a-x0-9]+,\s*zero,\s*e32,\s*mf2,\s*ta,\s*mu} 1 } } */
|
||||
/* { dg-final { scan-assembler-times {vsetivli\s+[a-x0-9]+,\s*0,\s*e32,\s*m1,\s*ta,\s*mu} 1 } } */
|
||||
/* { dg-final { scan-assembler-times {vsetivli\s+[a-x0-9]+,\s*31,\s*e32,\s*m1,\s*ta,\s*mu} 1 } } */
|
||||
/* { dg-final { scan-assembler-times {vsetvli\s+[a-x0-9]+,\s*[a-x0-9]+,\s*e32,\s*m1,\s*ta,\s*mu} 2 } } */
|
||||
/* { dg-final { scan-assembler-times {vsetvli\s+[a-x0-9]+,\s*zero,\s*e32,\s*m1,\s*ta,\s*mu} 1 } } */
|
||||
/* { dg-final { scan-assembler-times {vsetivli\s+[a-x0-9]+,\s*0,\s*e32,\s*m2,\s*ta,\s*mu} 1 } } */
|
||||
/* { dg-final { scan-assembler-times {vsetivli\s+[a-x0-9]+,\s*31,\s*e32,\s*m2,\s*ta,\s*mu} 1 } } */
|
||||
/* { dg-final { scan-assembler-times {vsetvli\s+[a-x0-9]+,\s*[a-x0-9]+,\s*e32,\s*m2,\s*ta,\s*mu} 2 } } */
|
||||
/* { dg-final { scan-assembler-times {vsetvli\s+[a-x0-9]+,\s*zero,\s*e32,\s*m2,\s*ta,\s*mu} 1 } } */
|
||||
/* { dg-final { scan-assembler-times {vsetivli\s+[a-x0-9]+,\s*0,\s*e32,\s*m4,\s*ta,\s*mu} 1 } } */
|
||||
/* { dg-final { scan-assembler-times {vsetivli\s+[a-x0-9]+,\s*31,\s*e32,\s*m4,\s*ta,\s*mu} 1 } } */
|
||||
/* { dg-final { scan-assembler-times {vsetvli\s+[a-x0-9]+,\s*[a-x0-9]+,\s*e32,\s*m4,\s*ta,\s*mu} 2 } } */
|
||||
/* { dg-final { scan-assembler-times {vsetvli\s+[a-x0-9]+,\s*zero,\s*e32,\s*m4,\s*ta,\s*mu} 1 } } */
|
||||
/* { dg-final { scan-assembler-times {vsetivli\s+[a-x0-9]+,\s*0,\s*e32,\s*m8,\s*ta,\s*mu} 1 } } */
|
||||
/* { dg-final { scan-assembler-times {vsetivli\s+[a-x0-9]+,\s*31,\s*e32,\s*m8,\s*ta,\s*mu} 1 } } */
|
||||
/* { dg-final { scan-assembler-times {vsetvli\s+[a-x0-9]+,\s*[a-x0-9]+,\s*e32,\s*m8,\s*ta,\s*mu} 2 } } */
|
||||
/* { dg-final { scan-assembler-times {vsetvli\s+[a-x0-9]+,\s*zero,\s*e32,\s*m8,\s*ta,\s*mu} 1 } } */
|
||||
/* { dg-final { scan-assembler-times {vsetivli\s+[a-x0-9]+,\s*0,\s*e64,\s*m1,\s*ta,\s*mu} 1 } } */
|
||||
/* { dg-final { scan-assembler-times {vsetivli\s+[a-x0-9]+,\s*31,\s*e64,\s*m1,\s*ta,\s*mu} 1 } } */
|
||||
/* { dg-final { scan-assembler-times {vsetvli\s+[a-x0-9]+,\s*[a-x0-9]+,\s*e64,\s*m1,\s*ta,\s*mu} 2 } } */
|
||||
/* { dg-final { scan-assembler-times {vsetvli\s+[a-x0-9]+,\s*zero,\s*e64,\s*m1,\s*ta,\s*mu} 1 } } */
|
||||
/* { dg-final { scan-assembler-times {vsetivli\s+[a-x0-9]+,\s*0,\s*e64,\s*m2,\s*ta,\s*mu} 1 } } */
|
||||
/* { dg-final { scan-assembler-times {vsetivli\s+[a-x0-9]+,\s*31,\s*e64,\s*m2,\s*ta,\s*mu} 1 } } */
|
||||
/* { dg-final { scan-assembler-times {vsetvli\s+[a-x0-9]+,\s*[a-x0-9]+,\s*e64,\s*m2,\s*ta,\s*mu} 2 } } */
|
||||
/* { dg-final { scan-assembler-times {vsetvli\s+[a-x0-9]+,\s*zero,\s*e64,\s*m2,\s*ta,\s*mu} 1 } } */
|
||||
/* { dg-final { scan-assembler-times {vsetivli\s+[a-x0-9]+,\s*0,\s*e64,\s*m4,\s*ta,\s*mu} 1 } } */
|
||||
/* { dg-final { scan-assembler-times {vsetivli\s+[a-x0-9]+,\s*31,\s*e64,\s*m4,\s*ta,\s*mu} 1 } } */
|
||||
/* { dg-final { scan-assembler-times {vsetvli\s+[a-x0-9]+,\s*[a-x0-9]+,\s*e64,\s*m4,\s*ta,\s*mu} 2 } } */
|
||||
/* { dg-final { scan-assembler-times {vsetvli\s+[a-x0-9]+,\s*zero,\s*e64,\s*m4,\s*ta,\s*mu} 1 } } */
|
||||
/* { dg-final { scan-assembler-times {vsetivli\s+[a-x0-9]+,\s*0,\s*e64,\s*m8,\s*ta,\s*mu} 1 } } */
|
||||
/* { dg-final { scan-assembler-times {vsetivli\s+[a-x0-9]+,\s*31,\s*e64,\s*m8,\s*ta,\s*mu} 1 } } */
|
||||
/* { dg-final { scan-assembler-times {vsetvli\s+[a-x0-9]+,\s*[a-x0-9]+,\s*e64,\s*m8,\s*ta,\s*mu} 2 } } */
|
||||
/* { dg-final { scan-assembler-times {vsetvli\s+[a-x0-9]+,\s*zero,\s*e64,\s*m8,\s*ta,\s*mu} 1 } } */
|
||||
|
||||
@ -19,7 +19,7 @@ void vwrite_csr_vcsr(unsigned long value) {
|
||||
vwrite_csr(RVV_VCSR, value);
|
||||
}
|
||||
|
||||
/* { dg-final { scan-assembler-times {csrw\s+vstart,\s*(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7])} 1 } } */
|
||||
/* { dg-final { scan-assembler-times {csrw\s+vxsat,\s*(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7])} 1 } } */
|
||||
/* { dg-final { scan-assembler-times {csrw\s+vxrm,\s*(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7])} 1 } } */
|
||||
/* { dg-final { scan-assembler-times {csrw\s+vcsr,\s*(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7])} 1 } } */
|
||||
/* { dg-final { scan-assembler-times {csrw\s+vstart,\s*[a-x0-9]+} 1 } } */
|
||||
/* { dg-final { scan-assembler-times {csrw\s+vxsat,\s*[a-x0-9]+} 1 } } */
|
||||
/* { dg-final { scan-assembler-times {csrw\s+vxrm,\s*[a-x0-9]+} 1 } } */
|
||||
/* { dg-final { scan-assembler-times {csrw\s+vcsr,\s*[a-x0-9]+} 1 } } */
|
||||
|
||||
Loading…
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Reference in New Issue
Block a user