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sparc.h (MASK_FASTER_STRUCTS, [...]): Define.
* sparc.h (MASK_FASTER_STRUCTS, TARGET_FASTER_STRUCTS): Define.
(TARGET_SWITCHES): Add -mfaster-structs/-mno-faster-structs flags.
(ROUND_TYPE_ALIGN): Use better value of -mfaster-structs.
* sparc.md (sparclite86x_branch, sparclite86x_shift): New function
units for the sparclite86x chip.
(flush): Revert October 14th change; add SImode specifically.
(flushdi): Copy of flush, but DImode, to avoid genrecog warnings.
* invoke.texi: Document it.
From-SVN: r30722
This commit is contained in:
Brendan Kehoe
Brendan Kehoe
parent
4c82e14546
commit
c219ddf76d
@ -1,3 +1,14 @@
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1999-11-30 Brendan Kehoe <brendan@cygnus.com>
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* sparc.h (MASK_FASTER_STRUCTS, TARGET_FASTER_STRUCTS): Define.
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(TARGET_SWITCHES): Add -mfaster-structs/-mno-faster-structs flags.
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(ROUND_TYPE_ALIGN): Use better value of -mfaster-structs.
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* sparc.md (sparclite86x_branch, sparclite86x_shift): New function
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units for the sparclite86x chip.
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(flush): Revert October 14th change; add SImode specifically.
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(flushdi): Copy of flush, but DImode, to avoid genrecog warnings.
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* invoke.texi: Document it.
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Tue Nov 30 14:58:14 1999 Nick Clifton <nickc@cygnus.com>
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* config/mn10200/mn10200.h (PREDICATE_CODES): Add
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@ -545,6 +545,11 @@ extern int target_flags;
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#define MASK_V8PLUS 0x2000000
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#define TARGET_V8PLUS (target_flags & MASK_V8PLUS)
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/* Force a the fastest alignment on structures to take advantage of
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faster copies. */
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#define MASK_FASTER_STRUCTS 0x4000000
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#define TARGET_FASTER_STRUCTS (target_flags & MASK_FASTER_STRUCTS)
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/* TARGET_HARD_MUL: Use hardware multiply instructions but not %y.
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TARGET_HARD_MUL32: Use hardware multiply instructions with rd %y
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to get high 32 bits. False in V8+ or V9 because multiply stores
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@ -603,6 +608,8 @@ extern int target_flags;
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{"64", MASK_64BIT, "Use 64-bit ABI" }, \
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{"stack-bias", MASK_STACK_BIAS, "Use stack bias" }, \
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{"no-stack-bias", -MASK_STACK_BIAS, "Do not use stack bias" }, \
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{"faster-structs", MASK_FASTER_STRUCTS, "Use structs on stronger alignment for double-word copies" }, \
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{"no-faster-structs", -MASK_FASTER_STRUCTS, "Do not use structs on stronger alignment for double-word copies" }, \
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SUBTARGET_SWITCHES \
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{ "", TARGET_DEFAULT, ""}}
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@ -799,6 +806,23 @@ if (TARGET_ARCH64 \
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/* The best alignment to use in cases where we have a choice. */
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#define FASTEST_ALIGNMENT 64
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/* Define this macro as an expression for the alignment of a structure
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(given by STRUCT as a tree node) if the alignment computed in the
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usual way is COMPUTED and the alignment explicitly specified was
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SPECIFIED.
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The default is to use SPECIFIED if it is larger; otherwise, use
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the smaller of COMPUTED and `BIGGEST_ALIGNMENT' */
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#define ROUND_TYPE_ALIGN(STRUCT, COMPUTED, SPECIFIED) \
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(TARGET_FASTER_STRUCTS ? \
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((TREE_CODE (STRUCT) == RECORD_TYPE \
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|| TREE_CODE (STRUCT) == UNION_TYPE \
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|| TREE_CODE (STRUCT) == QUAL_UNION_TYPE) \
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&& TYPE_FIELDS (STRUCT) != 0 \
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? MAX (MAX ((COMPUTED), (SPECIFIED)), BIGGEST_ALIGNMENT) \
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: MAX ((COMPUTED), (SPECIFIED))) \
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: MAX ((COMPUTED), (SPECIFIED)))
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/* Make strings word-aligned so strcpy from constants will be faster. */
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#define CONSTANT_ALIGNMENT(EXP, ALIGN) \
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((TREE_CODE (EXP) == STRING_CST \
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@ -365,6 +365,17 @@
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(eq_attr "type" "store,fpstore"))
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2 1)
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(define_function_unit "sparclite86x_branch" 1 0
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(and (eq_attr "cpu" "sparclite86x")
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(eq_attr "type" "branch"))
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1 1)
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;; integer multiply insns
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(define_function_unit "sparclite86x_shift" 1 0
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(and (eq_attr "cpu" "sparclite86x")
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(eq_attr "type" "shift"))
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1 1)
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(define_function_unit "fp_alu" 1 0
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(and (ior (eq_attr "cpu" "hypersparc") (eq_attr "cpu" "sparclite86x"))
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(eq_attr "type" "fp,fpmove,fpcmp"))
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@ -7884,12 +7895,23 @@
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;; Special pattern for the FLUSH instruction.
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; We do SImode and DImode versions of this to quiet down genrecog's complaints
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; of the define_insn otherwise missing a mode. We make "flush", aka
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; gen_flush, the default one since sparc_initialize_trampoline uses
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; it on SImode mem values.
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(define_insn "flush"
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[(unspec_volatile [(mem (match_operand 0 "address_operand" "p"))] 4)]
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[(unspec_volatile [(match_operand:SI 0 "memory_operand" "m")] 3)]
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""
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"* return TARGET_V9 ? \"flush\\t%a0\" : \"iflush\\t%a0\";"
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[(set_attr "type" "misc")
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(set_attr "length" "1")])
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"* return TARGET_V9 ? \"flush %f0\" : \"iflush %f0\";"
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[(set_attr "type" "misc")])
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(define_insn "flushdi"
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[(unspec_volatile [(match_operand:DI 0 "memory_operand" "m")] 3)]
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""
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"* return TARGET_V9 ? \"flush %f0\" : \"iflush %f0\";"
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[(set_attr "type" "misc")])
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;; find first set.
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@ -231,11 +231,12 @@ in the following sections.
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-mtune=@var{cpu type}
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-mcmodel=@var{code model}
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-m32 -m64
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-mapp-regs -mbroken-saverestore -mcypress -mepilogue
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-mflat -mfpu -mhard-float -mhard-quad-float
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-mimpure-text -mlive-g0 -mno-app-regs -mno-epilogue
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-mno-flat -mno-fpu -mno-impure-text
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-mno-stack-bias -mno-unaligned-doubles
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-mapp-regs -mbroken-saverestore -mcypress
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-mepilogue -mfaster-structs -mflat
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-mfpu -mhard-float -mhard-quad-float
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-mimpure-text -mlive-g0 -mno-app-regs
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-mno-epilogue -mno-faster-structs -mno-flat -mno-fpu
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-mno-impure-text -mno-stack-bias -mno-unaligned-doubles
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-msoft-float -msoft-quad-float -msparclite -mstack-bias
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-msupersparc -munaligned-doubles -mv8
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@ -3946,6 +3947,17 @@ Specifying this option avoids some rare compatibility problems with code
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generated by other compilers. It is not the default because it results
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in a performance loss, especially for floating point code.
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@item -mno-faster-structs
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@itemx -mfaster-structs
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With @samp{-mfaster-structs}, the compiler assumes that structures
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should have 8 byte alignment. This enables the use of pairs of
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@code{ldd} and @code{std} instructions for copies in structure
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assignment, in place of twice as many @code{ld} and @code{st} pairs.
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However, the use of this changed alignment directly violates the Sparc
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ABI. Thus, it's intended only for use on targets where the developer
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acknowledges that their resulting code will not be directly in line with
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the rules of the ABI.
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@item -mv8
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@itemx -msparclite
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These two options select variations on the SPARC architecture.
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