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[ARM 2/5 big.LITTLE] Allow tuning parameters without unique tuning targets.
gcc/ * config/arm/arm-cores.def: Add new column for TUNE_IDENT. * config/arm/genopt.sh: Improve layout. * config/arm/arm-tune.md: Regenerate. * config/arm/arm-tables.opt: Regenerate. * config/arm/arm-opts.h (ARM_CORE): Modify macro for TUNE_IDENT. * config/arm/arm.c (ARM_CORE): Modify macro for TUNE_IDENT. (arm_option_override): When a CPU is chosen, that should also form the tune target. * config/arm/arm.h (ARM_CORE): Modify macro for TUNE_IDENT. From-SVN: r206046
This commit is contained in:
James Greenhalgh
James Greenhalgh
parent
b848e289cf
commit
c0e25e6593
@ -1,3 +1,15 @@
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2013-12-17 James Greenhalgh <james.greenhalgh@arm.com>
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* config/arm/arm-cores.def: Add new column for TUNE_IDENT.
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* config/arm/genopt.sh: Improve layout.
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* config/arm/arm-tune.md: Regenerate.
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* config/arm/arm-tables.opt: Regenerate.
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* config/arm/arm-opts.h (ARM_CORE): Modify macro for TUNE_IDENT.
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* config/arm/arm.c (ARM_CORE): Modify macro for TUNE_IDENT.
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(arm_option_override): When a CPU is chosen, that should also
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form the tune target.
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* config/arm/arm.h (ARM_CORE): Modify macro for TUNE_IDENT.
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2013-12-17 James Greenhalgh <james.greenhalgh@arm.com>
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* common/config/arm/arm-common.c (arm_rewrite_selected_cpu): New.
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@ -20,10 +20,13 @@
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/* Before using #include to read this file, define a macro:
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ARM_CORE(CORE_NAME, CORE_IDENT, ARCH, FLAGS, COSTS)
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ARM_CORE(CORE_NAME, INTERNAL_IDENT, TUNE_IDENT, ARCH, FLAGS, COSTS)
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The CORE_NAME is the name of the core, represented as a string constant.
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The CORE_IDENT is the name of the core, represented as an identifier.
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The INTERNAL_IDENT is the name of the core represented as an identifier.
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This must be unique for each entry in this table.
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The TUNE_IDENT is the name of the core for which scheduling decisions
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should be made, represented as an identifier.
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ARCH is the architecture revision implemented by the chip.
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FLAGS are the bitwise-or of the traits that apply to that core.
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This need not include flags implied by the architecture.
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@ -35,109 +38,115 @@
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Some tools assume no whitespace up to the first "," in each entry. */
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/* V2/V2A Architecture Processors */
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ARM_CORE("arm2", arm2, 2, FL_CO_PROC | FL_MODE26, slowmul)
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ARM_CORE("arm250", arm250, 2, FL_CO_PROC | FL_MODE26, slowmul)
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ARM_CORE("arm3", arm3, 2, FL_CO_PROC | FL_MODE26, slowmul)
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ARM_CORE("arm2", arm2, arm2, 2, FL_CO_PROC | FL_MODE26, slowmul)
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ARM_CORE("arm250", arm250, arm250, 2, FL_CO_PROC | FL_MODE26, slowmul)
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ARM_CORE("arm3", arm3, arm3, 2, FL_CO_PROC | FL_MODE26, slowmul)
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/* V3 Architecture Processors */
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ARM_CORE("arm6", arm6, 3, FL_CO_PROC | FL_MODE26, slowmul)
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ARM_CORE("arm60", arm60, 3, FL_CO_PROC | FL_MODE26, slowmul)
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ARM_CORE("arm600", arm600, 3, FL_CO_PROC | FL_MODE26 | FL_WBUF, slowmul)
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ARM_CORE("arm610", arm610, 3, FL_MODE26 | FL_WBUF, slowmul)
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ARM_CORE("arm620", arm620, 3, FL_CO_PROC | FL_MODE26 | FL_WBUF, slowmul)
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ARM_CORE("arm7", arm7, 3, FL_CO_PROC | FL_MODE26, slowmul)
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ARM_CORE("arm7d", arm7d, 3, FL_CO_PROC | FL_MODE26, slowmul)
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ARM_CORE("arm7di", arm7di, 3, FL_CO_PROC | FL_MODE26, slowmul)
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ARM_CORE("arm70", arm70, 3, FL_CO_PROC | FL_MODE26, slowmul)
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ARM_CORE("arm700", arm700, 3, FL_CO_PROC | FL_MODE26 | FL_WBUF, slowmul)
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ARM_CORE("arm700i", arm700i, 3, FL_CO_PROC | FL_MODE26 | FL_WBUF, slowmul)
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ARM_CORE("arm710", arm710, 3, FL_MODE26 | FL_WBUF, slowmul)
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ARM_CORE("arm720", arm720, 3, FL_MODE26 | FL_WBUF, slowmul)
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ARM_CORE("arm710c", arm710c, 3, FL_MODE26 | FL_WBUF, slowmul)
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ARM_CORE("arm7100", arm7100, 3, FL_MODE26 | FL_WBUF, slowmul)
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ARM_CORE("arm7500", arm7500, 3, FL_MODE26 | FL_WBUF, slowmul)
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/* Doesn't have an external co-proc, but does have embedded fpa. */
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ARM_CORE("arm7500fe", arm7500fe, 3, FL_CO_PROC | FL_MODE26 | FL_WBUF, slowmul)
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ARM_CORE("arm6", arm6, arm6, 3, FL_CO_PROC | FL_MODE26, slowmul)
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ARM_CORE("arm60", arm60, arm60, 3, FL_CO_PROC | FL_MODE26, slowmul)
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ARM_CORE("arm600", arm600, arm600, 3, FL_CO_PROC | FL_MODE26 | FL_WBUF, slowmul)
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ARM_CORE("arm610", arm610, arm610, 3, FL_MODE26 | FL_WBUF, slowmul)
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ARM_CORE("arm620", arm620, arm620, 3, FL_CO_PROC | FL_MODE26 | FL_WBUF, slowmul)
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ARM_CORE("arm7", arm7, arm7, 3, FL_CO_PROC | FL_MODE26, slowmul)
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ARM_CORE("arm7d", arm7d, arm7d, 3, FL_CO_PROC | FL_MODE26, slowmul)
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ARM_CORE("arm7di", arm7di, arm7di, 3, FL_CO_PROC | FL_MODE26, slowmul)
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ARM_CORE("arm70", arm70, arm70, 3, FL_CO_PROC | FL_MODE26, slowmul)
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ARM_CORE("arm700", arm700, arm700, 3, FL_CO_PROC | FL_MODE26 | FL_WBUF, slowmul)
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ARM_CORE("arm700i", arm700i, arm700i, 3, FL_CO_PROC | FL_MODE26 | FL_WBUF, slowmul)
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ARM_CORE("arm710", arm710, arm710, 3, FL_MODE26 | FL_WBUF, slowmul)
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ARM_CORE("arm720", arm720, arm720, 3, FL_MODE26 | FL_WBUF, slowmul)
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ARM_CORE("arm710c", arm710c, arm710c, 3, FL_MODE26 | FL_WBUF, slowmul)
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ARM_CORE("arm7100", arm7100, arm7100, 3, FL_MODE26 | FL_WBUF, slowmul)
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ARM_CORE("arm7500", arm7500, arm7500, 3, FL_MODE26 | FL_WBUF, slowmul)
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/* Doesn't have an external co-proc, but does have embedded fpa. */
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ARM_CORE("arm7500fe", arm7500fe, arm7500fe, 3, FL_CO_PROC | FL_MODE26 | FL_WBUF, slowmul)
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/* V3M Architecture Processors */
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/* arm7m doesn't exist on its own, but only with D, ("and", and I), but
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those don't alter the code, so arm7m is sometimes used. */
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ARM_CORE("arm7m", arm7m, 3M, FL_CO_PROC | FL_MODE26, fastmul)
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ARM_CORE("arm7dm", arm7dm, 3M, FL_CO_PROC | FL_MODE26, fastmul)
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ARM_CORE("arm7dmi", arm7dmi, 3M, FL_CO_PROC | FL_MODE26, fastmul)
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ARM_CORE("arm7m", arm7m, arm7m, 3M, FL_CO_PROC | FL_MODE26, fastmul)
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ARM_CORE("arm7dm", arm7dm, arm7dm, 3M, FL_CO_PROC | FL_MODE26, fastmul)
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ARM_CORE("arm7dmi", arm7dmi, arm7dmi, 3M, FL_CO_PROC | FL_MODE26, fastmul)
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/* V4 Architecture Processors */
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ARM_CORE("arm8", arm8, 4, FL_MODE26 | FL_LDSCHED, fastmul)
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ARM_CORE("arm810", arm810, 4, FL_MODE26 | FL_LDSCHED, fastmul)
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ARM_CORE("strongarm", strongarm, 4, FL_MODE26 | FL_LDSCHED | FL_STRONG, strongarm)
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ARM_CORE("strongarm110", strongarm110, 4, FL_MODE26 | FL_LDSCHED | FL_STRONG, strongarm)
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ARM_CORE("strongarm1100", strongarm1100, 4, FL_MODE26 | FL_LDSCHED | FL_STRONG, strongarm)
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ARM_CORE("strongarm1110", strongarm1110, 4, FL_MODE26 | FL_LDSCHED | FL_STRONG, strongarm)
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ARM_CORE("fa526", fa526, 4, FL_LDSCHED, fastmul)
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ARM_CORE("fa626", fa626, 4, FL_LDSCHED, fastmul)
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ARM_CORE("arm8", arm8, arm8, 4, FL_MODE26 | FL_LDSCHED, fastmul)
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ARM_CORE("arm810", arm810, arm810, 4, FL_MODE26 | FL_LDSCHED, fastmul)
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ARM_CORE("strongarm", strongarm, strongarm, 4, FL_MODE26 | FL_LDSCHED | FL_STRONG, strongarm)
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ARM_CORE("strongarm110", strongarm110, strongarm110, 4, FL_MODE26 | FL_LDSCHED | FL_STRONG, strongarm)
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ARM_CORE("strongarm1100", strongarm1100, strongarm1100, 4, FL_MODE26 | FL_LDSCHED | FL_STRONG, strongarm)
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ARM_CORE("strongarm1110", strongarm1110, strongarm1110, 4, FL_MODE26 | FL_LDSCHED | FL_STRONG, strongarm)
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ARM_CORE("fa526", fa526, fa526, 4, FL_LDSCHED, fastmul)
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ARM_CORE("fa626", fa626, fa626, 4, FL_LDSCHED, fastmul)
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/* V4T Architecture Processors */
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ARM_CORE("arm7tdmi", arm7tdmi, 4T, FL_CO_PROC , fastmul)
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ARM_CORE("arm7tdmi-s", arm7tdmis, 4T, FL_CO_PROC , fastmul)
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ARM_CORE("arm710t", arm710t, 4T, FL_WBUF, fastmul)
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ARM_CORE("arm720t", arm720t, 4T, FL_WBUF, fastmul)
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ARM_CORE("arm740t", arm740t, 4T, FL_WBUF, fastmul)
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ARM_CORE("arm9", arm9, 4T, FL_LDSCHED, fastmul)
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ARM_CORE("arm9tdmi", arm9tdmi, 4T, FL_LDSCHED, fastmul)
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ARM_CORE("arm920", arm920, 4T, FL_LDSCHED, fastmul)
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ARM_CORE("arm920t", arm920t, 4T, FL_LDSCHED, fastmul)
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ARM_CORE("arm922t", arm922t, 4T, FL_LDSCHED, fastmul)
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ARM_CORE("arm940t", arm940t, 4T, FL_LDSCHED, fastmul)
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ARM_CORE("ep9312", ep9312, 4T, FL_LDSCHED, fastmul)
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ARM_CORE("arm7tdmi", arm7tdmi, arm7tdmi, 4T, FL_CO_PROC, fastmul)
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ARM_CORE("arm7tdmi-s", arm7tdmis, arm7tdmis, 4T, FL_CO_PROC, fastmul)
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ARM_CORE("arm710t", arm710t, arm710t, 4T, FL_WBUF, fastmul)
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ARM_CORE("arm720t", arm720t, arm720t, 4T, FL_WBUF, fastmul)
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ARM_CORE("arm740t", arm740t, arm740t, 4T, FL_WBUF, fastmul)
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ARM_CORE("arm9", arm9, arm9, 4T, FL_LDSCHED, fastmul)
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ARM_CORE("arm9tdmi", arm9tdmi, arm9tdmi, 4T, FL_LDSCHED, fastmul)
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ARM_CORE("arm920", arm920, arm920, 4T, FL_LDSCHED, fastmul)
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ARM_CORE("arm920t", arm920t, arm920t, 4T, FL_LDSCHED, fastmul)
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ARM_CORE("arm922t", arm922t, arm922t, 4T, FL_LDSCHED, fastmul)
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ARM_CORE("arm940t", arm940t, arm940t, 4T, FL_LDSCHED, fastmul)
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ARM_CORE("ep9312", ep9312, ep9312, 4T, FL_LDSCHED, fastmul)
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/* V5T Architecture Processors */
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ARM_CORE("arm10tdmi", arm10tdmi, 5T, FL_LDSCHED, fastmul)
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ARM_CORE("arm1020t", arm1020t, 5T, FL_LDSCHED, fastmul)
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ARM_CORE("arm10tdmi", arm10tdmi, arm10tdmi, 5T, FL_LDSCHED, fastmul)
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ARM_CORE("arm1020t", arm1020t, arm1020t, 5T, FL_LDSCHED, fastmul)
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/* V5TE Architecture Processors */
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ARM_CORE("arm9e", arm9e, 5TE, FL_LDSCHED, 9e)
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ARM_CORE("arm946e-s", arm946es, 5TE, FL_LDSCHED, 9e)
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ARM_CORE("arm966e-s", arm966es, 5TE, FL_LDSCHED, 9e)
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ARM_CORE("arm968e-s", arm968es, 5TE, FL_LDSCHED, 9e)
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ARM_CORE("arm10e", arm10e, 5TE, FL_LDSCHED, fastmul)
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ARM_CORE("arm1020e", arm1020e, 5TE, FL_LDSCHED, fastmul)
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ARM_CORE("arm1022e", arm1022e, 5TE, FL_LDSCHED, fastmul)
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ARM_CORE("xscale", xscale, 5TE, FL_LDSCHED | FL_STRONG | FL_XSCALE, xscale)
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ARM_CORE("iwmmxt", iwmmxt, 5TE, FL_LDSCHED | FL_STRONG | FL_XSCALE | FL_IWMMXT, xscale)
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ARM_CORE("iwmmxt2", iwmmxt2, 5TE, FL_LDSCHED | FL_STRONG | FL_XSCALE | FL_IWMMXT | FL_IWMMXT2, xscale)
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ARM_CORE("fa606te", fa606te, 5TE, FL_LDSCHED, 9e)
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ARM_CORE("fa626te", fa626te, 5TE, FL_LDSCHED, 9e)
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ARM_CORE("fmp626", fmp626, 5TE, FL_LDSCHED, 9e)
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ARM_CORE("fa726te", fa726te, 5TE, FL_LDSCHED, fa726te)
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ARM_CORE("arm9e", arm9e, arm9e, 5TE, FL_LDSCHED, 9e)
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ARM_CORE("arm946e-s", arm946es, arm946es, 5TE, FL_LDSCHED, 9e)
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ARM_CORE("arm966e-s", arm966es, arm966es, 5TE, FL_LDSCHED, 9e)
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ARM_CORE("arm968e-s", arm968es, arm968es, 5TE, FL_LDSCHED, 9e)
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ARM_CORE("arm10e", arm10e, arm10e, 5TE, FL_LDSCHED, fastmul)
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ARM_CORE("arm1020e", arm1020e, arm1020e, 5TE, FL_LDSCHED, fastmul)
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ARM_CORE("arm1022e", arm1022e, arm1022e, 5TE, FL_LDSCHED, fastmul)
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ARM_CORE("xscale", xscale, xscale, 5TE, FL_LDSCHED | FL_STRONG | FL_XSCALE, xscale)
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ARM_CORE("iwmmxt", iwmmxt, iwmmxt, 5TE, FL_LDSCHED | FL_STRONG | FL_XSCALE | FL_IWMMXT, xscale)
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ARM_CORE("iwmmxt2", iwmmxt2, iwmmxt2, 5TE, FL_LDSCHED | FL_STRONG | FL_XSCALE | FL_IWMMXT | FL_IWMMXT2, xscale)
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ARM_CORE("fa606te", fa606te, fa606te, 5TE, FL_LDSCHED, 9e)
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ARM_CORE("fa626te", fa626te, fa626te, 5TE, FL_LDSCHED, 9e)
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ARM_CORE("fmp626", fmp626, fmp626, 5TE, FL_LDSCHED, 9e)
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ARM_CORE("fa726te", fa726te, fa726te, 5TE, FL_LDSCHED, fa726te)
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/* V5TEJ Architecture Processors */
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ARM_CORE("arm926ej-s", arm926ejs, 5TEJ, FL_LDSCHED, 9e)
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ARM_CORE("arm1026ej-s", arm1026ejs, 5TEJ, FL_LDSCHED, 9e)
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ARM_CORE("arm926ej-s", arm926ejs, arm926ejs, 5TEJ, FL_LDSCHED, 9e)
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ARM_CORE("arm1026ej-s", arm1026ejs, arm1026ejs, 5TEJ, FL_LDSCHED, 9e)
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/* V6 Architecture Processors */
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ARM_CORE("arm1136j-s", arm1136js, 6J, FL_LDSCHED, 9e)
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ARM_CORE("arm1136jf-s", arm1136jfs, 6J, FL_LDSCHED | FL_VFPV2, 9e)
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ARM_CORE("arm1176jz-s", arm1176jzs, 6ZK, FL_LDSCHED, 9e)
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ARM_CORE("arm1176jzf-s", arm1176jzfs, 6ZK, FL_LDSCHED | FL_VFPV2, 9e)
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ARM_CORE("mpcorenovfp", mpcorenovfp, 6K, FL_LDSCHED, 9e)
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ARM_CORE("mpcore", mpcore, 6K, FL_LDSCHED | FL_VFPV2, 9e)
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ARM_CORE("arm1156t2-s", arm1156t2s, 6T2, FL_LDSCHED, v6t2)
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ARM_CORE("arm1156t2f-s", arm1156t2fs, 6T2, FL_LDSCHED | FL_VFPV2, v6t2)
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ARM_CORE("generic-armv7-a", genericv7a, 7A, FL_LDSCHED, cortex)
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ARM_CORE("cortex-a5", cortexa5, 7A, FL_LDSCHED, cortex_a5)
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ARM_CORE("cortex-a7", cortexa7, 7A, FL_LDSCHED | FL_THUMB_DIV | FL_ARM_DIV, cortex_a7)
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ARM_CORE("cortex-a8", cortexa8, 7A, FL_LDSCHED, cortex)
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ARM_CORE("cortex-a9", cortexa9, 7A, FL_LDSCHED, cortex_a9)
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ARM_CORE("cortex-a12", cortexa12, 7A, FL_LDSCHED | FL_THUMB_DIV | FL_ARM_DIV, cortex_a12)
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ARM_CORE("cortex-a15", cortexa15, 7A, FL_LDSCHED | FL_THUMB_DIV | FL_ARM_DIV, cortex_a15)
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ARM_CORE("cortex-a53", cortexa53, 8A, FL_LDSCHED, cortex_a53)
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ARM_CORE("cortex-r4", cortexr4, 7R, FL_LDSCHED, cortex)
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ARM_CORE("cortex-r4f", cortexr4f, 7R, FL_LDSCHED, cortex)
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ARM_CORE("cortex-r5", cortexr5, 7R, FL_LDSCHED | FL_ARM_DIV, cortex)
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ARM_CORE("cortex-r7", cortexr7, 7R, FL_LDSCHED | FL_ARM_DIV, cortex)
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ARM_CORE("cortex-m4", cortexm4, 7EM, FL_LDSCHED, v7m)
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ARM_CORE("cortex-m3", cortexm3, 7M, FL_LDSCHED, v7m)
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ARM_CORE("cortex-m1", cortexm1, 6M, FL_LDSCHED, v6m)
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ARM_CORE("cortex-m0", cortexm0, 6M, FL_LDSCHED, v6m)
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ARM_CORE("cortex-m0plus", cortexm0plus, 6M, FL_LDSCHED, v6m)
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ARM_CORE("marvell-pj4", marvell_pj4, 7A, FL_LDSCHED, 9e)
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ARM_CORE("arm1136j-s", arm1136js, arm1136js, 6J, FL_LDSCHED, 9e)
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ARM_CORE("arm1136jf-s", arm1136jfs, arm1136jfs, 6J, FL_LDSCHED | FL_VFPV2, 9e)
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ARM_CORE("arm1176jz-s", arm1176jzs, arm1176jzs, 6ZK, FL_LDSCHED, 9e)
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ARM_CORE("arm1176jzf-s", arm1176jzfs, arm1176jzfs, 6ZK, FL_LDSCHED | FL_VFPV2, 9e)
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ARM_CORE("mpcorenovfp", mpcorenovfp, mpcorenovfp, 6K, FL_LDSCHED, 9e)
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ARM_CORE("mpcore", mpcore, mpcore, 6K, FL_LDSCHED | FL_VFPV2, 9e)
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ARM_CORE("arm1156t2-s", arm1156t2s, arm1156t2s, 6T2, FL_LDSCHED, v6t2)
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ARM_CORE("arm1156t2f-s", arm1156t2fs, arm1156t2fs, 6T2, FL_LDSCHED | FL_VFPV2, v6t2)
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/* V6M Architecture Processors */
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ARM_CORE("cortex-m1", cortexm1, cortexm1, 6M, FL_LDSCHED, v6m)
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ARM_CORE("cortex-m0", cortexm0, cortexm0, 6M, FL_LDSCHED, v6m)
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ARM_CORE("cortex-m0plus", cortexm0plus, cortexm0plus, 6M, FL_LDSCHED, v6m)
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/* V7 Architecture Processors */
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ARM_CORE("generic-armv7-a", genericv7a, genericv7a, 7A, FL_LDSCHED, cortex)
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ARM_CORE("cortex-a5", cortexa5, cortexa5, 7A, FL_LDSCHED, cortex_a5)
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ARM_CORE("cortex-a7", cortexa7, cortexa7, 7A, FL_LDSCHED | FL_THUMB_DIV | FL_ARM_DIV, cortex_a7)
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ARM_CORE("cortex-a8", cortexa8, cortexa8, 7A, FL_LDSCHED, cortex)
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ARM_CORE("cortex-a9", cortexa9, cortexa9, 7A, FL_LDSCHED, cortex_a9)
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ARM_CORE("cortex-a12", cortexa12, cortexa12, 7A, FL_LDSCHED | FL_THUMB_DIV | FL_ARM_DIV, cortex_a12)
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ARM_CORE("cortex-a15", cortexa15, cortexa15, 7A, FL_LDSCHED | FL_THUMB_DIV | FL_ARM_DIV, cortex_a15)
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ARM_CORE("cortex-r4", cortexr4, cortexr4, 7R, FL_LDSCHED, cortex)
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ARM_CORE("cortex-r4f", cortexr4f, cortexr4f, 7R, FL_LDSCHED, cortex)
|
||||
ARM_CORE("cortex-r5", cortexr5, cortexr5, 7R, FL_LDSCHED | FL_ARM_DIV, cortex)
|
||||
ARM_CORE("cortex-r7", cortexr7, cortexr7, 7R, FL_LDSCHED | FL_ARM_DIV, cortex)
|
||||
ARM_CORE("cortex-m4", cortexm4, cortexm4, 7EM, FL_LDSCHED, v7m)
|
||||
ARM_CORE("cortex-m3", cortexm3, cortexm3, 7M, FL_LDSCHED, v7m)
|
||||
ARM_CORE("marvell-pj4", marvell_pj4, marvell_pj4, 7A, FL_LDSCHED, 9e)
|
||||
|
||||
/* V8 Architecture Processors */
|
||||
ARM_CORE("cortex-a53", cortexa53, cortexa53, 8A, FL_LDSCHED, cortex_a53)
|
||||
|
||||
@ -23,8 +23,9 @@
|
||||
/* The various ARM cores. */
|
||||
enum processor_type
|
||||
{
|
||||
#define ARM_CORE(NAME, IDENT, ARCH, FLAGS, COSTS) \
|
||||
IDENT,
|
||||
#undef ARM_CORE
|
||||
#define ARM_CORE(NAME, INTERNAL_IDENT, IDENT, ARCH, FLAGS, COSTS) \
|
||||
INTERNAL_IDENT,
|
||||
#include "arm-cores.def"
|
||||
#undef ARM_CORE
|
||||
/* Used to indicate that no processor has been specified. */
|
||||
|
||||
@ -231,6 +231,15 @@ Enum(processor_type) String(arm1156t2-s) Value(arm1156t2s)
|
||||
EnumValue
|
||||
Enum(processor_type) String(arm1156t2f-s) Value(arm1156t2fs)
|
||||
|
||||
EnumValue
|
||||
Enum(processor_type) String(cortex-m1) Value(cortexm1)
|
||||
|
||||
EnumValue
|
||||
Enum(processor_type) String(cortex-m0) Value(cortexm0)
|
||||
|
||||
EnumValue
|
||||
Enum(processor_type) String(cortex-m0plus) Value(cortexm0plus)
|
||||
|
||||
EnumValue
|
||||
Enum(processor_type) String(generic-armv7-a) Value(genericv7a)
|
||||
|
||||
@ -252,9 +261,6 @@ Enum(processor_type) String(cortex-a12) Value(cortexa12)
|
||||
EnumValue
|
||||
Enum(processor_type) String(cortex-a15) Value(cortexa15)
|
||||
|
||||
EnumValue
|
||||
Enum(processor_type) String(cortex-a53) Value(cortexa53)
|
||||
|
||||
EnumValue
|
||||
Enum(processor_type) String(cortex-r4) Value(cortexr4)
|
||||
|
||||
@ -273,18 +279,12 @@ Enum(processor_type) String(cortex-m4) Value(cortexm4)
|
||||
EnumValue
|
||||
Enum(processor_type) String(cortex-m3) Value(cortexm3)
|
||||
|
||||
EnumValue
|
||||
Enum(processor_type) String(cortex-m1) Value(cortexm1)
|
||||
|
||||
EnumValue
|
||||
Enum(processor_type) String(cortex-m0) Value(cortexm0)
|
||||
|
||||
EnumValue
|
||||
Enum(processor_type) String(cortex-m0plus) Value(cortexm0plus)
|
||||
|
||||
EnumValue
|
||||
Enum(processor_type) String(marvell-pj4) Value(marvell_pj4)
|
||||
|
||||
EnumValue
|
||||
Enum(processor_type) String(cortex-a53) Value(cortexa53)
|
||||
|
||||
Enum
|
||||
Name(arm_arch) Type(int)
|
||||
Known ARM architectures (for use with the -march= option):
|
||||
|
||||
@ -1,5 +1,33 @@
|
||||
;; -*- buffer-read-only: t -*-
|
||||
;; Generated automatically by gentune.sh from arm-cores.def
|
||||
(define_attr "tune"
|
||||
"arm2,arm250,arm3,arm6,arm60,arm600,arm610,arm620,arm7,arm7d,arm7di,arm70,arm700,arm700i,arm710,arm720,arm710c,arm7100,arm7500,arm7500fe,arm7m,arm7dm,arm7dmi,arm8,arm810,strongarm,strongarm110,strongarm1100,strongarm1110,fa526,fa626,arm7tdmi,arm7tdmis,arm710t,arm720t,arm740t,arm9,arm9tdmi,arm920,arm920t,arm922t,arm940t,ep9312,arm10tdmi,arm1020t,arm9e,arm946es,arm966es,arm968es,arm10e,arm1020e,arm1022e,xscale,iwmmxt,iwmmxt2,fa606te,fa626te,fmp626,fa726te,arm926ejs,arm1026ejs,arm1136js,arm1136jfs,arm1176jzs,arm1176jzfs,mpcorenovfp,mpcore,arm1156t2s,arm1156t2fs,genericv7a,cortexa5,cortexa7,cortexa8,cortexa9,cortexa12,cortexa15,cortexa53,cortexr4,cortexr4f,cortexr5,cortexr7,cortexm4,cortexm3,cortexm1,cortexm0,cortexm0plus,marvell_pj4"
|
||||
"arm2,arm250,arm3,
|
||||
arm6,arm60,arm600,
|
||||
arm610,arm620,arm7,
|
||||
arm7d,arm7di,arm70,
|
||||
arm700,arm700i,arm710,
|
||||
arm720,arm710c,arm7100,
|
||||
arm7500,arm7500fe,arm7m,
|
||||
arm7dm,arm7dmi,arm8,
|
||||
arm810,strongarm,strongarm110,
|
||||
strongarm1100,strongarm1110,fa526,
|
||||
fa626,arm7tdmi,arm7tdmis,
|
||||
arm710t,arm720t,arm740t,
|
||||
arm9,arm9tdmi,arm920,
|
||||
arm920t,arm922t,arm940t,
|
||||
ep9312,arm10tdmi,arm1020t,
|
||||
arm9e,arm946es,arm966es,
|
||||
arm968es,arm10e,arm1020e,
|
||||
arm1022e,xscale,iwmmxt,
|
||||
iwmmxt2,fa606te,fa626te,
|
||||
fmp626,fa726te,arm926ejs,
|
||||
arm1026ejs,arm1136js,arm1136jfs,
|
||||
arm1176jzs,arm1176jzfs,mpcorenovfp,
|
||||
mpcore,arm1156t2s,arm1156t2fs,
|
||||
cortexm1,cortexm0,cortexm0plus,
|
||||
genericv7a,cortexa5,cortexa7,
|
||||
cortexa8,cortexa9,cortexa12,
|
||||
cortexa15,cortexr4,cortexr4f,
|
||||
cortexr5,cortexr7,cortexm4,
|
||||
cortexm3,marvell_pj4,cortexa53"
|
||||
(const (symbol_ref "((enum attr_tune) arm_tune)")))
|
||||
|
||||
@ -1742,7 +1742,7 @@ const struct tune_params arm_fa726te_tune =
|
||||
static const struct processors all_cores[] =
|
||||
{
|
||||
/* ARM Cores */
|
||||
#define ARM_CORE(NAME, IDENT, ARCH, FLAGS, COSTS) \
|
||||
#define ARM_CORE(NAME, X, IDENT, ARCH, FLAGS, COSTS) \
|
||||
{NAME, IDENT, #ARCH, BASE_ARCH_##ARCH, \
|
||||
FLAGS | FL_FOR_ARCH##ARCH, &arm_##COSTS##_tune},
|
||||
#include "arm-cores.def"
|
||||
@ -2251,7 +2251,10 @@ arm_option_override (void)
|
||||
arm_selected_arch = &all_architectures[arm_arch_option];
|
||||
|
||||
if (global_options_set.x_arm_cpu_option)
|
||||
arm_selected_cpu = &all_cores[(int) arm_cpu_option];
|
||||
{
|
||||
arm_selected_cpu = &all_cores[(int) arm_cpu_option];
|
||||
arm_selected_tune = &all_cores[(int) arm_cpu_option];
|
||||
}
|
||||
|
||||
if (global_options_set.x_arm_tune_option)
|
||||
arm_selected_tune = &all_cores[(int) arm_tune_option];
|
||||
|
||||
@ -162,8 +162,8 @@ extern char arm_arch_name[];
|
||||
|
||||
enum target_cpus
|
||||
{
|
||||
#define ARM_CORE(NAME, IDENT, ARCH, FLAGS, COSTS) \
|
||||
TARGET_CPU_##IDENT,
|
||||
#define ARM_CORE(NAME, INTERNAL_IDENT, IDENT, ARCH, FLAGS, COSTS) \
|
||||
TARGET_CPU_##INTERNAL_IDENT,
|
||||
#include "arm-cores.def"
|
||||
#undef ARM_CORE
|
||||
TARGET_CPU_generic
|
||||
|
||||
@ -25,5 +25,5 @@ echo ";; Generated automatically by gentune.sh from arm-cores.def"
|
||||
allcores=`awk -F'[(, ]+' '/^ARM_CORE/ { cores = cores$3"," } END { print cores } ' $1`
|
||||
|
||||
echo "(define_attr \"tune\""
|
||||
echo " \"$allcores\"" | sed -e 's/,"$/"/'
|
||||
echo " \"$allcores\"" | sed -e 's/,"$/"/' | sed -e 's/\([a-z0-9_]\+,[a-z0-9_]\+,[a-z0-9_]\+,\)/\1\n\t/g'
|
||||
echo " (const (symbol_ref \"((enum attr_tune) arm_tune)\")))"
|
||||
|
||||
Loading…
x
Reference in New Issue
Block a user