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* mips.md (leasi, leadi): New patterns.

From-SVN: r27827
This commit is contained in:
Jeffrey A Law 1999-06-29 02:01:08 +00:00 committed by Jeff Law
parent 35393415f4
commit be8b493b63
2 changed files with 26 additions and 0 deletions
gcc
ChangeLog
config/mips

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@ -1,5 +1,7 @@
Tue Jun 29 01:37:53 1999 Jeffrey A Law (law@cygnus.com)
* mips.md (leasi, leadi): New patterns.
* expr.c (emit_block_move): Properly handle case where one of the
block move arguments has a queued increment or decrement.
(clear_storage): Similarly. Fix formatting goof.

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@ -10395,3 +10395,27 @@ move\\t%0,%z4\\n\\
[(set_attr "type" "branch")
(set_attr "mode" "none")
(set_attr "length" "8")])
;; For the rare case where we need to load an address into a register
;; that can not be recognized by the normal movsi/addsi instructions.
;; I have no idea how many insns this can actually generate. It should
;; be rare, so over-estimating as 10 instructions should not have any
;; real performance impact.
(define_insn "leasi"
[(set (match_operand:SI 0 "register_operand" "=d")
(match_operand:SI 1 "address_operand" "p"))]
"Pmode == SImode"
"la %0,%a1"
[(set_attr "type" "arith")
(set_attr "mode" "SI")
(set_attr "length" "40")])
;; Similarly for targets where we have 64bit pointers.
(define_insn "leadi"
[(set (match_operand:DI 0 "register_operand" "=d")
(match_operand:DI 1 "address_operand" "p"))]
"Pmode == DImode"
"la %0,%a1"
[(set_attr "type" "arith")
(set_attr "mode" "DI")
(set_attr "length" "40")])