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* mips.md (leasi, leadi): New patterns.
From-SVN: r27827
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Tue Jun 29 01:37:53 1999 Jeffrey A Law (law@cygnus.com)
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* mips.md (leasi, leadi): New patterns.
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* expr.c (emit_block_move): Properly handle case where one of the
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block move arguments has a queued increment or decrement.
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(clear_storage): Similarly. Fix formatting goof.
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@ -10395,3 +10395,27 @@ move\\t%0,%z4\\n\\
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[(set_attr "type" "branch")
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(set_attr "mode" "none")
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(set_attr "length" "8")])
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;; For the rare case where we need to load an address into a register
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;; that can not be recognized by the normal movsi/addsi instructions.
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;; I have no idea how many insns this can actually generate. It should
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;; be rare, so over-estimating as 10 instructions should not have any
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;; real performance impact.
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(define_insn "leasi"
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[(set (match_operand:SI 0 "register_operand" "=d")
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(match_operand:SI 1 "address_operand" "p"))]
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"Pmode == SImode"
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"la %0,%a1"
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[(set_attr "type" "arith")
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(set_attr "mode" "SI")
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(set_attr "length" "40")])
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;; Similarly for targets where we have 64bit pointers.
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(define_insn "leadi"
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[(set (match_operand:DI 0 "register_operand" "=d")
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(match_operand:DI 1 "address_operand" "p"))]
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"Pmode == DImode"
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"la %0,%a1"
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[(set_attr "type" "arith")
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(set_attr "mode" "DI")
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(set_attr "length" "40")])
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