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i386.opt: Add msse2avx.

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2008-09-29  H.J. Lu  <hongjiu.lu@intel.com>

	* config/i386/i386.opt: Add msse2avx.

	* config/i386/linux.h (ASM_SPEC): New.  Support -msse2avx.
	* config/i386/linux64.h (ASM_SPEC): Likewise.

	* doc/invoke.texi: Document -msse2avx.

From-SVN: r140774
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H.J. Lu 2008-09-30 00:32:29 +00:00 committed by H.J. Lu
parent 78bf333c16
commit bd459cb6ab
5 changed files with 30 additions and 1 deletions
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9
gcc/ChangeLog
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@ -1,3 +1,12 @@
2008-09-29 H.J. Lu <hongjiu.lu@intel.com>
* config/i386/i386.opt: Add msse2avx.
* config/i386/linux.h (ASM_SPEC): New. Support -msse2avx.
* config/i386/linux64.h (ASM_SPEC): Likewise.
* doc/invoke.texi: Document -msse2avx.
2008-09-29 Eric Botcazou <ebotcazou@adacore.com>
* dwarf2out.c (constant_size): Use HOST_WIDE_INT in parameter type.

4
gcc/config/i386/i386.opt
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@ -338,3 +338,7 @@ Support AES built-in functions and code generation
mpclmul
Target Report Mask(ISA_PCLMUL) Var(ix86_isa_flags) VarExists Save
Support PCLMUL built-in functions and code generation
msse2avx
Target Report Var(ix86_sse2avx)
Encode SSE instructions with VEX prefix

5
gcc/config/i386/linux.h
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@ -102,6 +102,11 @@ along with GCC; see the file COPYING3. If not see
#define LINK_EMULATION "elf_i386"
#define GLIBC_DYNAMIC_LINKER "/lib/ld-linux.so.2"
#undef ASM_SPEC
#define ASM_SPEC \
"%{v:-V} %{Qy:} %{!Qn:-Qy} %{n} %{T} %{Ym,*} %{Yd,*} %{Wa,*:%*} \
%{!mno-sse2avx:%{mavx:-msse2avx}} %{msse2avx:%{!mavx:-msse2avx}}"
#undef SUBTARGET_EXTRA_SPECS
#define SUBTARGET_EXTRA_SPECS \
{ "link_emulation", LINK_EMULATION },\

5
gcc/config/i386/linux64.h
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@ -56,6 +56,11 @@ along with GCC; see the file COPYING3. If not see
#define GLIBC_DYNAMIC_LINKER32 "/lib/ld-linux.so.2"
#define GLIBC_DYNAMIC_LINKER64 "/lib64/ld-linux-x86-64.so.2"
#undef ASM_SPEC
#define ASM_SPEC "%{v:-V} %{Qy:} %{!Qn:-Qy} %{n} %{T} %{Ym,*} %{Yd,*} \
%{Wa,*:%*} %{m32:--32} %{m64:--64} \
%{!mno-sse2avx:%{mavx:-msse2avx}} %{msse2avx:%{!mavx:-msse2avx}}"
#if TARGET_64BIT_DEFAULT
#define SPEC_32 "m32"
#define SPEC_64 "!m32"

8
gcc/doc/invoke.texi
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@ -581,7 +581,7 @@ Objective-C and Objective-C++ Dialects}.
-momit-leaf-frame-pointer -mno-red-zone -mno-tls-direct-seg-refs @gol
-mcmodel=@var{code-model} @gol
-m32 -m64 -mlarge-data-threshold=@var{num} @gol
-mfused-madd -mno-fused-madd}
-mfused-madd -mno-fused-madd -msse2avx}
@emph{IA-64 Options}
@gccoptlist{-mbig-endian -mlittle-endian -mgnu-as -mgnu-ld -mno-pic @gol
@ -11213,6 +11213,12 @@ Enable automatic generation of fused floating point multiply-add instructions
if the ISA supports such instructions. The -mfused-madd option is on by
default. The fused multiply-add instructions have a different
rounding behavior compared to executing a multiply followed by an add.
@item -msse2avx
@itemx -mno-sse2avx
@opindex msse2avx
Specify that the assembler should encode SSE instructions with VEX
prefix. The option @option{-mavx} turns this on by default.
@end table
These @samp{-m} switches are supported in addition to the above