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Avoid pcmpe insns when not valuable.

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*  gcc/config/microblaze/microblaze.c (microblaze_emit_compare):
     Use xor for EQ/NE comparisions
 *  gcc/config/microblaze/microblaze.md (cstoresf4): Add constraints
     (cbranchsf4): Adjust operator to comparison_operator

From-SVN: r196315
This commit is contained in:
Edgar E. Iglesias 2013-02-27 17:21:40 +00:00 committed by Michael Eager
parent 6fa5e0ed90
commit bbb3a9e273
3 changed files with 14 additions and 20 deletions
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7
gcc/ChangeLog
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@ -1,3 +1,10 @@
2013-02-27 Edgar E. Iglesias <edgar.iglesias@gmail.com>
* config/microblaze/microblaze.c (microblaze_emit_compare):
Use xor for EQ/NE comparisions
* config/microblaze/microblaze.md (cstoresf4): Add constraints
(cbranchsf4): Adjust operator to comparison_operator
2013-02-27 Jakub Jelinek <jakub@redhat.com>
PR middle-end/56461

17
gcc/config/microblaze/microblaze.c
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@ -2842,21 +2842,8 @@ microblaze_emit_compare (enum machine_mode mode, rtx cmp, enum rtx_code *cmp_cod
if (code == EQ || code == NE)
{
if (TARGET_PATTERN_COMPARE && GET_CODE(cmp_op1) == REG)
{
if (code == EQ)
{
emit_insn (gen_seq_internal_pat (comp_reg, cmp_op0, cmp_op1));
*cmp_code = NE;
}
else
{
emit_insn (gen_sne_internal_pat (comp_reg, cmp_op0, cmp_op1));
}
}
else
/* Use xor for equal/not-equal comparison. */
emit_insn (gen_xorsi3 (comp_reg, cmp_op0, cmp_op1));
/* Use xor for equal/not-equal comparison. */
emit_insn (gen_xorsi3 (comp_reg, cmp_op0, cmp_op1));
}
else if (code == GT || code == GTU || code == LE || code == LEU)
{

10
gcc/config/microblaze/microblaze.md
View File

@ -1637,10 +1637,10 @@
;; Setting a register from an floating point comparison.
;;----------------------------------------------------------------
(define_insn "cstoresf4"
[(set (match_operand:SI 0 "register_operand")
(match_operator:SI 1 "ordered_comparison_operator"
[(match_operand:SF 2 "register_operand")
(match_operand:SF 3 "register_operand")]))]
[(set (match_operand:SI 0 "register_operand" "=r")
(match_operator 1 "comparison_operator"
[(match_operand:SF 2 "register_operand" "r")
(match_operand:SF 3 "register_operand" "r")]))]
"TARGET_HARD_FLOAT"
"fcmp.%C1\t%0,%3,%2"
[(set_attr "type" "fcmp")
@ -1667,7 +1667,7 @@
(define_expand "cbranchsf4"
[(set (pc)
(if_then_else (match_operator:SI 0 "ordered_comparison_operator"
(if_then_else (match_operator 0 "comparison_operator"
[(match_operand:SF 1 "register_operand")
(match_operand:SF 2 "register_operand")])
(label_ref (match_operand 3 ""))